Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/137774/?format=api
{ "id": 137774, "url": "http://patches.dpdk.org/api/patches/137774/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240301191451.57168-5-hkalra@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240301191451.57168-5-hkalra@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240301191451.57168-5-hkalra@marvell.com", "date": "2024-03-01T19:14:31", "name": "[v5,04/23] net/cnxk: eswitch devargs parsing", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "133a326dbf7bfb51778428c230922584ba4e2b53", "submitter": { "id": 1182, "url": "http://patches.dpdk.org/api/people/1182/?format=api", "name": "Harman Kalra", "email": "hkalra@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240301191451.57168-5-hkalra@marvell.com/mbox/", "series": [ { "id": 31343, "url": "http://patches.dpdk.org/api/series/31343/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31343", "date": "2024-03-01T19:14:27", "name": "net/cnxk: support for port representors", "version": 5, "mbox": "http://patches.dpdk.org/series/31343/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/137774/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/137774/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0F4BA43C0F;\n\tFri, 1 Mar 2024 20:15:27 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 5D4BA433ED;\n\tFri, 1 Mar 2024 20:15:12 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 0CEA64341B\n for <dev@dpdk.org>; Fri, 1 Mar 2024 20:15:10 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id\n 4219mhDw013738 for <dev@dpdk.org>; Fri, 1 Mar 2024 11:15:10 -0800", "from dc6wp-exch02.marvell.com ([4.21.29.225])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3wkcq59sfh-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 01 Mar 2024 11:15:09 -0800 (PST)", "from DC6WP-EXCH02.marvell.com (10.76.176.209) by\n DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1258.12; Fri, 1 Mar 2024 11:15:08 -0800", "from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com\n (10.76.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend\n Transport; Fri, 1 Mar 2024 11:15:08 -0800", "from localhost.localdomain (unknown [10.29.52.211])\n by maili.marvell.com (Postfix) with ESMTP id 6168A3F71E0;\n Fri, 1 Mar 2024 11:15:06 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-type; s=pfpt0220; bh=mjo/CH41g3xjrevHVO85T\n CO8YCf+5c6QU7Bahr9HAmA=; b=kpHSldraUfpP4nKuDnDhOdGNfZxO/iD5ADjW1\n DzaO92YJMh3+tjqv9vw2i83L3pU12gq2FP/F7L4O5n37x0cqGr13KfvdZnvjHzIf\n hcxhTa53iHNoM6AjOX1bsMYRleHomPEzaJn+hG9zsn1tczzI6U2ohgkjSw3GTgS2\n 1ttASrCBOQQEnqc18gYhwjSGNFtUKAIGw17fH6/OxNmL8oKs15DiAEsAMJnUUVo1\n CmUEbGaYtDez0LXVUQ7DsbBwaHebU+erd0bhs4uyriKHs/8Gy87cnoyQCk1+nD4B\n u5YTGY1AQba6kJiWFfKiSeWzi0XnfzMYsButiLfTzliCNS6oQ==", "From": "Harman Kalra <hkalra@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Harman Kalra <hkalra@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH v5 04/23] net/cnxk: eswitch devargs parsing", "Date": "Sat, 2 Mar 2024 00:44:31 +0530", "Message-ID": "<20240301191451.57168-5-hkalra@marvell.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20240301191451.57168-1-hkalra@marvell.com>", "References": "<20230811163419.165790-1-hkalra@marvell.com>\n <20240301191451.57168-1-hkalra@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "0bEXM-9qWVETyNaNDOPaFhPT2WjyvDre", "X-Proofpoint-ORIG-GUID": "0bEXM-9qWVETyNaNDOPaFhPT2WjyvDre", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-03-01_20,2024-03-01_03,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Implementing the devargs parsing logic via which the representors\npattern is provided. These patterns define for which representies\nrepresentors shall be created.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n drivers/net/cnxk/cnxk_eswitch.c | 88 +++++++++++++++++\n drivers/net/cnxk/cnxk_eswitch.h | 52 ++++++++++\n drivers/net/cnxk/cnxk_eswitch_devargs.c | 124 ++++++++++++++++++++++++\n drivers/net/cnxk/meson.build | 1 +\n 4 files changed, 265 insertions(+)\n create mode 100644 drivers/net/cnxk/cnxk_eswitch_devargs.c", "diff": "diff --git a/drivers/net/cnxk/cnxk_eswitch.c b/drivers/net/cnxk/cnxk_eswitch.c\nindex 810e7c9c25..687bb7d146 100644\n--- a/drivers/net/cnxk/cnxk_eswitch.c\n+++ b/drivers/net/cnxk/cnxk_eswitch.c\n@@ -388,6 +388,7 @@ nix_lf_setup(struct cnxk_eswitch_dev *eswitch_dev)\n \t\tplt_err(\"Failed to get rep cnt, rc=%d(%s)\", rc, roc_error_msg_get(rc));\n \t\tgoto free_cqs;\n \t}\n+\teswitch_dev->repr_cnt.max_repr = eswitch_dev->nix.rep_cnt;\n \n \t/* Allocating an NIX LF */\n \tnb_rxq = CNXK_ESWITCH_MAX_RXQ;\n@@ -525,11 +526,73 @@ eswitch_hw_rsrc_setup(struct cnxk_eswitch_dev *eswitch_dev, struct rte_pci_devic\n \treturn rc;\n }\n \n+int\n+cnxk_eswitch_representor_info_get(struct cnxk_eswitch_dev *eswitch_dev,\n+\t\t\t\t struct rte_eth_representor_info *info)\n+{\n+\tstruct cnxk_eswitch_devargs *esw_da;\n+\tint rc = 0, n_entries, i, j = 0, k = 0;\n+\n+\tfor (i = 0; i < eswitch_dev->nb_esw_da; i++) {\n+\t\tfor (j = 0; j < eswitch_dev->esw_da[i].nb_repr_ports; j++)\n+\t\t\tk++;\n+\t}\n+\tn_entries = k;\n+\n+\tif (info == NULL)\n+\t\tgoto out;\n+\n+\tif ((uint32_t)n_entries > info->nb_ranges_alloc)\n+\t\tn_entries = info->nb_ranges_alloc;\n+\n+\tk = 0;\n+\tinfo->controller = 0;\n+\tinfo->pf = 0;\n+\tfor (i = 0; i < eswitch_dev->nb_esw_da; i++) {\n+\t\tesw_da = &eswitch_dev->esw_da[i];\n+\t\tinfo->ranges[k].type = esw_da->da.type;\n+\t\tswitch (esw_da->da.type) {\n+\t\tcase RTE_ETH_REPRESENTOR_PF:\n+\t\t\tinfo->ranges[k].controller = 0;\n+\t\t\tinfo->ranges[k].pf = esw_da->repr_hw_info[0].pfvf;\n+\t\t\tinfo->ranges[k].vf = 0;\n+\t\t\tinfo->ranges[k].id_base = info->ranges[i].pf;\n+\t\t\tinfo->ranges[k].id_end = info->ranges[i].pf;\n+\t\t\tsnprintf(info->ranges[k].name, sizeof(info->ranges[k].name), \"pf%d\",\n+\t\t\t\t info->ranges[k].pf);\n+\t\t\tk++;\n+\t\t\tbreak;\n+\t\tcase RTE_ETH_REPRESENTOR_VF:\n+\t\t\tfor (j = 0; j < esw_da->nb_repr_ports; j++) {\n+\t\t\t\tinfo->ranges[k].controller = 0;\n+\t\t\t\tinfo->ranges[k].pf = esw_da->da.ports[0];\n+\t\t\t\tinfo->ranges[k].vf = esw_da->repr_hw_info[j].pfvf;\n+\t\t\t\tinfo->ranges[k].id_base = esw_da->repr_hw_info[j].port_id;\n+\t\t\t\tinfo->ranges[k].id_end = esw_da->repr_hw_info[j].port_id;\n+\t\t\t\tsnprintf(info->ranges[k].name, sizeof(info->ranges[k].name),\n+\t\t\t\t\t \"pf%dvf%d\", info->ranges[k].pf, info->ranges[k].vf);\n+\t\t\t\tk++;\n+\t\t\t}\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tplt_err(\"Invalid type %d\", esw_da->da.type);\n+\t\t\trc = 0;\n+\t\t\tgoto fail;\n+\t\t};\n+\t}\n+\tinfo->nb_ranges = k;\n+fail:\n+\treturn rc;\n+out:\n+\treturn n_entries;\n+}\n+\n static int\n cnxk_eswitch_dev_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pci_dev)\n {\n \tstruct cnxk_eswitch_dev *eswitch_dev;\n \tconst struct rte_memzone *mz = NULL;\n+\tuint16_t num_reps;\n \tint rc = -ENOMEM;\n \n \tRTE_SET_USED(pci_drv);\n@@ -562,12 +625,37 @@ cnxk_eswitch_dev_probe(struct rte_pci_driver *pci_drv, struct rte_pci_device *pc\n \t\t}\n \t}\n \n+\tif (pci_dev->device.devargs) {\n+\t\trc = cnxk_eswitch_repr_devargs(pci_dev, eswitch_dev);\n+\t\tif (rc)\n+\t\t\tgoto rsrc_cleanup;\n+\t}\n+\n+\tif (eswitch_dev->repr_cnt.nb_repr_created > eswitch_dev->repr_cnt.max_repr) {\n+\t\tplt_err(\"Representors to be created %d can be greater than max allowed %d\",\n+\t\t\teswitch_dev->repr_cnt.nb_repr_created, eswitch_dev->repr_cnt.max_repr);\n+\t\trc = -EINVAL;\n+\t\tgoto rsrc_cleanup;\n+\t}\n+\n+\tnum_reps = eswitch_dev->repr_cnt.nb_repr_created;\n+\tif (!num_reps) {\n+\t\tplt_err(\"No representors enabled\");\n+\t\tgoto fail;\n+\t}\n+\n+\tplt_esw_dbg(\"Max no of reps %d reps to be created %d Eswtch pfunc %x\",\n+\t\t eswitch_dev->repr_cnt.max_repr, eswitch_dev->repr_cnt.nb_repr_created,\n+\t\t roc_nix_get_pf_func(&eswitch_dev->nix));\n+\n \t/* Spinlock for synchronization between representors traffic and control\n \t * messages\n \t */\n \trte_spinlock_init(&eswitch_dev->rep_lock);\n \n \treturn rc;\n+rsrc_cleanup:\n+\teswitch_hw_rsrc_cleanup(eswitch_dev, pci_dev);\n free_mem:\n \trte_memzone_free(mz);\n fail:\ndiff --git a/drivers/net/cnxk/cnxk_eswitch.h b/drivers/net/cnxk/cnxk_eswitch.h\nindex d1b4fa8761..6ff296399e 100644\n--- a/drivers/net/cnxk/cnxk_eswitch.h\n+++ b/drivers/net/cnxk/cnxk_eswitch.h\n@@ -25,6 +25,47 @@\n #define CNXK_ESWITCH_QUEUE_STATE_STARTED 2\n #define CNXK_ESWITCH_QUEUE_STATE_STOPPED 3\n \n+enum cnxk_esw_da_pattern_type {\n+\tCNXK_ESW_DA_TYPE_LIST = 0,\n+\tCNXK_ESW_DA_TYPE_PFVF,\n+};\n+\n+struct cnxk_esw_repr_hw_info {\n+\t/* Representee pcifunc value */\n+\tuint16_t hw_func;\n+\t/* rep id in sync with kernel */\n+\tuint16_t rep_id;\n+\t/* pf or vf id */\n+\tuint16_t pfvf;\n+\t/* representor port id assigned to representee */\n+\tuint16_t port_id;\n+};\n+\n+/* Structure representing per devarg information - this can be per representee\n+ * or range of representee\n+ */\n+struct cnxk_eswitch_devargs {\n+\t/* Devargs populated */\n+\tstruct rte_eth_devargs da;\n+\t/* HW info of representee */\n+\tstruct cnxk_esw_repr_hw_info *repr_hw_info;\n+\t/* No of representor ports */\n+\tuint16_t nb_repr_ports;\n+\t/* Devargs pattern type */\n+\tenum cnxk_esw_da_pattern_type type;\n+};\n+\n+struct cnxk_eswitch_repr_cnt {\n+\t/* Max possible representors */\n+\tuint16_t max_repr;\n+\t/* Representors to be created as per devargs passed */\n+\tuint16_t nb_repr_created;\n+\t/* Representors probed successfully */\n+\tuint16_t nb_repr_probed;\n+\t/* Representors started representing a representee */\n+\tuint16_t nb_repr_started;\n+};\n+\n struct cnxk_rep_info {\n \tstruct rte_eth_dev *rep_eth_dev;\n };\n@@ -70,6 +111,14 @@ struct cnxk_eswitch_dev {\n \tuint16_t rep_cnt;\n \tuint8_t configured;\n \n+\t/* Eswitch Representors Devargs */\n+\tuint16_t nb_esw_da;\n+\tuint16_t last_probed;\n+\tstruct cnxk_eswitch_devargs esw_da[RTE_MAX_ETHPORTS];\n+\n+\t/* No of representors */\n+\tstruct cnxk_eswitch_repr_cnt repr_cnt;\n+\n \t/* Port representor fields */\n \trte_spinlock_t rep_lock;\n \tuint16_t switch_domain_id;\n@@ -90,6 +139,9 @@ cnxk_eswitch_pmd_priv(void)\n }\n \n int cnxk_eswitch_nix_rsrc_start(struct cnxk_eswitch_dev *eswitch_dev);\n+int cnxk_eswitch_repr_devargs(struct rte_pci_device *pci_dev, struct cnxk_eswitch_dev *eswitch_dev);\n+int cnxk_eswitch_representor_info_get(struct cnxk_eswitch_dev *eswitch_dev,\n+\t\t\t\t struct rte_eth_representor_info *info);\n int cnxk_eswitch_txq_setup(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid, uint16_t nb_desc,\n \t\t\t const struct rte_eth_txconf *tx_conf);\n int cnxk_eswitch_txq_release(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid);\ndiff --git a/drivers/net/cnxk/cnxk_eswitch_devargs.c b/drivers/net/cnxk/cnxk_eswitch_devargs.c\nnew file mode 100644\nindex 0000000000..58383fb835\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_eswitch_devargs.c\n@@ -0,0 +1,124 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+\n+#include <cnxk_eswitch.h>\n+\n+#define PF_SHIFT 10\n+static inline int\n+get_hw_func(uint16_t pf, uint16_t vf)\n+{\n+\treturn (pf << PF_SHIFT) | vf;\n+}\n+\n+static int\n+populate_repr_hw_info(struct cnxk_eswitch_dev *eswitch_dev, struct rte_eth_devargs *eth_da,\n+\t\t uint16_t idx)\n+{\n+\tstruct cnxk_eswitch_devargs *esw_da = &eswitch_dev->esw_da[idx];\n+\tuint16_t nb_repr_ports, hw_func;\n+\tint rc, i, j;\n+\n+\tif (eth_da->type == RTE_ETH_REPRESENTOR_NONE) {\n+\t\tplt_err(\"No representor type found\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (eth_da->type != RTE_ETH_REPRESENTOR_VF && eth_da->type != RTE_ETH_REPRESENTOR_PF &&\n+\t eth_da->type != RTE_ETH_REPRESENTOR_SF) {\n+\t\tplt_err(\"unsupported representor type %d\\n\", eth_da->type);\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\tnb_repr_ports = (eth_da->type == RTE_ETH_REPRESENTOR_PF) ? eth_da->nb_ports :\n+\t\t\t\t\t\t\t\t eth_da->nb_representor_ports;\n+\tesw_da->nb_repr_ports = nb_repr_ports;\n+\t/* If plain list is provided as representor pattern */\n+\tif (eth_da->nb_ports == 0)\n+\t\treturn 0;\n+\n+\tesw_da->repr_hw_info = plt_zmalloc(nb_repr_ports * sizeof(struct cnxk_esw_repr_hw_info), 0);\n+\tif (!esw_da->repr_hw_info) {\n+\t\tplt_err(\"Failed to allocate memory\");\n+\t\trc = -ENOMEM;\n+\t\tgoto fail;\n+\t}\n+\n+\tplt_esw_dbg(\"Representor param %d has %d pfvf\", idx, nb_repr_ports);\n+\t/* Check if representor can be created for PFVF and populating HW func list */\n+\tfor (i = 0; i < nb_repr_ports; i++) {\n+\t\tif (eth_da->type == RTE_ETH_REPRESENTOR_PF)\n+\t\t\thw_func = get_hw_func(eth_da->ports[i], 0);\n+\t\telse\n+\t\t\thw_func = get_hw_func(eth_da->ports[0], eth_da->representor_ports[i] + 1);\n+\n+\t\tfor (j = 0; j < eswitch_dev->repr_cnt.max_repr; j++) {\n+\t\t\tif (eswitch_dev->nix.rep_pfvf_map[j] == hw_func)\n+\t\t\t\tbreak;\n+\t\t}\n+\n+\t\t/* HW func which doesn not match the map table received from AF, no\n+\t\t * representor port is assigned.\n+\t\t */\n+\t\tif (j == eswitch_dev->repr_cnt.max_repr) {\n+\t\t\tplt_err(\"Representor port can't be created for PF%dVF%d\", eth_da->ports[0],\n+\t\t\t\teth_da->representor_ports[i]);\n+\t\t\trc = -EINVAL;\n+\t\t\tgoto fail;\n+\t\t}\n+\n+\t\tesw_da->repr_hw_info[i].hw_func = hw_func;\n+\t\tesw_da->repr_hw_info[i].rep_id = j;\n+\t\tesw_da->repr_hw_info[i].pfvf = (eth_da->type == RTE_ETH_REPRESENTOR_PF) ?\n+\t\t\t\t\t\t eth_da->ports[0] :\n+\t\t\t\t\t\t eth_da->representor_ports[i];\n+\t\tplt_esw_dbg(\"\tHW func %x index %d type %d\", hw_func, j, eth_da->type);\n+\t}\n+\n+\tesw_da->type = CNXK_ESW_DA_TYPE_PFVF;\n+\n+\treturn 0;\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_eswitch_repr_devargs(struct rte_pci_device *pci_dev, struct cnxk_eswitch_dev *eswitch_dev)\n+{\n+\tstruct rte_devargs *devargs = pci_dev->device.devargs;\n+\tstruct rte_eth_devargs eth_da[RTE_MAX_ETHPORTS];\n+\tint rc, i, j, count;\n+\n+\tif (devargs == NULL) {\n+\t\tplt_err(\"No devargs passed\");\n+\t\trc = -EINVAL;\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Parse devargs passed to ESW device */\n+\trc = rte_eth_devargs_parse(devargs->args, eth_da, RTE_MAX_ETHPORTS);\n+\tif (rc < 0) {\n+\t\tplt_err(\"Failed to parse devargs, err %d\", rc);\n+\t\tgoto fail;\n+\t}\n+\n+\tcount = rc;\n+\tj = eswitch_dev->nb_esw_da;\n+\tfor (i = 0; i < count; i++) {\n+\t\trc = populate_repr_hw_info(eswitch_dev, ð_da[i], j);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to populate representer hw funcs, err %d\", rc);\n+\t\t\tgoto fail;\n+\t\t}\n+\n+\t\trte_memcpy(&eswitch_dev->esw_da[j].da, ð_da[i], sizeof(struct rte_eth_devargs));\n+\t\t/* No of representor ports to be created */\n+\t\teswitch_dev->repr_cnt.nb_repr_created += eswitch_dev->esw_da[j].nb_repr_ports;\n+\t\tj++;\n+\t}\n+\teswitch_dev->nb_esw_da += count;\n+\n+\treturn 0;\n+fail:\n+\treturn rc;\n+}\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex 012d098f80..ea7e363e89 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -29,6 +29,7 @@ sources = files(\n 'cnxk_ethdev_telemetry.c',\n 'cnxk_ethdev_sec_telemetry.c',\n 'cnxk_eswitch.c',\n+ 'cnxk_eswitch_devargs.c',\n 'cnxk_link.c',\n 'cnxk_lookup.c',\n 'cnxk_ptp.c',\n", "prefixes": [ "v5", "04/23" ] }