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GET /api/patches/137661/?format=api
{ "id": 137661, "url": "http://patches.dpdk.org/api/patches/137661/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240301095052.460597-1-mingjinx.ye@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240301095052.460597-1-mingjinx.ye@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240301095052.460597-1-mingjinx.ye@intel.com", "date": "2024-03-01T09:50:51", "name": "[v3] net/ice: add diagnostic support in TX path", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c5383925535827b50c55d05041bc06931eb87b1b", "submitter": { "id": 2862, "url": "http://patches.dpdk.org/api/people/2862/?format=api", "name": "Mingjin Ye", "email": "mingjinx.ye@intel.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240301095052.460597-1-mingjinx.ye@intel.com/mbox/", "series": [ { "id": 31327, "url": "http://patches.dpdk.org/api/series/31327/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31327", "date": "2024-03-01T09:50:51", "name": "[v3] net/ice: add diagnostic support in TX path", "version": 3, "mbox": "http://patches.dpdk.org/series/31327/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/137661/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/137661/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 87BA243BCD;\n\tFri, 1 Mar 2024 11:11:06 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 75F544026C;\n\tFri, 1 Mar 2024 11:11:06 +0100 (CET)", "from mgamail.intel.com (mgamail.intel.com [198.175.65.14])\n by mails.dpdk.org (Postfix) with ESMTP id 1FBC0400D5\n for <dev@dpdk.org>; Fri, 1 Mar 2024 11:11:04 +0100 (CET)", "from orviesa004.jf.intel.com ([10.64.159.144])\n by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 01 Mar 2024 02:11:05 -0800", "from unknown (HELO localhost.localdomain) ([10.239.252.253])\n by orviesa004-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 01 Mar 2024 02:11:02 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1709287866; x=1740823866;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=Umlqrni87oKcSVrykcPEJpGg+boz+/sea2GVBxDWIZ0=;\n b=h6c0Kj6h3qpxWvOjl1j0IfFpxh0HpTCJMSlNRrpkKbz/uscum3FREooB\n P4ZVXunFrpyDStb3b2qCbWr8MTffRxFS74NDC2ciWj6SC7CN6QyyB3wq2\n tnKVVBxVcbjWFeQ4QEOiiaU8MgnhzybbJT6V2jSbEyvNLZxShWts1NsAs\n HCJPvG1A9LrtoUP4/NIuiJ/zQ/S+HzYgwzn1Nbki4r2F5CYPjcBcLxevX\n l3Rw8amLorNKxasuE9Lw9esbVOjxSDo+tjjf0KBxeapcPer8l7WqsHU/i\n RDNnyEJAHuXB1Bx+h3/0NT2W6dKalYwez2iPBri1bD+4ymmwEROqLqKML A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10999\"; a=\"7632551\"", "E=Sophos;i=\"6.06,195,1705392000\";\n d=\"scan'208\";a=\"7632551\"", "E=Sophos;i=\"6.06,195,1705392000\"; d=\"scan'208\";a=\"12830211\"" ], "X-ExtLoop1": "1", "From": "Mingjin Ye <mingjinx.ye@intel.com>", "To": "dev@dpdk.org", "Cc": "Mingjin Ye <mingjinx.ye@intel.com>", "Subject": "[PATCH v3] net/ice: add diagnostic support in TX path", "Date": "Fri, 1 Mar 2024 09:50:51 +0000", "Message-Id": "<20240301095052.460597-1-mingjinx.ye@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20240105101125.2454522-1-mingjinx.ye@intel.com>", "References": "<20240105101125.2454522-1-mingjinx.ye@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Implemented a Tx wrapper to perform a thorough check on mbufs,\ncategorizing and counting invalid cases by types for diagnostic\npurposes. The count of invalid cases is accessible through xstats_get.\n\nAlso, the devarg option \"mbuf_check\" was introduced to configure the\ndiagnostic parameters to enable the appropriate diagnostic features.\n\nsupported cases: mbuf, size, segment, offload.\n 1. mbuf: check for corrupted mbuf.\n 2. size: check min/max packet length according to hw spec.\n 3. segment: check number of mbuf segments not exceed hw limitation.\n 4. offload: check any unsupported offload flag.\n\nparameter format: \"mbuf_check=<case>\" or \"mbuf_check=[<case1>,<case2>]\"\neg: dpdk-testpmd -a 0000:81:01.0,mbuf_check=[mbuf,size] -- -i\n\nSigned-off-by: Mingjin Ye <mingjinx.ye@intel.com>\n---\nv2: rebase.\n---\nv3: Modify comment log.\n---\n doc/guides/nics/ice.rst | 13 +++\n drivers/net/ice/ice_ethdev.c | 108 +++++++++++++++++++++++-\n drivers/net/ice/ice_ethdev.h | 23 +++++\n drivers/net/ice/ice_rxtx.c | 158 ++++++++++++++++++++++++++++++++---\n drivers/net/ice/ice_rxtx.h | 20 +++++\n 5 files changed, 311 insertions(+), 11 deletions(-)", "diff": "diff --git a/doc/guides/nics/ice.rst b/doc/guides/nics/ice.rst\nindex bafb3ba022..d1aee811b3 100644\n--- a/doc/guides/nics/ice.rst\n+++ b/doc/guides/nics/ice.rst\n@@ -257,6 +257,19 @@ Runtime Configuration\n As a trade-off, this configuration may cause the packet processing performance\n degradation due to the PCI bandwidth limitation.\n \n+- ``Tx diagnostics`` (default ``not enabled``)\n+\n+ Set the ``devargs`` parameter ``mbuf_check`` to enable TX diagnostics. For example,\n+ ``-a 18:01.0,mbuf_check=<case>`` or ``-a 18:01.0,mbuf_check=[<case1>,<case2>...]``.\n+ Also, ``xstats_get`` can be used to get the error counts, which are collected in\n+ ``tx_mbuf_error_packets`` xstats. For example, ``testpmd> show port xstats all``.\n+ Supported cases:\n+\n+ * mbuf: Check for corrupted mbuf.\n+ * size: Check min/max packet length according to hw spec.\n+ * segment: Check number of mbuf segments not exceed hw limitation.\n+ * offload: Check any unsupported offload flag.\n+\n Driver compilation and testing\n ------------------------------\n \ndiff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c\nindex 72e13f95f8..d28e205375 100644\n--- a/drivers/net/ice/ice_ethdev.c\n+++ b/drivers/net/ice/ice_ethdev.c\n@@ -12,6 +12,7 @@\n #include <unistd.h>\n \n #include <rte_tailq.h>\n+#include <rte_os_shim.h>\n \n #include \"eal_firmware.h\"\n \n@@ -34,6 +35,7 @@\n #define ICE_HW_DEBUG_MASK_ARG \"hw_debug_mask\"\n #define ICE_ONE_PPS_OUT_ARG \"pps_out\"\n #define ICE_RX_LOW_LATENCY_ARG \"rx_low_latency\"\n+#define ICE_MBUF_CHECK_ARG \"mbuf_check\"\n \n #define ICE_CYCLECOUNTER_MASK 0xffffffffffffffffULL\n \n@@ -49,6 +51,7 @@ static const char * const ice_valid_args[] = {\n \tICE_ONE_PPS_OUT_ARG,\n \tICE_RX_LOW_LATENCY_ARG,\n \tICE_DEFAULT_MAC_DISABLE,\n+\tICE_MBUF_CHECK_ARG,\n \tNULL\n };\n \n@@ -319,6 +322,14 @@ static const struct ice_xstats_name_off ice_stats_strings[] = {\n #define ICE_NB_ETH_XSTATS (sizeof(ice_stats_strings) / \\\n \t\tsizeof(ice_stats_strings[0]))\n \n+static const struct ice_xstats_name_off ice_mbuf_strings[] = {\n+\t{\"tx_mbuf_error_packets\", offsetof(struct ice_mbuf_stats,\n+\t\ttx_pkt_errors)},\n+};\n+\n+#define ICE_NB_MBUF_XSTATS (sizeof(ice_mbuf_strings) / \\\n+\t\tsizeof(ice_mbuf_strings[0]))\n+\n static const struct ice_xstats_name_off ice_hw_port_strings[] = {\n \t{\"tx_link_down_dropped\", offsetof(struct ice_hw_port_stats,\n \t\ttx_dropped_link_down)},\n@@ -2061,6 +2072,58 @@ handle_pps_out_arg(__rte_unused const char *key, const char *value,\n \treturn 0;\n }\n \n+static int\n+ice_parse_mbuf_check(__rte_unused const char *key, const char *value, void *args)\n+{\n+\tchar *cur;\n+\tchar *tmp;\n+\tint str_len;\n+\tint valid_len;\n+\n+\tint ret = 0;\n+\tuint64_t *mc_flags = args;\n+\tchar *str2 = strdup(value);\n+\tif (str2 == NULL)\n+\t\treturn -1;\n+\n+\tstr_len = strlen(str2);\n+\tif (str_len == 0) {\n+\t\tret = -1;\n+\t\tgoto err_end;\n+\t}\n+\n+\t/* Try stripping the outer square brackets of the parameter string. */\n+\tstr_len = strlen(str2);\n+\tif (str2[0] == '[' && str2[str_len - 1] == ']') {\n+\t\tif (str_len < 3) {\n+\t\t\tret = -1;\n+\t\t\tgoto err_end;\n+\t\t}\n+\t\tvalid_len = str_len - 2;\n+\t\tmemmove(str2, str2 + 1, valid_len);\n+\t\tmemset(str2 + valid_len, '\\0', 2);\n+\t}\n+\n+\tcur = strtok_r(str2, \",\", &tmp);\n+\twhile (cur != NULL) {\n+\t\tif (!strcmp(cur, \"mbuf\"))\n+\t\t\t*mc_flags |= ICE_MBUF_CHECK_F_TX_MBUF;\n+\t\telse if (!strcmp(cur, \"size\"))\n+\t\t\t*mc_flags |= ICE_MBUF_CHECK_F_TX_SIZE;\n+\t\telse if (!strcmp(cur, \"segment\"))\n+\t\t\t*mc_flags |= ICE_MBUF_CHECK_F_TX_SEGMENT;\n+\t\telse if (!strcmp(cur, \"offload\"))\n+\t\t\t*mc_flags |= ICE_MBUF_CHECK_F_TX_OFFLOAD;\n+\t\telse\n+\t\t\tPMD_DRV_LOG(ERR, \"Unsupported diagnostic type: %s\", cur);\n+\t\tcur = strtok_r(NULL, \",\", &tmp);\n+\t}\n+\n+err_end:\n+\tfree(str2);\n+\treturn ret;\n+}\n+\n static int ice_parse_devargs(struct rte_eth_dev *dev)\n {\n \tstruct ice_adapter *ad =\n@@ -2117,6 +2180,11 @@ static int ice_parse_devargs(struct rte_eth_dev *dev)\n \tif (ret)\n \t\tgoto bail;\n \n+\tret = rte_kvargs_process(kvlist, ICE_MBUF_CHECK_ARG,\n+\t\t\t\t &ice_parse_mbuf_check, &ad->devargs.mbuf_check);\n+\tif (ret)\n+\t\tgoto bail;\n+\n \tret = rte_kvargs_process(kvlist, ICE_RX_LOW_LATENCY_ARG,\n \t\t\t\t &parse_bool, &ad->devargs.rx_low_latency);\n \n@@ -6161,6 +6229,9 @@ ice_stats_reset(struct rte_eth_dev *dev)\n \t/* read the stats, reading current register values into offset */\n \tice_read_stats_registers(pf, hw);\n \n+\tmemset(&pf->mbuf_stats, 0,\n+\t\tsizeof(struct ice_mbuf_stats));\n+\n \treturn 0;\n }\n \n@@ -6169,17 +6240,33 @@ ice_xstats_calc_num(void)\n {\n \tuint32_t num;\n \n-\tnum = ICE_NB_ETH_XSTATS + ICE_NB_HW_PORT_XSTATS;\n+\tnum = ICE_NB_ETH_XSTATS + ICE_NB_MBUF_XSTATS + ICE_NB_HW_PORT_XSTATS;\n \n \treturn num;\n }\n \n+static void\n+ice_update_mbuf_stats(struct rte_eth_dev *ethdev,\n+\t\tstruct ice_mbuf_stats *mbuf_stats)\n+{\n+\tuint16_t idx;\n+\tstruct ice_tx_queue *txq;\n+\n+\tfor (idx = 0; idx < ethdev->data->nb_tx_queues; idx++) {\n+\t\ttxq = ethdev->data->tx_queues[idx];\n+\t\tmbuf_stats->tx_pkt_errors += txq->mbuf_errors;\n+\t}\n+}\n+\n static int\n ice_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,\n \t unsigned int n)\n {\n \tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct ice_hw *hw = ICE_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct ice_adapter *adapter =\n+\t\tICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\tstruct ice_mbuf_stats mbuf_stats = {0};\n \tunsigned int i;\n \tunsigned int count;\n \tstruct ice_hw_port_stats *hw_stats = &pf->stats;\n@@ -6195,6 +6282,9 @@ ice_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,\n \n \tcount = 0;\n \n+\tif (adapter->devargs.mbuf_check)\n+\t\tice_update_mbuf_stats(dev, &mbuf_stats);\n+\n \t/* Get stats from ice_eth_stats struct */\n \tfor (i = 0; i < ICE_NB_ETH_XSTATS; i++) {\n \t\txstats[count].value =\n@@ -6204,6 +6294,15 @@ ice_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,\n \t\tcount++;\n \t}\n \n+\t/* Get stats from ice_mbuf_stats struct */\n+\tfor (i = 0; i < ICE_NB_MBUF_XSTATS; i++) {\n+\t\txstats[count].value =\n+\t\t\t*(uint64_t *)((char *)&mbuf_stats +\n+\t\t\t\t\tice_mbuf_strings[i].offset);\n+\t\txstats[count].id = count;\n+\t\tcount++;\n+\t}\n+\n \t/* Get individual stats from ice_hw_port struct */\n \tfor (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {\n \t\txstats[count].value =\n@@ -6235,6 +6334,13 @@ static int ice_xstats_get_names(__rte_unused struct rte_eth_dev *dev,\n \t\tcount++;\n \t}\n \n+\t/* Get stats from ice_mbuf_stats struct */\n+\tfor (i = 0; i < ICE_NB_MBUF_XSTATS; i++) {\n+\t\tstrlcpy(xstats_names[count].name, ice_mbuf_strings[i].name,\n+\t\t\tsizeof(xstats_names[count].name));\n+\t\tcount++;\n+\t}\n+\n \t/* Get individual stats from ice_hw_port struct */\n \tfor (i = 0; i < ICE_NB_HW_PORT_XSTATS; i++) {\n \t\tstrlcpy(xstats_names[count].name, ice_hw_port_strings[i].name,\ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex fa4981ed14..fa0b7bd226 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -507,6 +507,10 @@ struct ice_tm_conf {\n \tbool clear_on_fail;\n };\n \n+struct ice_mbuf_stats {\n+\tuint64_t tx_pkt_errors;\n+};\n+\n struct ice_pf {\n \tstruct ice_adapter *adapter; /* The adapter this PF associate to */\n \tstruct ice_vsi *main_vsi; /* pointer to main VSI structure */\n@@ -536,6 +540,7 @@ struct ice_pf {\n \tuint16_t fdir_fltr_cnt[ICE_FLTR_PTYPE_MAX][ICE_FD_HW_SEG_MAX];\n \tstruct ice_hw_port_stats stats_offset;\n \tstruct ice_hw_port_stats stats;\n+\tstruct ice_mbuf_stats mbuf_stats;\n \t/* internal packet statistics, it should be excluded from the total */\n \tstruct ice_eth_stats internal_stats_offset;\n \tstruct ice_eth_stats internal_stats;\n@@ -574,6 +579,7 @@ struct ice_devargs {\n \tuint8_t xtr_flag_offs[PROTO_XTR_MAX];\n \t/* Name of the field. */\n \tchar xtr_field_name[RTE_MBUF_DYN_NAMESIZE];\n+\tuint64_t mbuf_check;\n };\n \n /**\n@@ -592,6 +598,21 @@ struct ice_rss_prof_info {\n \tbool symm;\n };\n \n+#define ICE_MBUF_CHECK_F_TX_MBUF (1ULL << 0)\n+#define ICE_MBUF_CHECK_F_TX_SIZE (1ULL << 1)\n+#define ICE_MBUF_CHECK_F_TX_SEGMENT (1ULL << 2)\n+#define ICE_MBUF_CHECK_F_TX_OFFLOAD (1ULL << 3)\n+\n+enum ice_tx_burst_type {\n+\tICE_TX_DEFAULT,\n+\tICE_TX_SIMPLE,\n+\tICE_TX_VEC_SSE,\n+\tICE_TX_VEC_AVX2,\n+\tICE_TX_VEC_AVX2_OFFLOAD,\n+\tICE_TX_VEC_AVX512,\n+\tICE_TX_VEC_AVX512_OFFLOAD,\n+};\n+\n /**\n * Structure to store private data for each PF/VF instance.\n */\n@@ -609,6 +630,8 @@ struct ice_adapter {\n \tstruct ice_devargs devargs;\n \tenum ice_pkg_type active_pkg_type; /* loaded ddp package type */\n \tuint16_t fdir_ref_cnt;\n+\t/* For vector PMD */\n+\tenum ice_tx_burst_type tx_burst_type;\n \t/* For PTP */\n \tstruct rte_timecounter systime_tc;\n \tstruct rte_timecounter rx_tstamp_tc;\ndiff --git a/drivers/net/ice/ice_rxtx.c b/drivers/net/ice/ice_rxtx.c\nindex 73e47ae92d..fdffe17925 100644\n--- a/drivers/net/ice/ice_rxtx.c\n+++ b/drivers/net/ice/ice_rxtx.c\n@@ -3678,6 +3678,132 @@ ice_check_empty_mbuf(struct rte_mbuf *tx_pkt)\n \treturn 0;\n }\n \n+static\n+const eth_tx_burst_t ice_tx_pkt_burst_ops[] = {\n+\t[ICE_TX_DEFAULT] = ice_xmit_pkts,\n+\t[ICE_TX_SIMPLE] = ice_xmit_pkts_simple,\n+#ifdef RTE_ARCH_X86\n+\t[ICE_TX_VEC_SSE] = ice_xmit_pkts_vec,\n+\t[ICE_TX_VEC_AVX2] = ice_xmit_pkts_vec_avx2,\n+\t[ICE_TX_VEC_AVX2_OFFLOAD] = ice_xmit_pkts_vec_avx2_offload,\n+#ifdef CC_AVX512_SUPPORT\n+\t[ICE_TX_VEC_AVX512] = ice_xmit_pkts_vec_avx512,\n+\t[ICE_TX_VEC_AVX512_OFFLOAD] = ice_xmit_pkts_vec_avx512_offload,\n+#endif\n+#endif\n+};\n+\n+/* Tx mbuf check */\n+static uint16_t\n+ice_xmit_pkts_check(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t uint16_t nb_pkts)\n+{\n+\tstruct ice_tx_queue *txq = tx_queue;\n+\tuint16_t idx;\n+\tstruct rte_mbuf *mb;\n+\tbool pkt_error = false;\n+\tuint16_t good_pkts = nb_pkts;\n+\tconst char *reason = NULL;\n+\tstruct ice_adapter *adapter = txq->vsi->adapter;\n+\tenum ice_tx_burst_type tx_burst_type =\n+\t\ttxq->vsi->adapter->tx_burst_type;\n+\tuint64_t ol_flags;\n+\n+\tfor (idx = 0; idx < nb_pkts; idx++) {\n+\t\tmb = tx_pkts[idx];\n+\t\tol_flags = mb->ol_flags;\n+\n+\t\tif ((adapter->devargs.mbuf_check & ICE_MBUF_CHECK_F_TX_MBUF) &&\n+\t\t\t(rte_mbuf_check(mb, 0, &reason) != 0)) {\n+\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: %s\\n\", reason);\n+\t\t\tpkt_error = true;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\tif ((adapter->devargs.mbuf_check & ICE_MBUF_CHECK_F_TX_SIZE) &&\n+\t\t\t(mb->data_len > mb->pkt_len ||\n+\t\t\tmb->data_len < ICE_TX_MIN_PKT_LEN ||\n+\t\t\tmb->data_len > ICE_FRAME_SIZE_MAX)) {\n+\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: data_len (%u) is out \"\n+\t\t\t\"of range, reasonable range (%d - %d)\\n\", mb->data_len,\n+\t\t\tICE_TX_MIN_PKT_LEN, ICE_FRAME_SIZE_MAX);\n+\t\t\tpkt_error = true;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\tif (adapter->devargs.mbuf_check & ICE_MBUF_CHECK_F_TX_SEGMENT) {\n+\t\t\tif (!(ol_flags & RTE_MBUF_F_TX_TCP_SEG)) {\n+\t\t\t\t/**\n+\t\t\t\t * No TSO case: nb->segs, pkt_len to not exceed\n+\t\t\t\t * the limites.\n+\t\t\t\t */\n+\t\t\t\tif (mb->nb_segs > ICE_TX_MTU_SEG_MAX) {\n+\t\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: nb_segs (%d) exceeds \"\n+\t\t\t\t\t\"HW limit, maximum allowed value is %d\\n\", mb->nb_segs,\n+\t\t\t\t\tICE_TX_MTU_SEG_MAX);\n+\t\t\t\t\tpkt_error = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t\tif (mb->pkt_len > ICE_FRAME_SIZE_MAX) {\n+\t\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: pkt_len (%d) exceeds \"\n+\t\t\t\t\t\"HW limit, maximum allowed value is %d\\n\", mb->nb_segs,\n+\t\t\t\t\tICE_FRAME_SIZE_MAX);\n+\t\t\t\t\tpkt_error = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t} else if (ol_flags & RTE_MBUF_F_TX_TCP_SEG) {\n+\t\t\t\t/** TSO case: tso_segsz, nb_segs, pkt_len not exceed\n+\t\t\t\t * the limits.\n+\t\t\t\t */\n+\t\t\t\tif (mb->tso_segsz < ICE_MIN_TSO_MSS ||\n+\t\t\t\t\tmb->tso_segsz > ICE_MAX_TSO_MSS) {\n+\t\t\t\t\t/**\n+\t\t\t\t\t * MSS outside the range are considered malicious\n+\t\t\t\t\t */\n+\t\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: tso_segsz (%u) is out \"\n+\t\t\t\t\t\"of range, reasonable range (%d - %u)\\n\", mb->tso_segsz,\n+\t\t\t\t\tICE_MIN_TSO_MSS, ICE_MAX_TSO_MSS);\n+\t\t\t\t\tpkt_error = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t\tif (mb->nb_segs >\n+\t\t\t\t\t((struct ice_tx_queue *)tx_queue)->nb_tx_desc) {\n+\t\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: nb_segs out \"\n+\t\t\t\t\t\"of ring length\\n\");\n+\t\t\t\t\tpkt_error = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (adapter->devargs.mbuf_check & ICE_MBUF_CHECK_F_TX_OFFLOAD) {\n+\t\t\tif (ol_flags & ICE_TX_OFFLOAD_NOTSUP_MASK) {\n+\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: TX offload \"\n+\t\t\t\t\"is not supported\\n\");\n+\t\t\t\tpkt_error = true;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\n+\t\t\tif (!rte_validate_tx_offload(mb)) {\n+\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: TX offload \"\n+\t\t\t\t\"setup error\\n\");\n+\t\t\t\tpkt_error = true;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tif (pkt_error) {\n+\t\ttxq->mbuf_errors++;\n+\t\tgood_pkts = idx;\n+\t\tif (good_pkts == 0)\n+\t\t\treturn 0;\n+\t}\n+\n+\treturn ice_tx_pkt_burst_ops[tx_burst_type](tx_queue,\n+\t\t\t\ttx_pkts, good_pkts);\n+}\n+\n uint16_t\n ice_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,\n \t uint16_t nb_pkts)\n@@ -3746,6 +3872,8 @@ ice_set_tx_function(struct rte_eth_dev *dev)\n {\n \tstruct ice_adapter *ad =\n \t\tICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\tenum ice_tx_burst_type tx_burst_type = ICE_TX_DEFAULT;\n+\tint mbuf_check = ad->devargs.mbuf_check;\n #ifdef RTE_ARCH_X86\n \tstruct ice_tx_queue *txq;\n \tint i;\n@@ -3800,14 +3928,13 @@ ice_set_tx_function(struct rte_eth_dev *dev)\n \t\t\t\tPMD_DRV_LOG(NOTICE,\n \t\t\t\t\t \"Using AVX512 OFFLOAD Vector Tx (port %d).\",\n \t\t\t\t\t dev->data->port_id);\n-\t\t\t\tdev->tx_pkt_burst =\n-\t\t\t\t\tice_xmit_pkts_vec_avx512_offload;\n+\t\t\t\ttx_burst_type = ICE_TX_VEC_AVX512_OFFLOAD;\n \t\t\t\tdev->tx_pkt_prepare = ice_prep_pkts;\n \t\t\t} else {\n \t\t\t\tPMD_DRV_LOG(NOTICE,\n \t\t\t\t\t \"Using AVX512 Vector Tx (port %d).\",\n \t\t\t\t\t dev->data->port_id);\n-\t\t\t\tdev->tx_pkt_burst = ice_xmit_pkts_vec_avx512;\n+\t\t\t\ttx_burst_type = ICE_TX_VEC_AVX512;\n \t\t\t}\n #endif\n \t\t} else {\n@@ -3815,32 +3942,43 @@ ice_set_tx_function(struct rte_eth_dev *dev)\n \t\t\t\tPMD_DRV_LOG(NOTICE,\n \t\t\t\t\t \"Using AVX2 OFFLOAD Vector Tx (port %d).\",\n \t\t\t\t\t dev->data->port_id);\n-\t\t\t\tdev->tx_pkt_burst =\n-\t\t\t\t\tice_xmit_pkts_vec_avx2_offload;\n+\t\t\t\ttx_burst_type = ICE_TX_VEC_AVX2_OFFLOAD;\n \t\t\t\tdev->tx_pkt_prepare = ice_prep_pkts;\n \t\t\t} else {\n \t\t\t\tPMD_DRV_LOG(DEBUG, \"Using %sVector Tx (port %d).\",\n \t\t\t\t\t ad->tx_use_avx2 ? \"avx2 \" : \"\",\n \t\t\t\t\t dev->data->port_id);\n-\t\t\t\tdev->tx_pkt_burst = ad->tx_use_avx2 ?\n-\t\t\t\t\t\t ice_xmit_pkts_vec_avx2 :\n-\t\t\t\t\t\t ice_xmit_pkts_vec;\n+\t\t\t\ttx_burst_type = ad->tx_use_avx2 ?\n+\t\t\t\t\t\t\tICE_TX_VEC_AVX2 : ICE_TX_VEC_SSE;\n \t\t\t}\n \t\t}\n \n+\t\tif (mbuf_check) {\n+\t\t\tad->tx_burst_type = tx_burst_type;\n+\t\t\tdev->tx_pkt_burst = ice_xmit_pkts_check;\n+\t\t} else {\n+\t\t\tdev->tx_pkt_burst = ice_tx_pkt_burst_ops[tx_burst_type];\n+\t\t}\n \t\treturn;\n \t}\n #endif\n \n \tif (ad->tx_simple_allowed) {\n \t\tPMD_INIT_LOG(DEBUG, \"Simple tx finally be used.\");\n-\t\tdev->tx_pkt_burst = ice_xmit_pkts_simple;\n+\t\ttx_burst_type = ICE_TX_SIMPLE;\n \t\tdev->tx_pkt_prepare = NULL;\n \t} else {\n \t\tPMD_INIT_LOG(DEBUG, \"Normal tx finally be used.\");\n-\t\tdev->tx_pkt_burst = ice_xmit_pkts;\n+\t\ttx_burst_type = ICE_TX_DEFAULT;\n \t\tdev->tx_pkt_prepare = ice_prep_pkts;\n \t}\n+\n+\tif (mbuf_check) {\n+\t\tad->tx_burst_type = tx_burst_type;\n+\t\tdev->tx_pkt_burst = ice_xmit_pkts_check;\n+\t} else {\n+\t\tdev->tx_pkt_burst = ice_tx_pkt_burst_ops[tx_burst_type];\n+\t}\n }\n \n static const struct {\ndiff --git a/drivers/net/ice/ice_rxtx.h b/drivers/net/ice/ice_rxtx.h\nindex bd2c4abec9..088ddba600 100644\n--- a/drivers/net/ice/ice_rxtx.h\n+++ b/drivers/net/ice/ice_rxtx.h\n@@ -45,6 +45,25 @@\n \n #define ICE_TX_MIN_PKT_LEN 17\n \n+#define ICE_TX_OFFLOAD_MASK ( \\\n+\t\tRTE_MBUF_F_TX_OUTER_IPV6 |\t \\\n+\t\tRTE_MBUF_F_TX_OUTER_IPV4 |\t \\\n+\t\tRTE_MBUF_F_TX_OUTER_IP_CKSUM | \\\n+\t\tRTE_MBUF_F_TX_VLAN | \\\n+\t\tRTE_MBUF_F_TX_IPV6 |\t\t \\\n+\t\tRTE_MBUF_F_TX_IPV4 |\t\t \\\n+\t\tRTE_MBUF_F_TX_IP_CKSUM | \\\n+\t\tRTE_MBUF_F_TX_L4_MASK | \\\n+\t\tRTE_MBUF_F_TX_IEEE1588_TMST |\t \\\n+\t\tRTE_MBUF_F_TX_TCP_SEG | \\\n+\t\tRTE_MBUF_F_TX_QINQ | \\\n+\t\tRTE_MBUF_F_TX_TUNNEL_MASK |\t \\\n+\t\tRTE_MBUF_F_TX_UDP_SEG |\t \\\n+\t\tRTE_MBUF_F_TX_OUTER_UDP_CKSUM)\n+\n+#define ICE_TX_OFFLOAD_NOTSUP_MASK \\\n+\t\t(RTE_MBUF_F_TX_OFFLOAD_MASK ^ ICE_TX_OFFLOAD_MASK)\n+\n extern uint64_t ice_timestamp_dynflag;\n extern int ice_timestamp_dynfield_offset;\n \n@@ -164,6 +183,7 @@ struct ice_tx_queue {\n \tstruct ice_vsi *vsi; /* the VSI this queue belongs to */\n \tuint16_t tx_next_dd;\n \tuint16_t tx_next_rs;\n+\tuint64_t mbuf_errors;\n \tbool tx_deferred_start; /* don't start this queue in dev start */\n \tbool q_set; /* indicate if tx queue has been configured */\n \tice_tx_release_mbufs_t tx_rel_mbufs;\n", "prefixes": [ "v3" ] }