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GET /api/patches/137660/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 137660,
    "url": "http://patches.dpdk.org/api/patches/137660/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240301094422.460012-1-mingjinx.ye@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20240301094422.460012-1-mingjinx.ye@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20240301094422.460012-1-mingjinx.ye@intel.com",
    "date": "2024-03-01T09:44:21",
    "name": "[v5] net/i40e: add diagnostic support in TX path",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "544eb5f2f72e4de1640fd0a56149023d4f7df682",
    "submitter": {
        "id": 2862,
        "url": "http://patches.dpdk.org/api/people/2862/?format=api",
        "name": "Mingjin Ye",
        "email": "mingjinx.ye@intel.com"
    },
    "delegate": null,
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240301094422.460012-1-mingjinx.ye@intel.com/mbox/",
    "series": [
        {
            "id": 31326,
            "url": "http://patches.dpdk.org/api/series/31326/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31326",
            "date": "2024-03-01T09:44:21",
            "name": "[v5] net/i40e: add diagnostic support in TX path",
            "version": 5,
            "mbox": "http://patches.dpdk.org/series/31326/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/137660/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/137660/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
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            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A8B5343BCD;\n\tFri,  1 Mar 2024 11:02:52 +0100 (CET)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 30A614026C;\n\tFri,  1 Mar 2024 11:02:52 +0100 (CET)",
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            "from orviesa002.jf.intel.com ([10.64.159.142])\n by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 01 Mar 2024 02:02:49 -0800",
            "from unknown (HELO localhost.localdomain) ([10.239.252.253])\n by orviesa002-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 01 Mar 2024 02:02:46 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1709287370; x=1740823370;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=Y8LWRiQ+9rbiEX2Mqjrqv8Ql/WymqpE0rPJ9fH6kdKA=;\n b=iYANdZlpXMlUsWPyt9G8A+vBmGws2LnnlTp+fv0ymB9YkZiMmbW0nC+f\n n8E1mhpqV7SIELf/PFKYznulf+aZeiC2GADFRbYj8wGekQh72wpw0HjBx\n 4HfIB0OYjHg/+FuMc6arKj0tkM95cO6vuXTRDiA+aZimlHygzJLTypdvb\n M9aiMGWa7ZxlteOvQSers2QAB2TihtLCdxSIkeB/HTcKwHfQUMFKtDFZy\n +VEkujLnQfAh0QmEOccBLEL0Lb0VzcHPbLF502tHOpPvL/tsz/BvWfvzR\n kCfCVTqpQwsj+rbkGC08ZPYdTfOC3JgJd88MRmjv2ANTHuxUXEWBr7MhN A==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6600,9927,10999\"; a=\"14964454\"",
            "E=Sophos;i=\"6.06,195,1705392000\"; d=\"scan'208\";a=\"14964454\"",
            "E=Sophos;i=\"6.06,195,1705392000\"; d=\"scan'208\";a=\"39002590\""
        ],
        "X-ExtLoop1": "1",
        "From": "Mingjin Ye <mingjinx.ye@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "Mingjin Ye <mingjinx.ye@intel.com>, Yuying Zhang <Yuying.Zhang@intel.com>,\n Beilei Xing <beilei.xing@intel.com>",
        "Subject": "[PATCH v5] net/i40e: add diagnostic support in TX path",
        "Date": "Fri,  1 Mar 2024 09:44:21 +0000",
        "Message-Id": "<20240301094422.460012-1-mingjinx.ye@intel.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20240105095956.2402477-1-mingjinx.ye@intel.com>",
        "References": "<20240105095956.2402477-1-mingjinx.ye@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Implemented a Tx wrapper to perform a thorough check on mbufs,\ncategorizing and counting invalid cases by types for diagnostic\npurposes. The count of invalid cases is accessible through xstats_get.\n\nAlso, the devarg option \"mbuf_check\" was introduced to configure the\ndiagnostic parameters to enable the appropriate diagnostic features.\n\nsupported cases: mbuf, size, segment, offload.\n 1. mbuf: check for corrupted mbuf.\n 2. size: check min/max packet length according to hw spec.\n 3. segment: check number of mbuf segments not exceed hw limitation.\n 4. offload: check any unsupported offload flag.\n\nparameter format: \"mbuf_check=<case>\" or \"mbuf_check=[<case1>,<case2>]\"\neg: dpdk-testpmd -a 0000:81:01.0,mbuf_check=[mbuf,size] -- -i\n\nSigned-off-by: Mingjin Ye <mingjinx.ye@intel.com>\n---\nv2: remove strict.\n---\nv3: optimised.\n---\nv4: rebase.\n---\nv5: fix ci error.\n---\n doc/guides/nics/i40e.rst       |  13 +++\n drivers/net/i40e/i40e_ethdev.c | 138 ++++++++++++++++++++++++++++-\n drivers/net/i40e/i40e_ethdev.h |  28 ++++++\n drivers/net/i40e/i40e_rxtx.c   | 153 +++++++++++++++++++++++++++++++--\n drivers/net/i40e/i40e_rxtx.h   |   2 +\n 5 files changed, 326 insertions(+), 8 deletions(-)",
    "diff": "diff --git a/doc/guides/nics/i40e.rst b/doc/guides/nics/i40e.rst\nindex 15689ac958..bf1d1e5d60 100644\n--- a/doc/guides/nics/i40e.rst\n+++ b/doc/guides/nics/i40e.rst\n@@ -275,6 +275,19 @@ Runtime Configuration\n \n   -a 84:00.0,vf_msg_cfg=80@120:180\n \n+- ``Support TX diagnostics`` (default ``not enabled``)\n+\n+  Set the ``devargs`` parameter ``mbuf_check`` to enable TX diagnostics. For example,\n+  ``-a 18:01.0,mbuf_check=<case>`` or ``-a 18:01.0,mbuf_check=[<case1>,<case2>...]``. Also,\n+  ``xstats_get`` can be used to get the error counts, which are collected in\n+  ``tx_mbuf_error_packets`` xstats. For example, ``testpmd> show port xstats all``.\n+  Supported cases:\n+\n+  *   mbuf: Check for corrupted mbuf.\n+  *   size: Check min/max packet length according to hw spec.\n+  *   segment: Check number of mbuf segments not exceed hw limitation.\n+  *   offload: Check any unsupported offload flag.\n+\n Vector RX Pre-conditions\n ~~~~~~~~~~~~~~~~~~~~~~~~\n For Vector RX it is assumed that the number of descriptor rings will be a power\ndiff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex 3ca226156b..f23f80fd16 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -48,6 +48,7 @@\n #define ETH_I40E_SUPPORT_MULTI_DRIVER\t\"support-multi-driver\"\n #define ETH_I40E_QUEUE_NUM_PER_VF_ARG\t\"queue-num-per-vf\"\n #define ETH_I40E_VF_MSG_CFG\t\t\"vf_msg_cfg\"\n+#define ETH_I40E_MBUF_CHECK_ARG       \"mbuf_check\"\n \n #define I40E_CLEAR_PXE_WAIT_MS     200\n #define I40E_VSI_TSR_QINQ_STRIP\t\t0x4010\n@@ -412,6 +413,7 @@ static const char *const valid_keys[] = {\n \tETH_I40E_SUPPORT_MULTI_DRIVER,\n \tETH_I40E_QUEUE_NUM_PER_VF_ARG,\n \tETH_I40E_VF_MSG_CFG,\n+\tETH_I40E_MBUF_CHECK_ARG,\n \tNULL};\n \n static const struct rte_pci_id pci_id_i40e_map[] = {\n@@ -545,6 +547,14 @@ static const struct rte_i40e_xstats_name_off rte_i40e_stats_strings[] = {\n #define I40E_NB_ETH_XSTATS (sizeof(rte_i40e_stats_strings) / \\\n \t\tsizeof(rte_i40e_stats_strings[0]))\n \n+static const struct rte_i40e_xstats_name_off i40e_mbuf_strings[] = {\n+\t{\"tx_mbuf_error_packets\", offsetof(struct i40e_mbuf_stats,\n+\t\ttx_pkt_errors)},\n+};\n+\n+#define I40E_NB_MBUF_XSTATS (sizeof(i40e_mbuf_strings) / \\\n+\t\tsizeof(i40e_mbuf_strings[0]))\n+\n static const struct rte_i40e_xstats_name_off rte_i40e_hw_port_strings[] = {\n \t{\"tx_link_down_dropped\", offsetof(struct i40e_hw_port_stats,\n \t\ttx_dropped_link_down)},\n@@ -1373,6 +1383,88 @@ read_vf_msg_config(__rte_unused const char *key,\n \treturn 0;\n }\n \n+static int\n+read_mbuf_check_config(__rte_unused const char *key, const char *value, void *args)\n+{\n+\tchar *cur;\n+\tchar *tmp;\n+\tint str_len;\n+\tint valid_len;\n+\n+\tint ret = 0;\n+\tuint64_t *mc_flags = args;\n+\tchar *str2 = strdup(value);\n+\tif (str2 == NULL)\n+\t\treturn -1;\n+\n+\tstr_len = strlen(str2);\n+\tif (str2[0] == '[' && str2[str_len - 1] == ']') {\n+\t\tif (str_len < 3) {\n+\t\t\tret = -1;\n+\t\t\tgoto mdd_end;\n+\t\t}\n+\t\tvalid_len = str_len - 2;\n+\t\tmemmove(str2, str2 + 1, valid_len);\n+\t\tmemset(str2 + valid_len, '\\0', 2);\n+\t}\n+\tcur = strtok_r(str2, \",\", &tmp);\n+\twhile (cur != NULL) {\n+\t\tif (!strcmp(cur, \"mbuf\"))\n+\t\t\t*mc_flags |= I40E_MBUF_CHECK_F_TX_MBUF;\n+\t\telse if (!strcmp(cur, \"size\"))\n+\t\t\t*mc_flags |= I40E_MBUF_CHECK_F_TX_SIZE;\n+\t\telse if (!strcmp(cur, \"segment\"))\n+\t\t\t*mc_flags |= I40E_MBUF_CHECK_F_TX_SEGMENT;\n+\t\telse if (!strcmp(cur, \"offload\"))\n+\t\t\t*mc_flags |= I40E_MBUF_CHECK_F_TX_OFFLOAD;\n+\t\telse\n+\t\t\tPMD_DRV_LOG(ERR, \"Unsupported mdd check type: %s\", cur);\n+\t\tcur = strtok_r(NULL, \",\", &tmp);\n+\t}\n+\n+mdd_end:\n+\tfree(str2);\n+\treturn ret;\n+}\n+\n+static int\n+i40e_parse_mbuf_check(struct rte_eth_dev *dev)\n+{\n+\tstruct i40e_adapter *ad =\n+\t\tI40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\tstruct rte_kvargs *kvlist;\n+\tint kvargs_count;\n+\tint ret = 0;\n+\n+\tif (!dev->device->devargs)\n+\t\treturn ret;\n+\n+\tkvlist = rte_kvargs_parse(dev->device->devargs->args, valid_keys);\n+\tif (!kvlist)\n+\t\treturn -EINVAL;\n+\n+\tkvargs_count = rte_kvargs_count(kvlist, ETH_I40E_MBUF_CHECK_ARG);\n+\tif (!kvargs_count)\n+\t\tgoto free_end;\n+\n+\tif (kvargs_count > 1)\n+\t\tPMD_DRV_LOG(WARNING, \"More than one argument \\\"%s\\\" and only \"\n+\t\t\t    \"the first invalid or last valid one is used !\",\n+\t\t\t    ETH_I40E_MBUF_CHECK_ARG);\n+\n+\tret = rte_kvargs_process(kvlist, ETH_I40E_MBUF_CHECK_ARG,\n+\t\t\t\tread_mbuf_check_config, &ad->mc_flags);\n+\tif (ret)\n+\t\tgoto free_end;\n+\n+\tif (ad->mc_flags)\n+\t\tad->devargs.mbuf_check = 1;\n+\n+free_end:\n+\trte_kvargs_free(kvlist);\n+\treturn ret;\n+}\n+\n static int\n i40e_parse_vf_msg_config(struct rte_eth_dev *dev,\n \t\tstruct i40e_vf_msg_cfg *msg_cfg)\n@@ -1488,6 +1580,7 @@ eth_i40e_dev_init(struct rte_eth_dev *dev, void *init_params __rte_unused)\n \t}\n \n \ti40e_parse_vf_msg_config(dev, &pf->vf_msg_cfg);\n+\ti40e_parse_mbuf_check(dev);\n \t/* Check if need to support multi-driver */\n \ti40e_support_multi_driver(dev);\n \n@@ -2324,6 +2417,8 @@ i40e_dev_start(struct rte_eth_dev *dev)\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n \tstruct i40e_vsi *main_vsi = pf->main_vsi;\n+\tstruct i40e_adapter *ad =\n+\t\tI40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n \tint ret, i;\n \tstruct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);\n \tstruct rte_intr_handle *intr_handle = pci_dev->intr_handle;\n@@ -2483,6 +2578,7 @@ i40e_dev_start(struct rte_eth_dev *dev)\n \tmax_frame_size = dev->data->mtu ?\n \t\tdev->data->mtu + I40E_ETH_OVERHEAD :\n \t\tI40E_FRAME_SIZE_MAX;\n+\tad->max_pkt_len = max_frame_size;\n \n \t/* Set the max frame size to HW*/\n \ti40e_aq_set_mac_config(hw, max_frame_size, TRUE, false, 0, NULL);\n@@ -3502,13 +3598,17 @@ i40e_dev_stats_reset(struct rte_eth_dev *dev)\n \t/* read the stats, reading current register values into offset */\n \ti40e_read_stats_registers(pf, hw);\n \n+\tmemset(&pf->mbuf_stats, 0,\n+\t\tsizeof(struct i40e_mbuf_stats));\n+\n \treturn 0;\n }\n \n static uint32_t\n i40e_xstats_calc_num(void)\n {\n-\treturn I40E_NB_ETH_XSTATS + I40E_NB_HW_PORT_XSTATS +\n+\treturn I40E_NB_ETH_XSTATS + I40E_NB_MBUF_XSTATS +\n+\t\tI40E_NB_HW_PORT_XSTATS +\n \t\t(I40E_NB_RXQ_PRIO_XSTATS * 8) +\n \t\t(I40E_NB_TXQ_PRIO_XSTATS * 8);\n }\n@@ -3533,6 +3633,14 @@ static int i40e_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,\n \t\tcount++;\n \t}\n \n+\t/* Get stats from i40e_mbuf_stats struct */\n+\tfor (i = 0; i < I40E_NB_MBUF_XSTATS; i++) {\n+\t\tstrlcpy(xstats_names[count].name,\n+\t\t\ti40e_mbuf_strings[i].name,\n+\t\t\tsizeof(xstats_names[count].name));\n+\t\tcount++;\n+\t}\n+\n \t/* Get individual stats from i40e_hw_port struct */\n \tfor (i = 0; i < I40E_NB_HW_PORT_XSTATS; i++) {\n \t\tstrlcpy(xstats_names[count].name,\n@@ -3563,12 +3671,28 @@ static int i40e_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,\n \treturn count;\n }\n \n+static void\n+i40e_dev_update_mbuf_stats(struct rte_eth_dev *ethdev,\n+\t\tstruct i40e_mbuf_stats *mbuf_stats)\n+{\n+\tuint16_t idx;\n+\tstruct i40e_tx_queue *txq;\n+\n+\tfor (idx = 0; idx < ethdev->data->nb_tx_queues; idx++) {\n+\t\ttxq = ethdev->data->tx_queues[idx];\n+\t\tmbuf_stats->tx_pkt_errors += txq->mbuf_errors;\n+\t}\n+}\n+\n static int\n i40e_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,\n \t\t    unsigned n)\n {\n \tstruct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n \tstruct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);\n+\tstruct i40e_adapter *adapter =\n+\t\tI40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\tstruct i40e_mbuf_stats mbuf_stats = {0};\n \tunsigned i, count, prio;\n \tstruct i40e_hw_port_stats *hw_stats = &pf->stats;\n \n@@ -3583,6 +3707,9 @@ i40e_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,\n \n \tcount = 0;\n \n+\tif (adapter->devargs.mbuf_check)\n+\t\ti40e_dev_update_mbuf_stats(dev, &mbuf_stats);\n+\n \t/* Get stats from i40e_eth_stats struct */\n \tfor (i = 0; i < I40E_NB_ETH_XSTATS; i++) {\n \t\txstats[count].value = *(uint64_t *)(((char *)&hw_stats->eth) +\n@@ -3591,6 +3718,15 @@ i40e_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,\n \t\tcount++;\n \t}\n \n+\t/* Get stats from i40e_mbuf_stats struct */\n+\tfor (i = 0; i < I40E_NB_MBUF_XSTATS; i++) {\n+\t\txstats[count].value =\n+\t\t\t*(uint64_t *)((char *)&mbuf_stats +\n+\t\t\t\t\ti40e_mbuf_strings[i].offset);\n+\t\txstats[count].id = count;\n+\t\tcount++;\n+\t}\n+\n \t/* Get individual stats from i40e_hw_port struct */\n \tfor (i = 0; i < I40E_NB_HW_PORT_XSTATS; i++) {\n \t\txstats[count].value = *(uint64_t *)(((char *)hw_stats) +\ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex 1bbe7ad376..41f9aab6ce 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -1108,6 +1108,10 @@ struct i40e_vf_msg_cfg {\n \tuint32_t ignore_second;\n };\n \n+struct i40e_mbuf_stats {\n+\tuint64_t tx_pkt_errors;\n+};\n+\n /*\n  * Structure to store private data specific for PF instance.\n  */\n@@ -1122,6 +1126,7 @@ struct i40e_pf {\n \n \tstruct i40e_hw_port_stats stats_offset;\n \tstruct i40e_hw_port_stats stats;\n+\tstruct i40e_mbuf_stats mbuf_stats;\n \tu64 rx_err1;\t/* rxerr1 */\n \tu64 rx_err1_offset;\n \n@@ -1224,6 +1229,25 @@ struct i40e_vsi_vlan_pvid_info {\n #define I40E_MAX_PKT_TYPE  256\n #define I40E_FLOW_TYPE_MAX 64\n \n+#define I40E_MBUF_CHECK_F_TX_MBUF        (1ULL << 0)\n+#define I40E_MBUF_CHECK_F_TX_SIZE        (1ULL << 1)\n+#define I40E_MBUF_CHECK_F_TX_SEGMENT     (1ULL << 2)\n+#define I40E_MBUF_CHECK_F_TX_OFFLOAD     (1ULL << 3)\n+\n+enum i40e_tx_burst_type {\n+\tI40E_TX_DEFAULT,\n+\tI40E_TX_SIMPLE,\n+\tI40E_TX_SSE,\n+\tI40E_TX_AVX2,\n+\tI40E_TX_AVX512,\n+};\n+\n+/**\n+ * Cache devargs parse result.\n+ */\n+struct i40e_devargs {\n+\tint mbuf_check;\n+};\n /*\n  * Structure to store private data for each PF/VF instance.\n  */\n@@ -1240,6 +1264,10 @@ struct i40e_adapter {\n \tbool tx_simple_allowed;\n \tbool tx_vec_allowed;\n \n+\tstruct i40e_devargs devargs;\n+\tuint64_t mc_flags; /* mbuf check flags. */\n+\tuint16_t max_pkt_len; /* Maximum packet length */\n+\tenum i40e_tx_burst_type tx_burst_type;\n \t/* For PTP */\n \tstruct rte_timecounter systime_tc;\n \tstruct rte_timecounter rx_tstamp_tc;\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 9aa5facb53..a34fb4d401 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -1536,6 +1536,138 @@ i40e_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,\n \treturn nb_tx;\n }\n \n+static\n+const eth_tx_burst_t i40e_tx_pkt_burst_ops[] = {\n+\t[I40E_TX_DEFAULT] = i40e_xmit_pkts,\n+\t[I40E_TX_SIMPLE] = i40e_xmit_pkts_simple,\n+\t[I40E_TX_SSE] = i40e_xmit_pkts_vec,\n+#ifdef RTE_ARCH_X86\n+\t[I40E_TX_AVX2] = i40e_xmit_pkts_vec_avx2,\n+#ifdef CC_AVX512_SUPPORT\n+\t[I40E_TX_AVX512] = i40e_xmit_pkts_vec_avx512,\n+#endif\n+#endif\n+};\n+\n+/* Tx mbuf check */\n+static uint16_t\n+i40e_xmit_pkts_check(void *tx_queue, struct rte_mbuf **tx_pkts,\n+\t      uint16_t nb_pkts)\n+{\n+\tstruct i40e_tx_queue *txq = tx_queue;\n+\tuint16_t idx;\n+\tuint64_t ol_flags;\n+\tstruct rte_mbuf *mb;\n+\tbool pkt_error = false;\n+\tconst char *reason = NULL;\n+\tuint16_t good_pkts = nb_pkts;\n+\tstruct i40e_adapter *adapter = txq->vsi->adapter;\n+\tenum i40e_tx_burst_type tx_burst_type =\n+\t\ttxq->vsi->adapter->tx_burst_type;\n+\n+\n+\tfor (idx = 0; idx < nb_pkts; idx++) {\n+\t\tmb = tx_pkts[idx];\n+\t\tol_flags = mb->ol_flags;\n+\n+\t\tif ((adapter->mc_flags & I40E_MBUF_CHECK_F_TX_MBUF) &&\n+\t\t\t(rte_mbuf_check(mb, 0, &reason) != 0)) {\n+\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: %s\\n\", reason);\n+\t\t\tpkt_error = true;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\tif ((adapter->mc_flags & I40E_MBUF_CHECK_F_TX_SIZE) &&\n+\t\t\t(mb->data_len > mb->pkt_len ||\n+\t\t\tmb->data_len < I40E_TX_MIN_PKT_LEN ||\n+\t\t\tmb->data_len > adapter->max_pkt_len)) {\n+\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: data_len (%u) is out \"\n+\t\t\t\"of range, reasonable range (%d - %u)\\n\", mb->data_len,\n+\t\t\tI40E_TX_MIN_PKT_LEN, adapter->max_pkt_len);\n+\t\t\tpkt_error = true;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\tif (adapter->mc_flags & I40E_MBUF_CHECK_F_TX_SEGMENT) {\n+\t\t\tif (!(ol_flags & RTE_MBUF_F_TX_TCP_SEG)) {\n+\t\t\t\t/**\n+\t\t\t\t * No TSO case: nb->segs, pkt_len to not exceed\n+\t\t\t\t * the limites.\n+\t\t\t\t */\n+\t\t\t\tif (mb->nb_segs > I40E_TX_MAX_MTU_SEG) {\n+\t\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: nb_segs (%d) exceeds \"\n+\t\t\t\t\t\"HW limit, maximum allowed value is %d\\n\", mb->nb_segs,\n+\t\t\t\t\tI40E_TX_MAX_MTU_SEG);\n+\t\t\t\t\tpkt_error = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t\tif (mb->pkt_len > I40E_FRAME_SIZE_MAX) {\n+\t\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: pkt_len (%d) exceeds \"\n+\t\t\t\t\t\"HW limit, maximum allowed value is %d\\n\", mb->nb_segs,\n+\t\t\t\t\tI40E_FRAME_SIZE_MAX);\n+\t\t\t\t\tpkt_error = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t} else if (ol_flags & RTE_MBUF_F_TX_TCP_SEG) {\n+\t\t\t\t/** TSO case: tso_segsz, nb_segs, pkt_len not exceed\n+\t\t\t\t * the limits.\n+\t\t\t\t */\n+\t\t\t\tif (mb->tso_segsz < I40E_MIN_TSO_MSS ||\n+\t\t\t\t\tmb->tso_segsz > I40E_MAX_TSO_MSS) {\n+\t\t\t\t\t/**\n+\t\t\t\t\t * MSS outside the range are considered malicious\n+\t\t\t\t\t */\n+\t\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: tso_segsz (%u) is out \"\n+\t\t\t\t\t\"of range, reasonable range (%d - %u)\\n\", mb->tso_segsz,\n+\t\t\t\t\tI40E_MIN_TSO_MSS, I40E_MAX_TSO_MSS);\n+\t\t\t\t\tpkt_error = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t\tif (mb->nb_segs >\n+\t\t\t\t\t((struct i40e_tx_queue *)tx_queue)->nb_tx_desc) {\n+\t\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: nb_segs out \"\n+\t\t\t\t\t\"of ring length\\n\");\n+\t\t\t\t\tpkt_error = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t\tif (mb->pkt_len > I40E_TSO_FRAME_SIZE_MAX) {\n+\t\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: pkt_len (%d) exceeds \"\n+\t\t\t\t\t\"HW limit, maximum allowed value is %d\\n\", mb->nb_segs,\n+\t\t\t\t\tI40E_TSO_FRAME_SIZE_MAX);\n+\t\t\t\t\tpkt_error = true;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (adapter->mc_flags & I40E_MBUF_CHECK_F_TX_OFFLOAD) {\n+\t\t\tif (ol_flags & I40E_TX_OFFLOAD_NOTSUP_MASK) {\n+\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: TX offload \"\n+\t\t\t\t\"is not supported\\n\");\n+\t\t\t\tpkt_error = true;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\n+\t\t\tif (!rte_validate_tx_offload(mb)) {\n+\t\t\t\tPMD_TX_LOG(ERR, \"INVALID mbuf: TX offload \"\n+\t\t\t\t\"setup error\\n\");\n+\t\t\t\tpkt_error = true;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tif (pkt_error) {\n+\t\ttxq->mbuf_errors++;\n+\t\tgood_pkts = idx;\n+\t\tif (good_pkts == 0)\n+\t\t\treturn 0;\n+\t}\n+\n+\treturn i40e_tx_pkt_burst_ops[tx_burst_type](tx_queue,\n+\t\t\t\t\t\t\t\ttx_pkts, good_pkts);\n+}\n+\n /*********************************************************************\n  *\n  *  TX simple prep functions\n@@ -3467,6 +3599,8 @@ i40e_set_tx_function(struct rte_eth_dev *dev)\n {\n \tstruct i40e_adapter *ad =\n \t\tI40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\tenum i40e_tx_burst_type tx_burst_type = I40E_TX_DEFAULT;\n+\tint mbuf_check = ad->devargs.mbuf_check;\n \tint i;\n \n \tif (rte_eal_process_type() == RTE_PROC_PRIMARY) {\n@@ -3501,34 +3635,39 @@ i40e_set_tx_function(struct rte_eth_dev *dev)\n #ifdef CC_AVX512_SUPPORT\n \t\t\t\tPMD_DRV_LOG(NOTICE, \"Using AVX512 Vector Tx (port %d).\",\n \t\t\t\t\t    dev->data->port_id);\n-\t\t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_vec_avx512;\n+\t\t\t\ttx_burst_type = I40E_TX_AVX512;\n #endif\n \t\t\t} else {\n \t\t\t\tPMD_INIT_LOG(DEBUG, \"Using %sVector Tx (port %d).\",\n \t\t\t\t\t     ad->tx_use_avx2 ? \"avx2 \" : \"\",\n \t\t\t\t\t     dev->data->port_id);\n-\t\t\t\tdev->tx_pkt_burst = ad->tx_use_avx2 ?\n-\t\t\t\t\t\t    i40e_xmit_pkts_vec_avx2 :\n-\t\t\t\t\t\t    i40e_xmit_pkts_vec;\n+\t\t\t\ttx_burst_type = ad->tx_use_avx2 ? I40E_TX_AVX2 : I40E_TX_SSE;\n \t\t\t\tdev->recycle_tx_mbufs_reuse = i40e_recycle_tx_mbufs_reuse_vec;\n \t\t\t}\n #else /* RTE_ARCH_X86 */\n \t\t\tPMD_INIT_LOG(DEBUG, \"Using Vector Tx (port %d).\",\n \t\t\t\t     dev->data->port_id);\n-\t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_vec;\n+\t\t\ttx_burst_type = I40E_TX_SSE;\n \t\t\tdev->recycle_tx_mbufs_reuse = i40e_recycle_tx_mbufs_reuse_vec;\n #endif /* RTE_ARCH_X86 */\n \t\t} else {\n \t\t\tPMD_INIT_LOG(DEBUG, \"Simple tx finally be used.\");\n-\t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_simple;\n+\t\t\ttx_burst_type = I40E_TX_SIMPLE;\n \t\t\tdev->recycle_tx_mbufs_reuse = i40e_recycle_tx_mbufs_reuse_vec;\n \t\t}\n \t\tdev->tx_pkt_prepare = i40e_simple_prep_pkts;\n \t} else {\n \t\tPMD_INIT_LOG(DEBUG, \"Xmit tx finally be used.\");\n-\t\tdev->tx_pkt_burst = i40e_xmit_pkts;\n+\t\ttx_burst_type = I40E_TX_DEFAULT;\n \t\tdev->tx_pkt_prepare = i40e_prep_pkts;\n \t}\n+\n+\tif (mbuf_check) {\n+\t\tad->tx_burst_type = tx_burst_type;\n+\t\tdev->tx_pkt_burst = i40e_xmit_pkts_check;\n+\t} else {\n+\t\tdev->tx_pkt_burst = i40e_tx_pkt_burst_ops[tx_burst_type];\n+\t}\n }\n \n static const struct {\ndiff --git a/drivers/net/i40e/i40e_rxtx.h b/drivers/net/i40e/i40e_rxtx.h\nindex b191f23e1f..818bf9d859 100644\n--- a/drivers/net/i40e/i40e_rxtx.h\n+++ b/drivers/net/i40e/i40e_rxtx.h\n@@ -167,6 +167,8 @@ struct i40e_tx_queue {\n \tuint16_t tx_next_dd;\n \tuint16_t tx_next_rs;\n \tbool q_set; /**< indicate if tx queue has been configured */\n+\tuint64_t mbuf_errors;\n+\n \tbool tx_deferred_start; /**< don't start this queue in dev start */\n \tuint8_t dcb_tc;         /**< Traffic class of tx queue */\n \tuint64_t offloads; /**< Tx offload flags of RTE_ETH_TX_OFFLOAD_* */\n",
    "prefixes": [
        "v5"
    ]
}