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GET /api/patches/137387/?format=api
{ "id": 137387, "url": "http://patches.dpdk.org/api/patches/137387/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240227191550.137687-14-hkalra@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240227191550.137687-14-hkalra@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240227191550.137687-14-hkalra@marvell.com", "date": "2024-02-27T19:15:40", "name": "[v4,13/23] net/cnxk: representor ethdev ops", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "9159b884990c0cb60e6c1678dfaa762702ca9628", "submitter": { "id": 1182, "url": "http://patches.dpdk.org/api/people/1182/?format=api", "name": "Harman Kalra", "email": "hkalra@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240227191550.137687-14-hkalra@marvell.com/mbox/", "series": [ { "id": 31259, "url": "http://patches.dpdk.org/api/series/31259/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31259", "date": "2024-02-27T19:15:27", "name": "net/cnxk: support for port representors", "version": 4, "mbox": "http://patches.dpdk.org/series/31259/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/137387/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/137387/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 68EB243C06;\n\tTue, 27 Feb 2024 20:17:55 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2313742F69;\n\tTue, 27 Feb 2024 20:16:58 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 6B2FF42EC7\n for <dev@dpdk.org>; Tue, 27 Feb 2024 20:16:52 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id\n 41RFgbD0005488 for <dev@dpdk.org>; Tue, 27 Feb 2024 11:16:51 -0800", "from dc6wp-exch02.marvell.com ([4.21.29.225])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3whjm694nd-3\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 27 Feb 2024 11:16:51 -0800 (PST)", "from DC6WP-EXCH02.marvell.com (10.76.176.209) by\n DC6WP-EXCH02.marvell.com (10.76.176.209) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.1258.12; Tue, 27 Feb 2024 11:16:43 -0800", "from maili.marvell.com (10.69.176.80) by DC6WP-EXCH02.marvell.com\n (10.76.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend\n Transport; Tue, 27 Feb 2024 11:16:43 -0800", "from localhost.localdomain (unknown [10.29.52.211])\n by maili.marvell.com (Postfix) with ESMTP id C02713F719D;\n Tue, 27 Feb 2024 11:16:40 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-type; s=pfpt0220; bh=K1xbwWLEwikYfz8Iy/H16\n WbYK0z8+pixdjGJACvzwnA=; b=Du026vl0fZHIiODwykZkiCV6HalMkQhDA8PPb\n bQrxycpDxwszsYwi7nrR32uiKbXG7ErOkha09wDAe7XA14gDomXLeXxYzaJfrn8T\n ywdRy5EVnbZpdlTs+Zf9D7STKgXNu+wqQMyAcdJoCx/XR9wPaNc6PcUe+9LdfphT\n Di7kCZoDrgp9bIkg1M4bE+WzzU+m20q3cMBogOLJ1e09/nVmx2bgC9achRDuMMFH\n qa9olPhYxNsIZs9eeb0u/wSRANPkt1zGFi0fg686XE6RXzBsdeiJTHJJg8oNpc1a\n 5IjA38L61d/K2wU9tTa3VxY5Isg5hxPE7eh6KpCk0Ofeq1wQg==", "From": "Harman Kalra <hkalra@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Harman Kalra <hkalra@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH v4 13/23] net/cnxk: representor ethdev ops", "Date": "Wed, 28 Feb 2024 00:45:40 +0530", "Message-ID": "<20240227191550.137687-14-hkalra@marvell.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20240227191550.137687-1-hkalra@marvell.com>", "References": "<20230811163419.165790-1-hkalra@marvell.com>\n <20240227191550.137687-1-hkalra@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "pAIT0Jol1BxyLapDMvMZrns6yHfikj-m", "X-Proofpoint-GUID": "pAIT0Jol1BxyLapDMvMZrns6yHfikj-m", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-02-27_06,2024-02-27_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Implementing ethernet device operation callbacks for\nport representors PMD\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n drivers/net/cnxk/cnxk_rep.c | 28 +-\n drivers/net/cnxk/cnxk_rep.h | 35 +++\n drivers/net/cnxk/cnxk_rep_msg.h | 8 +\n drivers/net/cnxk/cnxk_rep_ops.c | 495 ++++++++++++++++++++++++++++++--\n 4 files changed, 523 insertions(+), 43 deletions(-)", "diff": "diff --git a/drivers/net/cnxk/cnxk_rep.c b/drivers/net/cnxk/cnxk_rep.c\nindex dc00cdecc1..ca0637bde5 100644\n--- a/drivers/net/cnxk/cnxk_rep.c\n+++ b/drivers/net/cnxk/cnxk_rep.c\n@@ -73,6 +73,8 @@ cnxk_rep_state_update(struct cnxk_eswitch_dev *eswitch_dev, uint16_t hw_func, ui\n int\n cnxk_rep_dev_uninit(struct rte_eth_dev *ethdev)\n {\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\n \tif (rte_eal_process_type() != RTE_PROC_PRIMARY)\n \t\treturn 0;\n \n@@ -80,6 +82,8 @@ cnxk_rep_dev_uninit(struct rte_eth_dev *ethdev)\n \trte_free(ethdev->data->mac_addrs);\n \tethdev->data->mac_addrs = NULL;\n \n+\trep_dev->parent_dev->repr_cnt.nb_repr_probed--;\n+\n \treturn 0;\n }\n \n@@ -432,26 +436,6 @@ cnxk_rep_parent_setup(struct cnxk_eswitch_dev *eswitch_dev)\n \treturn rc;\n }\n \n-static uint16_t\n-cnxk_rep_tx_burst(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n-{\n-\tPLT_SET_USED(tx_queue);\n-\tPLT_SET_USED(tx_pkts);\n-\tPLT_SET_USED(nb_pkts);\n-\n-\treturn 0;\n-}\n-\n-static uint16_t\n-cnxk_rep_rx_burst(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n-{\n-\tPLT_SET_USED(rx_queue);\n-\tPLT_SET_USED(rx_pkts);\n-\tPLT_SET_USED(nb_pkts);\n-\n-\treturn 0;\n-}\n-\n static int\n cnxk_rep_dev_init(struct rte_eth_dev *eth_dev, void *params)\n {\n@@ -481,8 +465,8 @@ cnxk_rep_dev_init(struct rte_eth_dev *eth_dev, void *params)\n \teth_dev->dev_ops = &cnxk_rep_dev_ops;\n \n \t/* Rx/Tx functions stubs to avoid crashing */\n-\teth_dev->rx_pkt_burst = cnxk_rep_rx_burst;\n-\teth_dev->tx_pkt_burst = cnxk_rep_tx_burst;\n+\teth_dev->rx_pkt_burst = cnxk_rep_rx_burst_dummy;\n+\teth_dev->tx_pkt_burst = cnxk_rep_tx_burst_dummy;\n \n \t/* Only single queues for representor devices */\n \teth_dev->data->nb_rx_queues = 1;\ndiff --git a/drivers/net/cnxk/cnxk_rep.h b/drivers/net/cnxk/cnxk_rep.h\nindex 5a85d4376e..6a43259980 100644\n--- a/drivers/net/cnxk/cnxk_rep.h\n+++ b/drivers/net/cnxk/cnxk_rep.h\n@@ -7,6 +7,13 @@\n #ifndef __CNXK_REP_H__\n #define __CNXK_REP_H__\n \n+#define CNXK_REP_TX_OFFLOAD_CAPA \\\n+\t(RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE | RTE_ETH_TX_OFFLOAD_VLAN_INSERT | \\\n+\t RTE_ETH_TX_OFFLOAD_MULTI_SEGS)\n+\n+#define CNXK_REP_RX_OFFLOAD_CAPA \\\n+\t(RTE_ETH_RX_OFFLOAD_SCATTER | RTE_ETH_RX_OFFLOAD_RSS_HASH | RTE_ETH_RX_OFFLOAD_VLAN_STRIP)\n+\n /* Common ethdev ops */\n extern struct eth_dev_ops cnxk_rep_dev_ops;\n \n@@ -58,12 +65,33 @@ struct cnxk_rep_dev {\n \tuint16_t repte_mtu;\n };\n \n+/* Inline functions */\n+static inline void\n+cnxk_rep_lock(struct cnxk_rep_dev *rep)\n+{\n+\trte_spinlock_lock(&rep->parent_dev->rep_lock);\n+}\n+\n+static inline void\n+cnxk_rep_unlock(struct cnxk_rep_dev *rep)\n+{\n+\trte_spinlock_unlock(&rep->parent_dev->rep_lock);\n+}\n+\n static inline struct cnxk_rep_dev *\n cnxk_rep_pmd_priv(const struct rte_eth_dev *eth_dev)\n {\n \treturn eth_dev->data->dev_private;\n }\n \n+static __rte_always_inline void\n+cnxk_rep_pool_buffer_stats(struct rte_mempool *pool)\n+{\n+\tplt_rep_dbg(\" pool %s size %d buffer count in use %d available %d\\n\", pool->name,\n+\t\t pool->size, rte_mempool_in_use_count(pool), rte_mempool_avail_count(pool));\n+}\n+\n+/* Prototypes */\n int cnxk_rep_dev_probe(struct rte_pci_device *pci_dev, struct cnxk_eswitch_dev *eswitch_dev);\n int cnxk_rep_dev_remove(struct cnxk_eswitch_dev *eswitch_dev);\n int cnxk_rep_dev_uninit(struct rte_eth_dev *ethdev);\n@@ -86,5 +114,12 @@ int cnxk_rep_stats_get(struct rte_eth_dev *eth_dev, struct rte_eth_stats *stats)\n int cnxk_rep_stats_reset(struct rte_eth_dev *eth_dev);\n int cnxk_rep_flow_ops_get(struct rte_eth_dev *ethdev, const struct rte_flow_ops **ops);\n int cnxk_rep_state_update(struct cnxk_eswitch_dev *eswitch_dev, uint16_t hw_func, uint16_t *rep_id);\n+int cnxk_rep_promiscuous_enable(struct rte_eth_dev *ethdev);\n+int cnxk_rep_promiscuous_disable(struct rte_eth_dev *ethdev);\n+int cnxk_rep_mac_addr_set(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr);\n+uint16_t cnxk_rep_tx_burst_dummy(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts);\n+uint16_t cnxk_rep_rx_burst_dummy(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts);\n+void cnxk_rep_tx_queue_stop(struct rte_eth_dev *ethdev, uint16_t queue_id);\n+void cnxk_rep_rx_queue_stop(struct rte_eth_dev *ethdev, uint16_t queue_id);\n \n #endif /* __CNXK_REP_H__ */\ndiff --git a/drivers/net/cnxk/cnxk_rep_msg.h b/drivers/net/cnxk/cnxk_rep_msg.h\nindex 0543805148..63cfbe3f19 100644\n--- a/drivers/net/cnxk/cnxk_rep_msg.h\n+++ b/drivers/net/cnxk/cnxk_rep_msg.h\n@@ -19,6 +19,8 @@ typedef enum CNXK_REP_MSG {\n \tCNXK_REP_MSG_READY = 0,\n \tCNXK_REP_MSG_ACK,\n \tCNXK_REP_MSG_EXIT,\n+\t/* Ethernet operation msgs */\n+\tCNXK_REP_MSG_ETH_SET_MAC,\n \t/* End of messaging sequence */\n \tCNXK_REP_MSG_END,\n } cnxk_rep_msg_t;\n@@ -81,6 +83,12 @@ typedef struct cnxk_rep_msg_exit_data {\n \tuint16_t data[];\n } __rte_packed cnxk_rep_msg_exit_data_t;\n \n+/* Ethernet op - set mac */\n+typedef struct cnxk_rep_msg_eth_mac_set_meta {\n+\tuint16_t portid;\n+\tuint8_t addr_bytes[RTE_ETHER_ADDR_LEN];\n+} __rte_packed cnxk_rep_msg_eth_set_mac_meta_t;\n+\n void cnxk_rep_msg_populate_command(void *buffer, uint32_t *length, cnxk_rep_msg_t type,\n \t\t\t\t uint32_t size);\n void cnxk_rep_msg_populate_command_meta(void *buffer, uint32_t *length, void *msg_meta, uint32_t sz,\ndiff --git a/drivers/net/cnxk/cnxk_rep_ops.c b/drivers/net/cnxk/cnxk_rep_ops.c\nindex 15448688ce..97643a50f2 100644\n--- a/drivers/net/cnxk/cnxk_rep_ops.c\n+++ b/drivers/net/cnxk/cnxk_rep_ops.c\n@@ -3,25 +3,221 @@\n */\n \n #include <cnxk_rep.h>\n+#include <cnxk_rep_msg.h>\n+\n+#define MEMPOOL_CACHE_SIZE 256\n+#define TX_DESC_PER_QUEUE 512\n+#define RX_DESC_PER_QUEUE 256\n+#define NB_REP_VDEV_MBUF 1024\n+\n+static uint16_t\n+cnxk_rep_tx_burst(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n+{\n+\tstruct cnxk_rep_txq *txq = tx_queue;\n+\tstruct cnxk_rep_dev *rep_dev;\n+\tuint16_t n_tx;\n+\n+\tif (unlikely(!txq))\n+\t\treturn 0;\n+\n+\trep_dev = txq->rep_dev;\n+\tplt_rep_dbg(\"Transmitting %d packets on eswitch queue %d\", nb_pkts, txq->qid);\n+\tn_tx = cnxk_eswitch_dev_tx_burst(rep_dev->parent_dev, txq->qid, tx_pkts, nb_pkts,\n+\t\t\t\t\t NIX_TX_OFFLOAD_VLAN_QINQ_F);\n+\treturn n_tx;\n+}\n+\n+static uint16_t\n+cnxk_rep_rx_burst(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n+{\n+\tstruct cnxk_rep_rxq *rxq = rx_queue;\n+\tstruct cnxk_rep_dev *rep_dev;\n+\tuint16_t n_rx;\n+\n+\tif (unlikely(!rxq))\n+\t\treturn 0;\n+\n+\trep_dev = rxq->rep_dev;\n+\tn_rx = cnxk_eswitch_dev_rx_burst(rep_dev->parent_dev, rxq->qid, rx_pkts, nb_pkts);\n+\tif (n_rx == 0)\n+\t\treturn 0;\n+\n+\tplt_rep_dbg(\"Received %d packets on eswitch queue %d\", n_rx, rxq->qid);\n+\treturn n_rx;\n+}\n+\n+uint16_t\n+cnxk_rep_tx_burst_dummy(void *tx_queue, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n+{\n+\tPLT_SET_USED(tx_queue);\n+\tPLT_SET_USED(tx_pkts);\n+\tPLT_SET_USED(nb_pkts);\n+\n+\treturn 0;\n+}\n+\n+uint16_t\n+cnxk_rep_rx_burst_dummy(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)\n+{\n+\tPLT_SET_USED(rx_queue);\n+\tPLT_SET_USED(rx_pkts);\n+\tPLT_SET_USED(nb_pkts);\n+\n+\treturn 0;\n+}\n \n int\n cnxk_rep_link_update(struct rte_eth_dev *ethdev, int wait_to_complete)\n {\n-\tPLT_SET_USED(ethdev);\n+\tstruct rte_eth_link link;\n \tPLT_SET_USED(wait_to_complete);\n+\n+\tmemset(&link, 0, sizeof(link));\n+\tif (ethdev->data->dev_started)\n+\t\tlink.link_status = RTE_ETH_LINK_UP;\n+\telse\n+\t\tlink.link_status = RTE_ETH_LINK_DOWN;\n+\n+\tlink.link_duplex = RTE_ETH_LINK_FULL_DUPLEX;\n+\tlink.link_autoneg = RTE_ETH_LINK_FIXED;\n+\tlink.link_speed = RTE_ETH_SPEED_NUM_UNKNOWN;\n+\n+\treturn rte_eth_linkstatus_set(ethdev, &link);\n+}\n+\n+int\n+cnxk_rep_dev_info_get(struct rte_eth_dev *ethdev, struct rte_eth_dev_info *dev_info)\n+{\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\tuint32_t max_rx_pktlen;\n+\n+\tmax_rx_pktlen = (roc_nix_max_pkt_len(&rep_dev->parent_dev->nix) + RTE_ETHER_CRC_LEN -\n+\t\t\t CNXK_NIX_MAX_VTAG_ACT_SIZE);\n+\n+\tdev_info->min_rx_bufsize = NIX_MIN_HW_FRS + RTE_ETHER_CRC_LEN;\n+\tdev_info->max_rx_pktlen = max_rx_pktlen;\n+\tdev_info->max_mac_addrs = roc_nix_mac_max_entries_get(&rep_dev->parent_dev->nix);\n+\n+\tdev_info->rx_offload_capa = CNXK_REP_RX_OFFLOAD_CAPA;\n+\tdev_info->tx_offload_capa = CNXK_REP_TX_OFFLOAD_CAPA;\n+\tdev_info->rx_queue_offload_capa = 0;\n+\tdev_info->tx_queue_offload_capa = 0;\n+\n+\t/* For the sake of symmetry, max_rx_queues = max_tx_queues */\n+\tdev_info->max_rx_queues = 1;\n+\tdev_info->max_tx_queues = 1;\n+\n+\t/* MTU specifics */\n+\tdev_info->max_mtu = dev_info->max_rx_pktlen - (RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN);\n+\tdev_info->min_mtu = dev_info->min_rx_bufsize - CNXK_NIX_L2_OVERHEAD;\n+\n+\t/* Switch info specific */\n+\tdev_info->switch_info.name = ethdev->device->name;\n+\tdev_info->switch_info.domain_id = rep_dev->switch_domain_id;\n+\tdev_info->switch_info.port_id = rep_dev->port_id;\n+\n \treturn 0;\n }\n \n int\n-cnxk_rep_dev_info_get(struct rte_eth_dev *ethdev, struct rte_eth_dev_info *devinfo)\n+cnxk_rep_representor_info_get(struct rte_eth_dev *ethdev, struct rte_eth_representor_info *info)\n+{\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\n+\treturn cnxk_eswitch_representor_info_get(rep_dev->parent_dev, info);\n+}\n+\n+static int\n+rep_eth_conf_chk(const struct rte_eth_conf *conf, uint16_t nb_rx_queues)\n+{\n+\tconst struct rte_eth_rss_conf *rss_conf;\n+\tint ret = 0;\n+\n+\tif (conf->link_speeds != 0) {\n+\t\tplt_err(\"specific link speeds not supported\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\tswitch (conf->rxmode.mq_mode) {\n+\tcase RTE_ETH_MQ_RX_RSS:\n+\t\tif (nb_rx_queues != 1) {\n+\t\t\tplt_err(\"Rx RSS is not supported with %u queues\", nb_rx_queues);\n+\t\t\tret = -EINVAL;\n+\t\t\tbreak;\n+\t\t}\n+\n+\t\trss_conf = &conf->rx_adv_conf.rss_conf;\n+\t\tif (rss_conf->rss_key != NULL || rss_conf->rss_key_len != 0 ||\n+\t\t rss_conf->rss_hf != 0) {\n+\t\t\tplt_err(\"Rx RSS configuration is not supported\");\n+\t\t\tret = -EINVAL;\n+\t\t}\n+\t\tbreak;\n+\tcase RTE_ETH_MQ_RX_NONE:\n+\t\tbreak;\n+\tdefault:\n+\t\tplt_err(\"Rx mode MQ modes other than RSS not supported\");\n+\t\tret = -EINVAL;\n+\t\tbreak;\n+\t}\n+\n+\tif (conf->txmode.mq_mode != RTE_ETH_MQ_TX_NONE) {\n+\t\tplt_err(\"Tx mode MQ modes not supported\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\tif (conf->lpbk_mode != 0) {\n+\t\tplt_err(\"loopback not supported\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\tif (conf->dcb_capability_en != 0) {\n+\t\tplt_err(\"priority-based flow control not supported\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\tif (conf->intr_conf.lsc != 0) {\n+\t\tplt_err(\"link status change interrupt not supported\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\tif (conf->intr_conf.rxq != 0) {\n+\t\tplt_err(\"receive queue interrupt not supported\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\tif (conf->intr_conf.rmv != 0) {\n+\t\tplt_err(\"remove interrupt not supported\");\n+\t\tret = -EINVAL;\n+\t}\n+\n+\treturn ret;\n+}\n+\n+int\n+cnxk_rep_dev_configure(struct rte_eth_dev *ethdev)\n+{\n+\tstruct rte_eth_dev_data *ethdev_data = ethdev->data;\n+\tint rc = -1;\n+\n+\trc = rep_eth_conf_chk(ðdev_data->dev_conf, ethdev_data->nb_rx_queues);\n+\tif (rc)\n+\t\tgoto fail;\n+\n+\treturn 0;\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_rep_promiscuous_enable(struct rte_eth_dev *ethdev)\n {\n \tPLT_SET_USED(ethdev);\n-\tPLT_SET_USED(devinfo);\n \treturn 0;\n }\n \n int\n-cnxk_rep_dev_configure(struct rte_eth_dev *ethdev)\n+cnxk_rep_promiscuous_disable(struct rte_eth_dev *ethdev)\n {\n \tPLT_SET_USED(ethdev);\n \treturn 0;\n@@ -30,21 +226,73 @@ cnxk_rep_dev_configure(struct rte_eth_dev *ethdev)\n int\n cnxk_rep_dev_start(struct rte_eth_dev *ethdev)\n {\n-\tPLT_SET_USED(ethdev);\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\tint rc = 0, qid;\n+\n+\tethdev->rx_pkt_burst = cnxk_rep_rx_burst;\n+\tethdev->tx_pkt_burst = cnxk_rep_tx_burst;\n+\n+\tif (!rep_dev->is_vf_active)\n+\t\treturn 0;\n+\n+\tif (!rep_dev->rxq || !rep_dev->txq) {\n+\t\tplt_err(\"Invalid rxq or txq for representor id %d\", rep_dev->rep_id);\n+\t\trc = -EINVAL;\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Start rx queues */\n+\tqid = rep_dev->rxq->qid;\n+\trc = cnxk_eswitch_rxq_start(rep_dev->parent_dev, qid);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to start rxq %d, rc=%d\", qid, rc);\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Start tx queues */\n+\tqid = rep_dev->txq->qid;\n+\trc = cnxk_eswitch_txq_start(rep_dev->parent_dev, qid);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to start txq %d, rc=%d\", qid, rc);\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Start rep_xport device only once after first representor gets active */\n+\tif (!rep_dev->parent_dev->repr_cnt.nb_repr_started) {\n+\t\trc = cnxk_eswitch_nix_rsrc_start(rep_dev->parent_dev);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to start nix dev, rc %d\", rc);\n+\t\t\tgoto fail;\n+\t\t}\n+\t}\n+\n+\tethdev->data->tx_queue_state[0] = RTE_ETH_QUEUE_STATE_STARTED;\n+\tethdev->data->rx_queue_state[0] = RTE_ETH_QUEUE_STATE_STARTED;\n+\n+\trep_dev->parent_dev->repr_cnt.nb_repr_started++;\n+\n \treturn 0;\n+fail:\n+\treturn rc;\n }\n \n int\n cnxk_rep_dev_close(struct rte_eth_dev *ethdev)\n {\n-\tPLT_SET_USED(ethdev);\n-\treturn 0;\n+\treturn cnxk_rep_dev_uninit(ethdev);\n }\n \n int\n cnxk_rep_dev_stop(struct rte_eth_dev *ethdev)\n {\n-\tPLT_SET_USED(ethdev);\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\n+\tethdev->rx_pkt_burst = cnxk_rep_rx_burst_dummy;\n+\tethdev->tx_pkt_burst = cnxk_rep_tx_burst_dummy;\n+\tcnxk_rep_rx_queue_stop(ethdev, 0);\n+\tcnxk_rep_tx_queue_stop(ethdev, 0);\n+\trep_dev->parent_dev->repr_cnt.nb_repr_started--;\n+\n \treturn 0;\n }\n \n@@ -53,39 +301,189 @@ cnxk_rep_rx_queue_setup(struct rte_eth_dev *ethdev, uint16_t rx_queue_id, uint16\n \t\t\tunsigned int socket_id, const struct rte_eth_rxconf *rx_conf,\n \t\t\tstruct rte_mempool *mb_pool)\n {\n-\tPLT_SET_USED(ethdev);\n-\tPLT_SET_USED(rx_queue_id);\n-\tPLT_SET_USED(nb_rx_desc);\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\tstruct cnxk_rep_rxq *rxq = NULL;\n+\tuint16_t qid = 0;\n+\tint rc;\n+\n \tPLT_SET_USED(socket_id);\n-\tPLT_SET_USED(rx_conf);\n-\tPLT_SET_USED(mb_pool);\n+\t/* If no representee assigned, store the respective rxq parameters */\n+\tif (!rep_dev->is_vf_active && !rep_dev->rxq) {\n+\t\trxq = plt_zmalloc(sizeof(*rxq), RTE_CACHE_LINE_SIZE);\n+\t\tif (!rxq) {\n+\t\t\trc = -ENOMEM;\n+\t\t\tplt_err(\"Failed to alloc RxQ for rep id %d\", rep_dev->rep_id);\n+\t\t\tgoto fail;\n+\t\t}\n+\n+\t\trxq->qid = qid;\n+\t\trxq->nb_desc = nb_rx_desc;\n+\t\trxq->rep_dev = rep_dev;\n+\t\trxq->mpool = mb_pool;\n+\t\trxq->rx_conf = rx_conf;\n+\t\trep_dev->rxq = rxq;\n+\t\tethdev->data->rx_queues[rx_queue_id] = NULL;\n+\n+\t\treturn 0;\n+\t}\n+\n+\tqid = rep_dev->rep_id;\n+\trc = cnxk_eswitch_rxq_setup(rep_dev->parent_dev, qid, nb_rx_desc, rx_conf, mb_pool);\n+\tif (rc) {\n+\t\tplt_err(\"failed to setup eswitch queue id %d\", qid);\n+\t\tgoto fail;\n+\t}\n+\n+\trxq = rep_dev->rxq;\n+\tif (!rxq) {\n+\t\tplt_err(\"Invalid RXQ handle for representor port %d rep id %d\", rep_dev->port_id,\n+\t\t\trep_dev->rep_id);\n+\t\tgoto free_queue;\n+\t}\n+\n+\trxq->qid = qid;\n+\tethdev->data->rx_queues[rx_queue_id] = rxq;\n+\tethdev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;\n+\tplt_rep_dbg(\"representor id %d portid %d rxq id %d\", rep_dev->port_id,\n+\t\t ethdev->data->port_id, rxq->qid);\n+\n \treturn 0;\n+free_queue:\n+\tcnxk_eswitch_rxq_release(rep_dev->parent_dev, qid);\n+fail:\n+\treturn rc;\n+}\n+\n+void\n+cnxk_rep_rx_queue_stop(struct rte_eth_dev *ethdev, uint16_t queue_id)\n+{\n+\tstruct cnxk_rep_rxq *rxq = ethdev->data->rx_queues[queue_id];\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\tint rc;\n+\n+\tif (!rxq)\n+\t\treturn;\n+\n+\tplt_rep_dbg(\"Stopping rxq %u\", rxq->qid);\n+\n+\trc = cnxk_eswitch_rxq_stop(rep_dev->parent_dev, rxq->qid);\n+\tif (rc)\n+\t\tplt_err(\"Failed to stop rxq %d, rc=%d\", rc, rxq->qid);\n+\n+\tethdev->data->rx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;\n }\n \n void\n cnxk_rep_rx_queue_release(struct rte_eth_dev *ethdev, uint16_t queue_id)\n {\n-\tPLT_SET_USED(ethdev);\n-\tPLT_SET_USED(queue_id);\n+\tstruct cnxk_rep_rxq *rxq = ethdev->data->rx_queues[queue_id];\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\tint rc;\n+\n+\tif (!rxq) {\n+\t\tplt_err(\"Invalid rxq retrieved for rep_id %d\", rep_dev->rep_id);\n+\t\treturn;\n+\t}\n+\n+\tplt_rep_dbg(\"Releasing rxq %u\", rxq->qid);\n+\n+\trc = cnxk_eswitch_rxq_release(rep_dev->parent_dev, rxq->qid);\n+\tif (rc)\n+\t\tplt_err(\"Failed to release rxq %d, rc=%d\", rc, rxq->qid);\n }\n \n int\n cnxk_rep_tx_queue_setup(struct rte_eth_dev *ethdev, uint16_t tx_queue_id, uint16_t nb_tx_desc,\n \t\t\tunsigned int socket_id, const struct rte_eth_txconf *tx_conf)\n {\n-\tPLT_SET_USED(ethdev);\n-\tPLT_SET_USED(tx_queue_id);\n-\tPLT_SET_USED(nb_tx_desc);\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\tstruct cnxk_rep_txq *txq = NULL;\n+\tint rc = 0, qid = 0;\n+\n \tPLT_SET_USED(socket_id);\n-\tPLT_SET_USED(tx_conf);\n+\t/* If no representee assigned, store the respective rxq parameters */\n+\tif (!rep_dev->is_vf_active && !rep_dev->txq) {\n+\t\ttxq = plt_zmalloc(sizeof(*txq), RTE_CACHE_LINE_SIZE);\n+\t\tif (!txq) {\n+\t\t\trc = -ENOMEM;\n+\t\t\tplt_err(\"failed to alloc txq for rep id %d\", rep_dev->rep_id);\n+\t\t\tgoto free_queue;\n+\t\t}\n+\n+\t\ttxq->qid = qid;\n+\t\ttxq->nb_desc = nb_tx_desc;\n+\t\ttxq->tx_conf = tx_conf;\n+\t\ttxq->rep_dev = rep_dev;\n+\t\trep_dev->txq = txq;\n+\n+\t\tethdev->data->tx_queues[tx_queue_id] = NULL;\n+\n+\t\treturn 0;\n+\t}\n+\n+\tqid = rep_dev->rep_id;\n+\trc = cnxk_eswitch_txq_setup(rep_dev->parent_dev, qid, nb_tx_desc, tx_conf);\n+\tif (rc) {\n+\t\tplt_err(\"failed to setup eswitch queue id %d\", qid);\n+\t\tgoto fail;\n+\t}\n+\n+\ttxq = rep_dev->txq;\n+\tif (!txq) {\n+\t\tplt_err(\"Invalid TXQ handle for representor port %d rep id %d\", rep_dev->port_id,\n+\t\t\trep_dev->rep_id);\n+\t\tgoto free_queue;\n+\t}\n+\n+\ttxq->qid = qid;\n+\tethdev->data->tx_queues[tx_queue_id] = txq;\n+\tethdev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;\n+\tplt_rep_dbg(\"representor id %d portid %d txq id %d\", rep_dev->port_id,\n+\t\t ethdev->data->port_id, txq->qid);\n+\n \treturn 0;\n+free_queue:\n+\tcnxk_eswitch_txq_release(rep_dev->parent_dev, qid);\n+fail:\n+\treturn rc;\n+}\n+\n+void\n+cnxk_rep_tx_queue_stop(struct rte_eth_dev *ethdev, uint16_t queue_id)\n+{\n+\tstruct cnxk_rep_txq *txq = ethdev->data->tx_queues[queue_id];\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\tint rc;\n+\n+\tif (!txq)\n+\t\treturn;\n+\n+\tplt_rep_dbg(\"Releasing txq %u\", txq->qid);\n+\n+\trc = cnxk_eswitch_txq_stop(rep_dev->parent_dev, txq->qid);\n+\tif (rc)\n+\t\tplt_err(\"Failed to stop txq %d, rc=%d\", rc, txq->qid);\n+\n+\tethdev->data->tx_queue_state[queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;\n }\n \n void\n cnxk_rep_tx_queue_release(struct rte_eth_dev *ethdev, uint16_t queue_id)\n {\n-\tPLT_SET_USED(ethdev);\n-\tPLT_SET_USED(queue_id);\n+\tstruct cnxk_rep_txq *txq = ethdev->data->tx_queues[queue_id];\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(ethdev);\n+\tint rc;\n+\n+\tif (!txq) {\n+\t\tplt_err(\"Invalid txq retrieved for rep_id %d\", rep_dev->rep_id);\n+\t\treturn;\n+\t}\n+\n+\tplt_rep_dbg(\"Releasing txq %u\", txq->qid);\n+\n+\trc = cnxk_eswitch_txq_release(rep_dev->parent_dev, txq->qid);\n+\tif (rc)\n+\t\tplt_err(\"Failed to release txq %d, rc=%d\", rc, txq->qid);\n }\n \n int\n@@ -111,15 +509,70 @@ cnxk_rep_flow_ops_get(struct rte_eth_dev *ethdev, const struct rte_flow_ops **op\n \treturn 0;\n }\n \n+int\n+cnxk_rep_mac_addr_set(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr)\n+{\n+\tstruct cnxk_rep_dev *rep_dev = cnxk_rep_pmd_priv(eth_dev);\n+\tcnxk_rep_msg_eth_set_mac_meta_t msg_sm_meta;\n+\tcnxk_rep_msg_ack_data_t adata;\n+\tuint32_t len = 0, rc;\n+\tvoid *buffer;\n+\tsize_t size;\n+\n+\t/* If representor not representing any VF, return 0 */\n+\tif (!rep_dev->is_vf_active)\n+\t\treturn 0;\n+\n+\tsize = CNXK_REP_MSG_MAX_BUFFER_SZ;\n+\tbuffer = plt_zmalloc(size, 0);\n+\tif (!buffer) {\n+\t\tplt_err(\"Failed to allocate mem\");\n+\t\trc = -ENOMEM;\n+\t\tgoto fail;\n+\t}\n+\n+\tcnxk_rep_msg_populate_header(buffer, &len);\n+\n+\tmsg_sm_meta.portid = rep_dev->rep_id;\n+\trte_memcpy(&msg_sm_meta.addr_bytes, addr->addr_bytes, RTE_ETHER_ADDR_LEN);\n+\tcnxk_rep_msg_populate_command_meta(buffer, &len, &msg_sm_meta,\n+\t\t\t\t\t sizeof(cnxk_rep_msg_eth_set_mac_meta_t),\n+\t\t\t\t\t CNXK_REP_MSG_ETH_SET_MAC);\n+\tcnxk_rep_msg_populate_msg_end(buffer, &len);\n+\n+\trc = cnxk_rep_msg_send_process(rep_dev, buffer, len, &adata);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to process the message, err %d\", rc);\n+\t\tgoto fail;\n+\t}\n+\n+\tif (adata.u.sval < 0) {\n+\t\trc = adata.u.sval;\n+\t\tplt_err(\"Failed to set mac address, err %d\", rc);\n+\t\tgoto fail;\n+\t}\n+\n+\trte_free(buffer);\n+\n+\treturn 0;\n+fail:\n+\trte_free(buffer);\n+\treturn rc;\n+}\n+\n /* CNXK platform representor dev ops */\n struct eth_dev_ops cnxk_rep_dev_ops = {\n \t.dev_infos_get = cnxk_rep_dev_info_get,\n+\t.representor_info_get = cnxk_rep_representor_info_get,\n \t.dev_configure = cnxk_rep_dev_configure,\n \t.dev_start = cnxk_rep_dev_start,\n \t.rx_queue_setup = cnxk_rep_rx_queue_setup,\n \t.rx_queue_release = cnxk_rep_rx_queue_release,\n \t.tx_queue_setup = cnxk_rep_tx_queue_setup,\n \t.tx_queue_release = cnxk_rep_tx_queue_release,\n+\t.promiscuous_enable = cnxk_rep_promiscuous_enable,\n+\t.promiscuous_disable = cnxk_rep_promiscuous_disable,\n+\t.mac_addr_set = cnxk_rep_mac_addr_set,\n \t.link_update = cnxk_rep_link_update,\n \t.dev_close = cnxk_rep_dev_close,\n \t.dev_stop = cnxk_rep_dev_stop,\n", "prefixes": [ "v4", "13/23" ] }