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GET /api/patches/137381/?format=api
{ "id": 137381, "url": "http://patches.dpdk.org/api/patches/137381/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240227191550.137687-9-hkalra@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240227191550.137687-9-hkalra@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240227191550.137687-9-hkalra@marvell.com", "date": "2024-02-27T19:15:35", "name": "[v4,08/23] net/cnxk: eswitch flow configurations", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "3a6be170811deb60ae7b7ccb1e968b847aec4e11", "submitter": { "id": 1182, "url": "http://patches.dpdk.org/api/people/1182/?format=api", "name": "Harman Kalra", "email": "hkalra@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240227191550.137687-9-hkalra@marvell.com/mbox/", "series": [ { "id": 31259, "url": "http://patches.dpdk.org/api/series/31259/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31259", "date": "2024-02-27T19:15:27", "name": "net/cnxk: support for port representors", "version": 4, "mbox": "http://patches.dpdk.org/series/31259/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/137381/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/137381/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id CCA2D43C06;\n\tTue, 27 Feb 2024 20:17:08 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1054942F2B;\n\tTue, 27 Feb 2024 20:16:32 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 4042942F37\n for <dev@dpdk.org>; Tue, 27 Feb 2024 20:16:30 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id\n 41RG2VYN023959 for <dev@dpdk.org>; Tue, 27 Feb 2024 11:16:29 -0800", "from dc5-exch05.marvell.com ([199.233.59.128])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3whjwdh15h-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 27 Feb 2024 11:16:29 -0800 (PST)", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH05.marvell.com\n (10.69.176.209) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.1258.12; Tue, 27 Feb\n 2024 11:16:28 -0800", "from DC5-EXCH05.marvell.com (10.69.176.209) by\n DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id\n 15.0.1497.48; Tue, 27 Feb 2024 11:16:28 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH05.marvell.com\n (10.69.176.209) with Microsoft SMTP Server id 15.2.1258.12 via Frontend\n Transport; Tue, 27 Feb 2024 11:16:28 -0800", "from localhost.localdomain (unknown [10.29.52.211])\n by maili.marvell.com (Postfix) with ESMTP id C51113F719D;\n Tue, 27 Feb 2024 11:16:25 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=\n from:to:cc:subject:date:message-id:in-reply-to:references\n :mime-version:content-type; s=pfpt0220; bh=L91ch2k8CzBwnv8hl0zcU\n fkKY+EOQKrSEd05MurYeU0=; b=gfFHuxEIG1kUJZMSHUqQK5yK5yMzHPNiB/jo9\n JY9xxBtg9+2PjHbXIXavF0wOOXTKQvPrdSw2Vvdoi3QQoDlGa2llSXYtt+wBjP8g\n 5DiOfDrIZnH+ZXFSKKfgzoVxsFCC1hcAkX80d+QtmuDExnJZYkhUD6hVPT5Z+FZH\n bsqZR7fH2sEW1SeWxvSIy/xu/bUY1HNsrYyhTBmLn1y06hoT4jfpchLXT1e0Fpee\n 5Lk3Z4h/EFIF1VewScSo/w5VzIXLbhSDXt3WZdnJi+pTkbjWyy1aQS/gvFpdcGBA\n PpaA66eQAqYYMBrXm6vY17pd9XJP7zlthfQrJMYV5Jm7W30kg==", "From": "Harman Kalra <hkalra@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>, Harman Kalra <hkalra@marvell.com>", "CC": "<dev@dpdk.org>", "Subject": "[PATCH v4 08/23] net/cnxk: eswitch flow configurations", "Date": "Wed, 28 Feb 2024 00:45:35 +0530", "Message-ID": "<20240227191550.137687-9-hkalra@marvell.com>", "X-Mailer": "git-send-email 2.18.0", "In-Reply-To": "<20240227191550.137687-1-hkalra@marvell.com>", "References": "<20230811163419.165790-1-hkalra@marvell.com>\n <20240227191550.137687-1-hkalra@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "rwNz8mLVqhKhMh3cqWhYnf3_YgPSmUlu", "X-Proofpoint-ORIG-GUID": "rwNz8mLVqhKhMh3cqWhYnf3_YgPSmUlu", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2024-02-27_06,2024-02-27_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Adding flow rules for eswitch PF and VF and implementing\ninterfaces to delete, shift flow rules\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n drivers/net/cnxk/cnxk_eswitch.c | 44 +++\n drivers/net/cnxk/cnxk_eswitch.h | 25 +-\n drivers/net/cnxk/cnxk_eswitch_devargs.c | 1 +\n drivers/net/cnxk/cnxk_eswitch_flow.c | 454 ++++++++++++++++++++++++\n drivers/net/cnxk/meson.build | 1 +\n 5 files changed, 522 insertions(+), 3 deletions(-)\n create mode 100644 drivers/net/cnxk/cnxk_eswitch_flow.c", "diff": "diff --git a/drivers/net/cnxk/cnxk_eswitch.c b/drivers/net/cnxk/cnxk_eswitch.c\nindex 599ed149ae..25992fddc9 100644\n--- a/drivers/net/cnxk/cnxk_eswitch.c\n+++ b/drivers/net/cnxk/cnxk_eswitch.c\n@@ -2,11 +2,33 @@\n * Copyright(C) 2024 Marvell.\n */\n \n+#include <rte_thash.h>\n+\n #include <cnxk_eswitch.h>\n #include <cnxk_rep.h>\n \n #define CNXK_NIX_DEF_SQ_COUNT 512\n \n+struct cnxk_esw_repr_hw_info *\n+cnxk_eswitch_representor_hw_info(struct cnxk_eswitch_dev *eswitch_dev, uint16_t hw_func)\n+{\n+\tstruct cnxk_eswitch_devargs *esw_da;\n+\tint i, j;\n+\n+\tif (!eswitch_dev)\n+\t\treturn NULL;\n+\n+\t/* Traversing the initialized represented list */\n+\tfor (i = 0; i < eswitch_dev->nb_esw_da; i++) {\n+\t\tesw_da = &eswitch_dev->esw_da[i];\n+\t\tfor (j = 0; j < esw_da->nb_repr_ports; j++) {\n+\t\t\tif (esw_da->repr_hw_info[j].hw_func == hw_func)\n+\t\t\t\treturn &esw_da->repr_hw_info[j];\n+\t\t}\n+\t}\n+\treturn NULL;\n+}\n+\n static int\n eswitch_hw_rsrc_cleanup(struct cnxk_eswitch_dev *eswitch_dev, struct rte_pci_device *pci_dev)\n {\n@@ -67,6 +89,10 @@ cnxk_eswitch_dev_remove(struct rte_pci_device *pci_dev)\n \tif (eswitch_dev->repr_cnt.nb_repr_created)\n \t\tcnxk_rep_dev_remove(eswitch_dev);\n \n+\t/* Cleanup NPC rxtx flow rules */\n+\tcnxk_eswitch_flow_rules_remove_list(eswitch_dev, &eswitch_dev->esw_flow_list,\n+\t\t\t\t\t eswitch_dev->npc.pf_func);\n+\n \t/* Cleanup HW resources */\n \teswitch_hw_rsrc_cleanup(eswitch_dev, pci_dev);\n \n@@ -87,6 +113,21 @@ cnxk_eswitch_nix_rsrc_start(struct cnxk_eswitch_dev *eswitch_dev)\n \t\tgoto done;\n \t}\n \n+\t/* Install eswitch PF mcam rules */\n+\trc = cnxk_eswitch_pfvf_flow_rules_install(eswitch_dev, false);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to install rxtx rules, rc %d\", rc);\n+\t\tgoto done;\n+\t}\n+\n+\t/* Configure TPID for Eswitch PF LFs */\n+\trc = roc_eswitch_nix_vlan_tpid_set(&eswitch_dev->nix, ROC_NIX_VLAN_TYPE_OUTER,\n+\t\t\t\t\t CNXK_ESWITCH_VLAN_TPID, false);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to configure tpid, rc %d\", rc);\n+\t\tgoto done;\n+\t}\n+\n \trc = roc_npc_mcam_enable_all_entries(&eswitch_dev->npc, 1);\n \tif (rc) {\n \t\tplt_err(\"Failed to enable NPC entries %d\", rc);\n@@ -524,6 +565,9 @@ eswitch_hw_rsrc_setup(struct cnxk_eswitch_dev *eswitch_dev, struct rte_pci_devic\n \tif (rc)\n \t\tgoto rsrc_cleanup;\n \n+\t/* List for eswitch default flows */\n+\tTAILQ_INIT(&eswitch_dev->esw_flow_list);\n+\n \treturn rc;\n rsrc_cleanup:\n \teswitch_hw_rsrc_cleanup(eswitch_dev, pci_dev);\ndiff --git a/drivers/net/cnxk/cnxk_eswitch.h b/drivers/net/cnxk/cnxk_eswitch.h\nindex dcd5add6d0..5b4e1b0a71 100644\n--- a/drivers/net/cnxk/cnxk_eswitch.h\n+++ b/drivers/net/cnxk/cnxk_eswitch.h\n@@ -13,11 +13,10 @@\n #include \"cn10k_tx.h\"\n \n #define CNXK_ESWITCH_CTRL_MSG_SOCK_PATH \"/tmp/cxk_rep_ctrl_msg_sock\"\n+#define CNXK_ESWITCH_VLAN_TPID\t\tROC_ESWITCH_VLAN_TPID\n #define CNXK_REP_ESWITCH_DEV_MZ\t\t\"cnxk_eswitch_dev\"\n-#define CNXK_ESWITCH_VLAN_TPID\t\t0x8100\n #define CNXK_ESWITCH_MAX_TXQ\t\t256\n #define CNXK_ESWITCH_MAX_RXQ\t\t256\n-#define CNXK_ESWITCH_LBK_CHAN\t\t63\n #define CNXK_ESWITCH_VFPF_SHIFT\t\t8\n \n #define CNXK_ESWITCH_QUEUE_STATE_RELEASED 0\n@@ -25,6 +24,7 @@\n #define CNXK_ESWITCH_QUEUE_STATE_STARTED 2\n #define CNXK_ESWITCH_QUEUE_STATE_STOPPED 3\n \n+TAILQ_HEAD(eswitch_flow_list, roc_npc_flow);\n enum cnxk_esw_da_pattern_type {\n \tCNXK_ESW_DA_TYPE_LIST = 0,\n \tCNXK_ESW_DA_TYPE_PFVF,\n@@ -39,6 +39,9 @@ struct cnxk_esw_repr_hw_info {\n \tuint16_t pfvf;\n \t/* representor port id assigned to representee */\n \tuint16_t port_id;\n+\tuint16_t num_flow_entries;\n+\n+\tTAILQ_HEAD(flow_list, roc_npc_flow) repr_flow_list;\n };\n \n /* Structure representing per devarg information - this can be per representee\n@@ -90,7 +93,6 @@ struct cnxk_eswitch_cxq {\n \tuint8_t state;\n };\n \n-TAILQ_HEAD(eswitch_flow_list, roc_npc_flow);\n struct cnxk_eswitch_dev {\n \t/* Input parameters */\n \tstruct plt_pci_device *pci_dev;\n@@ -116,6 +118,13 @@ struct cnxk_eswitch_dev {\n \tuint16_t rep_cnt;\n \tuint8_t configured;\n \n+\t/* NPC rxtx rules */\n+\tstruct flow_list esw_flow_list;\n+\tuint16_t num_entries;\n+\tbool eswitch_vf_rules_setup;\n+\tuint16_t esw_pf_entry;\n+\tuint16_t esw_vf_entry;\n+\n \t/* Eswitch Representors Devargs */\n \tuint16_t nb_esw_da;\n \tuint16_t last_probed;\n@@ -144,7 +153,10 @@ cnxk_eswitch_pmd_priv(void)\n \treturn mz->addr;\n }\n \n+/* HW Resources */\n int cnxk_eswitch_nix_rsrc_start(struct cnxk_eswitch_dev *eswitch_dev);\n+struct cnxk_esw_repr_hw_info *cnxk_eswitch_representor_hw_info(struct cnxk_eswitch_dev *eswitch_dev,\n+\t\t\t\t\t\t\t uint16_t hw_func);\n int cnxk_eswitch_repr_devargs(struct rte_pci_device *pci_dev, struct cnxk_eswitch_dev *eswitch_dev);\n int cnxk_eswitch_representor_info_get(struct cnxk_eswitch_dev *eswitch_dev,\n \t\t\t\t struct rte_eth_representor_info *info);\n@@ -158,4 +170,11 @@ int cnxk_eswitch_rxq_start(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid);\n int cnxk_eswitch_rxq_stop(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid);\n int cnxk_eswitch_txq_start(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid);\n int cnxk_eswitch_txq_stop(struct cnxk_eswitch_dev *eswitch_dev, uint16_t qid);\n+/* Flow Rules */\n+int cnxk_eswitch_flow_rules_install(struct cnxk_eswitch_dev *eswitch_dev, uint16_t hw_func);\n+int cnxk_eswitch_flow_rules_delete(struct cnxk_eswitch_dev *eswitch_dev, uint16_t hw_func);\n+int cnxk_eswitch_pfvf_flow_rules_install(struct cnxk_eswitch_dev *eswitch_dev, bool is_vf);\n+int cnxk_eswitch_flow_rule_shift(uint16_t hw_func, uint16_t *new_entry);\n+int cnxk_eswitch_flow_rules_remove_list(struct cnxk_eswitch_dev *eswitch_dev,\n+\t\t\t\t\tstruct flow_list *list, uint16_t hw_func);\n #endif /* __CNXK_ESWITCH_H__ */\ndiff --git a/drivers/net/cnxk/cnxk_eswitch_devargs.c b/drivers/net/cnxk/cnxk_eswitch_devargs.c\nindex 58383fb835..8167ce673a 100644\n--- a/drivers/net/cnxk/cnxk_eswitch_devargs.c\n+++ b/drivers/net/cnxk/cnxk_eswitch_devargs.c\n@@ -72,6 +72,7 @@ populate_repr_hw_info(struct cnxk_eswitch_dev *eswitch_dev, struct rte_eth_devar\n \t\tesw_da->repr_hw_info[i].pfvf = (eth_da->type == RTE_ETH_REPRESENTOR_PF) ?\n \t\t\t\t\t\t eth_da->ports[0] :\n \t\t\t\t\t\t eth_da->representor_ports[i];\n+\t\tTAILQ_INIT(&esw_da->repr_hw_info[i].repr_flow_list);\n \t\tplt_esw_dbg(\"\tHW func %x index %d type %d\", hw_func, j, eth_da->type);\n \t}\n \ndiff --git a/drivers/net/cnxk/cnxk_eswitch_flow.c b/drivers/net/cnxk/cnxk_eswitch_flow.c\nnew file mode 100644\nindex 0000000000..06077bfe92\n--- /dev/null\n+++ b/drivers/net/cnxk/cnxk_eswitch_flow.c\n@@ -0,0 +1,454 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(C) 2024 Marvell.\n+ */\n+\n+#include <rte_thash.h>\n+\n+#include <cnxk_eswitch.h>\n+\n+const uint8_t eswitch_vlan_rss_key[ROC_NIX_RSS_KEY_LEN] = {\n+\t0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE,\n+\t0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE,\n+\t0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE,\n+\t0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE,\n+\t0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE,\n+\t0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE, 0xFE};\n+\n+int\n+cnxk_eswitch_flow_rules_remove_list(struct cnxk_eswitch_dev *eswitch_dev, struct flow_list *list,\n+\t\t\t\t uint16_t hw_func)\n+{\n+\tstruct roc_npc_flow *flow, *tvar;\n+\tint rc = 0;\n+\n+\tRTE_TAILQ_FOREACH_SAFE(flow, list, next, tvar) {\n+\t\tplt_esw_dbg(\"Removing flow %d\", flow->mcam_id);\n+\t\trc = roc_eswitch_npc_mcam_delete_rule(&eswitch_dev->npc, flow,\n+\t\t\t\t\t\t hw_func);\n+\t\tif (rc)\n+\t\t\tplt_err(\"Failed to delete rule %d\", flow->mcam_id);\n+\t\trc = roc_npc_mcam_free(&eswitch_dev->npc, flow);\n+\t\tif (rc)\n+\t\t\tplt_err(\"Failed to free entry %d\", flow->mcam_id);\n+\t\tTAILQ_REMOVE(list, flow, next);\n+\t\trte_free(flow);\n+\t}\n+\n+\treturn rc;\n+}\n+\n+static int\n+eswitch_npc_vlan_rss_configure(struct roc_npc *roc_npc, struct roc_npc_flow *flow)\n+{\n+\tstruct roc_nix *roc_nix = roc_npc->roc_nix;\n+\tuint32_t qid, idx, hash, vlan_tci;\n+\tuint16_t *reta, reta_sz, id;\n+\tint rc = 0;\n+\n+\tid = flow->mcam_id;\n+\t/* Setting up the key */\n+\troc_nix_rss_key_set(roc_nix, eswitch_vlan_rss_key);\n+\n+\treta_sz = roc_nix->reta_sz;\n+\treta = plt_zmalloc(reta_sz * sizeof(uint16_t), 0);\n+\tif (!reta) {\n+\t\tplt_err(\"Failed to allocate mem for reta table\");\n+\t\trc = -ENOMEM;\n+\t\tgoto fail;\n+\t}\n+\tfor (qid = 0; qid < reta_sz; qid++) {\n+\t\tvlan_tci = (1 << CNXK_ESWITCH_VFPF_SHIFT) | qid;\n+\t\thash = rte_softrss(&vlan_tci, 1, eswitch_vlan_rss_key);\n+\t\tidx = hash & 0xFF;\n+\t\treta[idx] = qid;\n+\t}\n+\tflow->mcam_id = id;\n+\trc = roc_eswitch_npc_rss_action_configure(roc_npc, flow, FLOW_KEY_TYPE_VLAN, reta);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to configure rss action, err %d\", rc);\n+\t\tgoto done;\n+\t}\n+\n+done:\n+\tplt_free(reta);\n+fail:\n+\treturn rc;\n+}\n+\n+static int\n+eswitch_pfvf_mcam_install_rules(struct cnxk_eswitch_dev *eswitch_dev, struct roc_npc_flow *flow,\n+\t\t\t\tbool is_vf)\n+{\n+\tuint16_t vlan_tci = 0, hw_func;\n+\tint rc;\n+\n+\thw_func = eswitch_dev->npc.pf_func | is_vf;\n+\tif (!is_vf) {\n+\t\t/* Eswitch PF RX VLAN rule */\n+\t\tvlan_tci = 1ULL << CNXK_ESWITCH_VFPF_SHIFT;\n+\t\trc = roc_eswitch_npc_mcam_rx_rule(&eswitch_dev->npc, flow, hw_func, vlan_tci,\n+\t\t\t\t\t\t 0xFF00);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to install RX rule for ESW PF to ESW VF, rc %d\", rc);\n+\t\t\tgoto exit;\n+\t\t}\n+\t\tplt_esw_dbg(\"Installed eswitch PF RX rule %d\", flow->mcam_id);\n+\t\trc = eswitch_npc_vlan_rss_configure(&eswitch_dev->npc, flow);\n+\t\tif (rc)\n+\t\t\tgoto exit;\n+\t\tflow->enable = true;\n+\t} else {\n+\t\t/* Eswitch VF RX VLAN rule */\n+\t\trc = roc_eswitch_npc_mcam_rx_rule(&eswitch_dev->npc, flow, hw_func, vlan_tci,\n+\t\t\t\t\t\t 0xFF00);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to install RX rule for ESW VF to ESW PF, rc %d\", rc);\n+\t\t\tgoto exit;\n+\t\t}\n+\t\tflow->enable = true;\n+\t\tplt_esw_dbg(\"Installed eswitch PF RX rule %d\", flow->mcam_id);\n+\t}\n+\n+\treturn 0;\n+exit:\n+\treturn rc;\n+}\n+\n+static int\n+eswitch_npc_get_counter(struct roc_npc *npc, struct roc_npc_flow *flow)\n+{\n+\tuint16_t ctr_id;\n+\tint rc;\n+\n+\trc = roc_npc_mcam_alloc_counter(npc, &ctr_id);\n+\tif (rc < 0) {\n+\t\tplt_err(\"Failed to allocate counter, rc %d\", rc);\n+\t\tgoto fail;\n+\t}\n+\tflow->ctr_id = ctr_id;\n+\tflow->use_ctr = true;\n+\n+\trc = roc_npc_mcam_clear_counter(npc, flow->ctr_id);\n+\tif (rc < 0) {\n+\t\tplt_err(\"Failed to clear counter idx %d, rc %d\", flow->ctr_id, rc);\n+\t\tgoto free;\n+\t}\n+\treturn 0;\n+free:\n+\troc_npc_mcam_free_counter(npc, ctr_id);\n+fail:\n+\treturn rc;\n+}\n+\n+static int\n+eswitch_npc_get_counter_entry_ref(struct roc_npc *npc, struct roc_npc_flow *flow,\n+\t\t\t\t struct roc_npc_flow *ref_flow)\n+{\n+\tint rc = 0, resp_count;\n+\n+\trc = eswitch_npc_get_counter(npc, flow);\n+\tif (rc)\n+\t\tgoto free;\n+\n+\t/* Allocate an entry viz higher priority than ref flow */\n+\trc = roc_npc_mcam_alloc_entry(npc, flow, ref_flow, NPC_MCAM_HIGHER_PRIO, &resp_count);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to allocate entry, err %d\", rc);\n+\t\tgoto free;\n+\t}\n+\tplt_esw_dbg(\"New entry %d ref entry %d resp_count %d\", flow->mcam_id, ref_flow->mcam_id,\n+\t\t resp_count);\n+\n+\treturn 0;\n+free:\n+\troc_npc_mcam_free_counter(npc, flow->ctr_id);\n+\treturn rc;\n+}\n+\n+int\n+cnxk_eswitch_flow_rule_shift(uint16_t hw_func, uint16_t *entry)\n+{\n+\tstruct cnxk_esw_repr_hw_info *repr_info;\n+\tstruct cnxk_eswitch_dev *eswitch_dev;\n+\tstruct roc_npc_flow *ref_flow, *flow;\n+\tuint16_t curr_entry, new_entry;\n+\tint rc = 0, resp_count;\n+\n+\teswitch_dev = cnxk_eswitch_pmd_priv();\n+\tif (!eswitch_dev) {\n+\t\tplt_err(\"Invalid eswitch_dev handle\");\n+\t\trc = -EINVAL;\n+\t\tgoto fail;\n+\t}\n+\n+\trepr_info = cnxk_eswitch_representor_hw_info(eswitch_dev, hw_func);\n+\tif (!repr_info) {\n+\t\tplt_warn(\"Failed to get representor group for %x\", hw_func);\n+\t\trc = -ENOENT;\n+\t\tgoto fail;\n+\t}\n+\n+\tref_flow = TAILQ_FIRST(&repr_info->repr_flow_list);\n+\tif (*entry > ref_flow->mcam_id) {\n+\t\tflow = plt_zmalloc(sizeof(struct roc_npc_flow), 0);\n+\t\tif (!flow) {\n+\t\t\tplt_err(\"Failed to allocate memory\");\n+\t\t\trc = -ENOMEM;\n+\t\t\tgoto fail;\n+\t\t}\n+\n+\t\t/* Allocate a higher priority flow rule */\n+\t\trc = roc_npc_mcam_alloc_entry(&eswitch_dev->npc, flow, ref_flow,\n+\t\t\t\t\t NPC_MCAM_HIGHER_PRIO, &resp_count);\n+\t\tif (rc < 0) {\n+\t\t\tplt_err(\"Failed to allocate a newmcam entry, rc %d\", rc);\n+\t\t\tgoto fail;\n+\t\t}\n+\n+\t\tif (flow->mcam_id > ref_flow->mcam_id) {\n+\t\t\tplt_err(\"New flow %d is still at higher priority than ref_flow %d\",\n+\t\t\t\tflow->mcam_id, ref_flow->mcam_id);\n+\t\t\trc = -EINVAL;\n+\t\t\tgoto free_entry;\n+\t\t}\n+\n+\t\tplt_info(\"Before shift: HW_func %x curr_entry %d ref flow id %d new_entry %d\",\n+\t\t\t hw_func, *entry, ref_flow->mcam_id, flow->mcam_id);\n+\n+\t\tcurr_entry = *entry;\n+\t\tnew_entry = flow->mcam_id;\n+\n+\t\trc = roc_npc_mcam_move(&eswitch_dev->npc, curr_entry, new_entry);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to shift the new index %d to curr index %d, err\t%d\", *entry,\n+\t\t\t\tcurr_entry, rc);\n+\t\t\tgoto free_entry;\n+\t\t}\n+\t\t*entry = flow->mcam_id;\n+\n+\t\t/* Freeing the current entry */\n+\t\trc = roc_npc_mcam_free_entry(&eswitch_dev->npc, curr_entry);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to free the old entry. err %d\", rc);\n+\t\t\tgoto free_entry;\n+\t\t}\n+\n+\t\tplt_free(flow);\n+\t\tplt_info(\"After shift: HW_func %x old_entry %d new_entry %d\", hw_func, curr_entry,\n+\t\t\t *entry);\n+\t}\n+\n+\treturn 0;\n+free_entry:\n+\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_eswitch_flow_rules_delete(struct cnxk_eswitch_dev *eswitch_dev, uint16_t hw_func)\n+{\n+\tstruct cnxk_esw_repr_hw_info *repr_info;\n+\tstruct flow_list *list;\n+\tint rc = 0;\n+\n+\trepr_info = cnxk_eswitch_representor_hw_info(eswitch_dev, hw_func);\n+\tif (!repr_info) {\n+\t\tplt_warn(\"Failed to get representor group for %x\", hw_func);\n+\t\trc = -ENOENT;\n+\t\tgoto fail;\n+\t}\n+\tlist = &repr_info->repr_flow_list;\n+\n+\tplt_esw_dbg(\"Deleting flows for %x\", hw_func);\n+\trc = cnxk_eswitch_flow_rules_remove_list(eswitch_dev, list, hw_func);\n+\tif (rc)\n+\t\tplt_err(\"Failed to delete rules for hw func %x\", hw_func);\n+\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_eswitch_flow_rules_install(struct cnxk_eswitch_dev *eswitch_dev, uint16_t hw_func)\n+{\n+\tstruct roc_npc_flow *rx_flow, *tx_flow, *flow_iter, *esw_pf_flow = NULL;\n+\tstruct cnxk_esw_repr_hw_info *repr_info;\n+\tstruct flow_list *list;\n+\tuint16_t vlan_tci;\n+\tint rc = 0;\n+\n+\trepr_info = cnxk_eswitch_representor_hw_info(eswitch_dev, hw_func);\n+\tif (!repr_info) {\n+\t\tplt_err(\"Failed to get representor group for %x\", hw_func);\n+\t\trc = -EINVAL;\n+\t\tgoto fail;\n+\t}\n+\tlist = &repr_info->repr_flow_list;\n+\n+\t/* Taking ESW PF as reference entry for installing new rules */\n+\tTAILQ_FOREACH(flow_iter, &eswitch_dev->esw_flow_list, next) {\n+\t\tif (flow_iter->mcam_id == eswitch_dev->esw_pf_entry) {\n+\t\t\tesw_pf_flow = flow_iter;\n+\t\t\tbreak;\n+\t\t}\n+\t}\n+\n+\tif (!esw_pf_flow) {\n+\t\tplt_err(\"Failed to get the ESW PF flow\");\n+\t\trc = -EINVAL;\n+\t\tgoto fail;\n+\t}\n+\n+\t/* Installing RX rule */\n+\trx_flow = plt_zmalloc(sizeof(struct roc_npc_flow), 0);\n+\tif (!rx_flow) {\n+\t\tplt_err(\"Failed to allocate memory\");\n+\t\trc = -ENOMEM;\n+\t\tgoto fail;\n+\t}\n+\n+\trc = eswitch_npc_get_counter_entry_ref(&eswitch_dev->npc, rx_flow, esw_pf_flow);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to get counter and mcam entry, rc %d\", rc);\n+\t\tgoto free_rx_flow;\n+\t}\n+\n+\t/* VLAN TCI value for this representee is the rep id from AF driver */\n+\tvlan_tci = repr_info->rep_id;\n+\trc = roc_eswitch_npc_mcam_rx_rule(&eswitch_dev->npc, rx_flow, hw_func, vlan_tci, 0xFFFF);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to install RX rule for ESW PF to ESW VF, rc %d\", rc);\n+\t\tgoto free_rx_entry;\n+\t}\n+\trx_flow->enable = true;\n+\t/* List in ascending order of mcam entries */\n+\tTAILQ_FOREACH(flow_iter, list, next) {\n+\t\tif (flow_iter->mcam_id > rx_flow->mcam_id) {\n+\t\t\tTAILQ_INSERT_BEFORE(flow_iter, rx_flow, next);\n+\t\t\tgoto done_rx;\n+\t\t}\n+\t}\n+\tTAILQ_INSERT_TAIL(list, rx_flow, next);\n+done_rx:\n+\trepr_info->num_flow_entries++;\n+\tplt_esw_dbg(\"Installed RX flow rule %d for representee %x with vlan tci %x MCAM id %d\",\n+\t\t eswitch_dev->num_entries, hw_func, vlan_tci, rx_flow->mcam_id);\n+\n+\t/* Installing TX rule */\n+\ttx_flow = plt_zmalloc(sizeof(struct roc_npc_flow), 0);\n+\tif (!tx_flow) {\n+\t\tplt_err(\"Failed to allocate memory\");\n+\t\trc = -ENOMEM;\n+\t\tgoto remove_rx_rule;\n+\t}\n+\n+\trc = eswitch_npc_get_counter_entry_ref(&eswitch_dev->npc, tx_flow, esw_pf_flow);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to get counter and mcam entry, rc %d\", rc);\n+\t\tgoto free_tx_flow;\n+\t}\n+\n+\tvlan_tci = (1ULL << CNXK_ESWITCH_VFPF_SHIFT) | repr_info->rep_id;\n+\trc = roc_eswitch_npc_mcam_tx_rule(&eswitch_dev->npc, tx_flow, hw_func, vlan_tci);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to install RX rule for ESW PF to ESW VF, rc %d\", rc);\n+\t\tgoto free_tx_entry;\n+\t}\n+\ttx_flow->enable = true;\n+\t/* List in ascending order of mcam entries */\n+\tTAILQ_FOREACH(flow_iter, list, next) {\n+\t\tif (flow_iter->mcam_id > tx_flow->mcam_id) {\n+\t\t\tTAILQ_INSERT_BEFORE(flow_iter, tx_flow, next);\n+\t\t\tgoto done_tx;\n+\t\t}\n+\t}\n+\tTAILQ_INSERT_TAIL(list, tx_flow, next);\n+done_tx:\n+\trepr_info->num_flow_entries++;\n+\tplt_esw_dbg(\"Installed TX flow rule %d for representee %x with vlan tci %x MCAM id %d\",\n+\t\t repr_info->num_flow_entries, hw_func, vlan_tci, tx_flow->mcam_id);\n+\n+\treturn 0;\n+free_tx_entry:\n+\troc_npc_mcam_free(&eswitch_dev->npc, tx_flow);\n+free_tx_flow:\n+\trte_free(tx_flow);\n+remove_rx_rule:\n+\tTAILQ_REMOVE(list, rx_flow, next);\n+free_rx_entry:\n+\troc_npc_mcam_free(&eswitch_dev->npc, rx_flow);\n+free_rx_flow:\n+\trte_free(rx_flow);\n+fail:\n+\treturn rc;\n+}\n+\n+int\n+cnxk_eswitch_pfvf_flow_rules_install(struct cnxk_eswitch_dev *eswitch_dev, bool is_vf)\n+{\n+\tstruct roc_npc_flow *flow, *flow_iter;\n+\tstruct flow_list *list;\n+\tint rc = 0;\n+\n+\tlist = &eswitch_dev->esw_flow_list;\n+\tflow = plt_zmalloc(sizeof(struct roc_npc_flow), 0);\n+\tif (!flow) {\n+\t\tplt_err(\"Failed to allocate memory\");\n+\t\trc = -ENOMEM;\n+\t\tgoto fail;\n+\t}\n+\n+\trc = eswitch_npc_get_counter(&eswitch_dev->npc, flow);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to get counter and mcam entry, rc %d\", rc);\n+\t\tgoto free_flow;\n+\t}\n+\tif (!is_vf) {\n+\t\t/* Reserving an entry for esw VF but will not be installed */\n+\t\trc = roc_npc_get_free_mcam_entry(&eswitch_dev->npc, flow);\n+\t\tif (rc < 0) {\n+\t\t\tplt_err(\"Failed to allocate entry for vf, err %d\", rc);\n+\t\t\tgoto free_flow;\n+\t\t}\n+\t\teswitch_dev->esw_vf_entry = flow->mcam_id;\n+\t\t/* Allocate an entry for esw PF */\n+\t\trc = eswitch_npc_get_counter_entry_ref(&eswitch_dev->npc, flow, flow);\n+\t\tif (rc) {\n+\t\t\tplt_err(\"Failed to allocate entry for pf, err %d\", rc);\n+\t\t\tgoto free_flow;\n+\t\t}\n+\t\teswitch_dev->esw_pf_entry = flow->mcam_id;\n+\t\tplt_esw_dbg(\"Allocated entries for esw: PF %d and VF %d\", eswitch_dev->esw_pf_entry,\n+\t\t\t eswitch_dev->esw_vf_entry);\n+\t} else {\n+\t\tflow->mcam_id = eswitch_dev->esw_vf_entry;\n+\t}\n+\n+\trc = eswitch_pfvf_mcam_install_rules(eswitch_dev, flow, is_vf);\n+\tif (rc) {\n+\t\tplt_err(\"Failed to install entries, rc %d\", rc);\n+\t\tgoto free_flow;\n+\t}\n+\n+\t/* List in ascending order of mcam entries */\n+\tTAILQ_FOREACH(flow_iter, list, next) {\n+\t\tif (flow_iter->mcam_id > flow->mcam_id) {\n+\t\t\tTAILQ_INSERT_BEFORE(flow_iter, flow, next);\n+\t\t\tgoto done;\n+\t\t}\n+\t}\n+\tTAILQ_INSERT_TAIL(list, flow, next);\n+done:\n+\teswitch_dev->num_entries++;\n+\tplt_esw_dbg(\"Installed new eswitch flow rule %d with MCAM id %d\", eswitch_dev->num_entries,\n+\t\t flow->mcam_id);\n+\n+\treturn 0;\n+\n+free_flow:\n+\tcnxk_eswitch_flow_rules_remove_list(eswitch_dev, &eswitch_dev->esw_flow_list,\n+\t\t\t\t\t eswitch_dev->npc.pf_func);\n+fail:\n+\treturn rc;\n+}\ndiff --git a/drivers/net/cnxk/meson.build b/drivers/net/cnxk/meson.build\nindex fcd5d3d569..488e89253d 100644\n--- a/drivers/net/cnxk/meson.build\n+++ b/drivers/net/cnxk/meson.build\n@@ -30,6 +30,7 @@ sources = files(\n 'cnxk_ethdev_sec_telemetry.c',\n 'cnxk_eswitch.c',\n 'cnxk_eswitch_devargs.c',\n+ 'cnxk_eswitch_flow.c',\n 'cnxk_link.c',\n 'cnxk_lookup.c',\n 'cnxk_ptp.c',\n", "prefixes": [ "v4", "08/23" ] }