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GET /api/patches/137165/?format=api
{ "id": 137165, "url": "http://patches.dpdk.org/api/patches/137165/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1708762927-14126-19-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1708762927-14126-19-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1708762927-14126-19-git-send-email-roretzla@linux.microsoft.com", "date": "2024-02-24T08:22:03", "name": "[v5,18/22] net/mlx5: use mbuf descriptor accessors", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "bfc49eb67c056eaa39543283abe3174768e3a29a", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1708762927-14126-19-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31208, "url": "http://patches.dpdk.org/api/series/31208/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31208", "date": "2024-02-24T08:21:46", "name": "stop using RTE_MARKER extensions", "version": 5, "mbox": "http://patches.dpdk.org/series/31208/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/137165/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/137165/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6F13043BBD;\n\tSat, 24 Feb 2024 09:25:36 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1AEFA42DE6;\n\tSat, 24 Feb 2024 09:24:12 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 92739402E7\n for <dev@dpdk.org>; Sat, 24 Feb 2024 09:22:13 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 49E6D20B74D2; Sat, 24 Feb 2024 00:22:11 -0800 (PST)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 49E6D20B74D2", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1708762932;\n bh=+rUj1bkRnFMiyvfyg8aAKrMxMOXM07Dp0u+ywDYKi9E=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=OCRFqQVmnT65F12eNdkdek8pJR+LhVu1z3+t5drXqTT+1bLMF47kAQG5UXI1hlO3/\n w25SWtissQarM+74iM+KB+1ogq4pKneW8P1pPH0lMMv6K1OrT6y/qpP1bT4sw4XVXN\n Ark5AbNnTImR9STsVlZJ1VbOe07t8IbZ24xn0mnU=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "Ajit Khaparde <ajit.khaparde@broadcom.com>,\n Andrew Boyer <andrew.boyer@amd.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Chenbo Xia <chenbox@nvidia.com>, Chengwen Feng <fengchengwen@huawei.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n Hyong Youb Kim <hyonkim@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jie Hai <haijie1@huawei.com>, Jingjing Wu <jingjing.wu@intel.com>,\n John Daley <johndale@cisco.com>, Kevin Laatz <kevin.laatz@intel.com>,\n Kiran Kumar K <kirankumark@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>, Ori Kam <orika@nvidia.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Satha Rao <skoteshwar@marvell.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, mb@smartsharesystems.com,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v5 18/22] net/mlx5: use mbuf descriptor accessors", "Date": "Sat, 24 Feb 2024 00:22:03 -0800", "Message-Id": "<1708762927-14126-19-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1708762927-14126-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1706657173-26166-1-git-send-email-roretzla@linux.microsoft.com>\n <1708762927-14126-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Use\nnew rte_mbuf_rearm_data and rte_mbuf_rx_descriptor_fields1 accessors\nthat provide a compatible type pointer without using the marker fields.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n drivers/net/mlx5/mlx5_rxq.c | 2 +-\n drivers/net/mlx5/mlx5_rxtx_vec_altivec.h | 28 ++++++++++++++--------------\n drivers/net/mlx5/mlx5_rxtx_vec_neon.h | 20 ++++++++++----------\n drivers/net/mlx5/mlx5_rxtx_vec_sse.h | 28 ++++++++++++++--------------\n 4 files changed, 39 insertions(+), 39 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex ca2eeed..b854418 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -200,7 +200,7 @@\n \t\t */\n \t\trte_compiler_barrier();\n \t\trxq->mbuf_initializer =\n-\t\t\t*(rte_xmm_t *)&mbuf_init->rearm_data;\n+\t\t\t*(rte_xmm_t *)rte_mbuf_rearm_data(mbuf_init);\n \t\t/* Padding with a fake mbuf for vectorized Rx. */\n \t\tfor (j = 0; j < MLX5_VPMD_DESCS_PER_LOOP; ++j)\n \t\t\t(*rxq->elts)[elts_n + j] = &rxq->fake_mbuf;\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\nindex cccfa7f..9349c21 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_altivec.h\n@@ -101,10 +101,10 @@\n \tuint16_t pkts_n = mcqe_n;\n \tconst __vector unsigned char rearm =\n \t\t(__vector unsigned char)vec_vsx_ld(0,\n-\t\t(signed int const *)&t_pkt->rearm_data);\n+\t\t(signed int const *)rte_mbuf_rearm_data(t_pkt));\n \tconst __vector unsigned char rxdf =\n \t\t(__vector unsigned char)vec_vsx_ld(0,\n-\t\t(signed int const *)&t_pkt->rx_descriptor_fields1);\n+\t\t(signed int const *)rte_mbuf_rx_descriptor_fields1(t_pkt));\n \tconst __vector unsigned char crc_adj =\n \t\t(__vector unsigned char)(__vector unsigned short){\n \t\t\t0, 0, rxq->crc_present * RTE_ETHER_CRC_LEN, 0,\n@@ -173,9 +173,9 @@\n \n \t\t/* B.1 store rearm data to mbuf. */\n \t\t*(__vector unsigned char *)\n-\t\t\t&elts[pos]->rearm_data = rearm;\n+\t\t\trte_mbuf_rearm_data(elts[pos]) = rearm;\n \t\t*(__vector unsigned char *)\n-\t\t\t&elts[pos + 1]->rearm_data = rearm;\n+\t\t\trte_mbuf_rearm_data(elts[pos + 1]) = rearm;\n \n \t\t/* C.1 combine data from mCQEs with rx_descriptor_fields1. */\n \t\trxdf1 = vec_perm(mcqe1, zero, shuf_mask1);\n@@ -195,15 +195,15 @@\n \n \t\t/* D.1 store rx_descriptor_fields1. */\n \t\t*(__vector unsigned char *)\n-\t\t\t&elts[pos]->rx_descriptor_fields1 = rxdf1;\n+\t\t\trte_mbuf_rx_descriptor_fields1(elts[pos]) = rxdf1;\n \t\t*(__vector unsigned char *)\n-\t\t\t&elts[pos + 1]->rx_descriptor_fields1 = rxdf2;\n+\t\t\trte_mbuf_rx_descriptor_fields1(elts[pos + 1]) = rxdf2;\n \n \t\t/* B.1 store rearm data to mbuf. */\n \t\t*(__vector unsigned char *)\n-\t\t\t&elts[pos + 2]->rearm_data = rearm;\n+\t\t\trte_mbuf_rearm_data(elts[pos + 2]) = rearm;\n \t\t*(__vector unsigned char *)\n-\t\t\t&elts[pos + 3]->rearm_data = rearm;\n+\t\t\trte_mbuf_rearm_data(elts[pos + 3]) = rearm;\n \n \t\t/* C.1 combine data from mCQEs with rx_descriptor_fields1. */\n \t\trxdf1 = vec_perm(mcqe2, zero, shuf_mask1);\n@@ -223,9 +223,9 @@\n \n \t\t/* D.1 store rx_descriptor_fields1. */\n \t\t*(__vector unsigned char *)\n-\t\t\t&elts[pos + 2]->rx_descriptor_fields1 = rxdf1;\n+\t\t\trte_mbuf_rx_descriptor_fields1(elts[pos + 2]) = rxdf1;\n \t\t*(__vector unsigned char *)\n-\t\t\t&elts[pos + 3]->rx_descriptor_fields1 = rxdf2;\n+\t\t\trte_mbuf_rx_descriptor_fields1(elts[pos + 3]) = rxdf2;\n \n #ifdef MLX5_PMD_SOFT_COUNTERS\n \t\tinvalid_mask = (__vector unsigned char)(__vector unsigned long){\n@@ -769,13 +769,13 @@\n \n \t/* Write 8B rearm_data and 8B ol_flags. */\n \tvec_vsx_st(rearm0, 0,\n-\t\t(__vector unsigned char *)&pkts[0]->rearm_data);\n+\t\t(__vector unsigned char *)rte_mbuf_rearm_data(pkts[0]));\n \tvec_vsx_st(rearm1, 0,\n-\t\t(__vector unsigned char *)&pkts[1]->rearm_data);\n+\t\t(__vector unsigned char *)rte_mbuf_rearm_data(pkts[1]));\n \tvec_vsx_st(rearm2, 0,\n-\t\t(__vector unsigned char *)&pkts[2]->rearm_data);\n+\t\t(__vector unsigned char *)rte_mbuf_rearm_data(pkts[2]));\n \tvec_vsx_st(rearm3, 0,\n-\t\t(__vector unsigned char *)&pkts[3]->rearm_data);\n+\t\t(__vector unsigned char *)rte_mbuf_rearm_data(pkts[3]));\n }\n \n /**\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\nindex 3ed6881..97ea620 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_neon.h\n@@ -99,7 +99,7 @@\n \t\tt_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN);\n \tuint16_t pkts_n = mcqe_n;\n \tconst uint64x2_t rearm =\n-\t\tvld1q_u64((void *)&t_pkt->rearm_data);\n+\t\tvld1q_u64((void *)rte_mbuf_rearm_data(t_pkt));\n \tconst uint32x4_t rxdf_mask = {\n \t\t0xffffffff, /* packet_type */\n \t\t0, /* skip pkt_len */\n@@ -107,7 +107,7 @@\n \t\t0, /* skip hash.rss */\n \t};\n \tconst uint8x16_t rxdf =\n-\t\tvandq_u8(vld1q_u8((void *)&t_pkt->rx_descriptor_fields1),\n+\t\tvandq_u8(vld1q_u8(rte_mbuf_rx_descriptor_fields1(t_pkt)),\n \t\t\t vreinterpretq_u8_u32(rxdf_mask));\n \tconst uint16x8_t crc_adj = {\n \t\t0, 0,\n@@ -140,10 +140,10 @@\n \t\trte_prefetch0((void *)(cq + mcqe_n));\n \tfor (pos = 0; pos < mcqe_n; ) {\n \t\tuint8_t *p = (void *)&mcq[pos % 8];\n-\t\tuint8_t *e0 = (void *)&elts[pos]->rearm_data;\n-\t\tuint8_t *e1 = (void *)&elts[pos + 1]->rearm_data;\n-\t\tuint8_t *e2 = (void *)&elts[pos + 2]->rearm_data;\n-\t\tuint8_t *e3 = (void *)&elts[pos + 3]->rearm_data;\n+\t\tuint8_t *e0 = (void *)rte_mbuf_rearm_data(elts[pos]);\n+\t\tuint8_t *e1 = (void *)rte_mbuf_rearm_data(elts[pos + 1]);\n+\t\tuint8_t *e2 = (void *)rte_mbuf_rearm_data(elts[pos + 2]);\n+\t\tuint8_t *e3 = (void *)rte_mbuf_rearm_data(elts[pos + 3]);\n \t\tuint16x4_t byte_cnt;\n #ifdef MLX5_PMD_SOFT_COUNTERS\n \t\tuint16x4_t invalid_mask =\n@@ -513,10 +513,10 @@\n \t\t\t\t\t(vgetq_lane_u32(ol_flags, 0),\n \t\t\t\t\t vreinterpretq_u32_u64(mbuf_init), 2));\n \n-\tvst1q_u64((void *)&pkts[0]->rearm_data, rearm0);\n-\tvst1q_u64((void *)&pkts[1]->rearm_data, rearm1);\n-\tvst1q_u64((void *)&pkts[2]->rearm_data, rearm2);\n-\tvst1q_u64((void *)&pkts[3]->rearm_data, rearm3);\n+\tvst1q_u64((void *)rte_mbuf_rearm_data(pkts[0]), rearm0);\n+\tvst1q_u64((void *)rte_mbuf_rearm_data(pkts[1]), rearm1);\n+\tvst1q_u64((void *)rte_mbuf_rearm_data(pkts[2]), rearm2);\n+\tvst1q_u64((void *)rte_mbuf_rearm_data(pkts[3]), rearm3);\n }\n \n /**\ndiff --git a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\nindex 2bdd1f6..088ce37 100644\n--- a/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n+++ b/drivers/net/mlx5/mlx5_rxtx_vec_sse.h\n@@ -98,9 +98,9 @@\n \t\tt_pkt->data_len + (rxq->crc_present * RTE_ETHER_CRC_LEN);\n \tuint16_t pkts_n = mcqe_n;\n \tconst __m128i rearm =\n-\t\t_mm_loadu_si128((__m128i *)&t_pkt->rearm_data);\n+\t\t_mm_loadu_si128((__m128i *)rte_mbuf_rearm_data(t_pkt));\n \tconst __m128i rxdf =\n-\t\t_mm_loadu_si128((__m128i *)&t_pkt->rx_descriptor_fields1);\n+\t\t_mm_loadu_si128((__m128i *)rte_mbuf_rx_descriptor_fields1(t_pkt));\n \tconst __m128i crc_adj =\n \t\t_mm_set_epi16(0, 0, 0,\n \t\t\t rxq->crc_present * RTE_ETHER_CRC_LEN,\n@@ -145,8 +145,8 @@\n \t\tmcqe1 = _mm_loadu_si128((__m128i *)&mcq[pos % 8]);\n \t\tmcqe2 = _mm_loadu_si128((__m128i *)&mcq[pos % 8 + 2]);\n \t\t/* B.1 store rearm data to mbuf. */\n-\t\t_mm_storeu_si128((__m128i *)&elts[pos]->rearm_data, rearm);\n-\t\t_mm_storeu_si128((__m128i *)&elts[pos + 1]->rearm_data, rearm);\n+\t\t_mm_storeu_si128((__m128i *)rte_mbuf_rearm_data(elts[pos]), rearm);\n+\t\t_mm_storeu_si128((__m128i *)rte_mbuf_rearm_data(elts[pos + 1]), rearm);\n \t\t/* C.1 combine data from mCQEs with rx_descriptor_fields1. */\n \t\trxdf1 = _mm_shuffle_epi8(mcqe1, shuf_mask1);\n \t\trxdf2 = _mm_shuffle_epi8(mcqe1, shuf_mask2);\n@@ -156,14 +156,14 @@\n \t\trxdf2 = _mm_blend_epi16(rxdf2, rxdf, 0x23);\n \t\t/* D.1 store rx_descriptor_fields1. */\n \t\t_mm_storeu_si128((__m128i *)\n-\t\t\t\t &elts[pos]->rx_descriptor_fields1,\n+\t\t\t\t rte_mbuf_rx_descriptor_fields1(elts[pos]),\n \t\t\t\t rxdf1);\n \t\t_mm_storeu_si128((__m128i *)\n-\t\t\t\t &elts[pos + 1]->rx_descriptor_fields1,\n+\t\t\t\t rte_mbuf_rx_descriptor_fields1(elts[pos + 1]),\n \t\t\t\t rxdf2);\n \t\t/* B.1 store rearm data to mbuf. */\n-\t\t_mm_storeu_si128((__m128i *)&elts[pos + 2]->rearm_data, rearm);\n-\t\t_mm_storeu_si128((__m128i *)&elts[pos + 3]->rearm_data, rearm);\n+\t\t_mm_storeu_si128((__m128i *)rte_mbuf_rearm_data(elts[pos + 2]), rearm);\n+\t\t_mm_storeu_si128((__m128i *)rte_mbuf_rearm_data(elts[pos + 3]), rearm);\n \t\t/* C.1 combine data from mCQEs with rx_descriptor_fields1. */\n \t\trxdf1 = _mm_shuffle_epi8(mcqe2, shuf_mask1);\n \t\trxdf2 = _mm_shuffle_epi8(mcqe2, shuf_mask2);\n@@ -173,10 +173,10 @@\n \t\trxdf2 = _mm_blend_epi16(rxdf2, rxdf, 0x23);\n \t\t/* D.1 store rx_descriptor_fields1. */\n \t\t_mm_storeu_si128((__m128i *)\n-\t\t\t\t &elts[pos + 2]->rx_descriptor_fields1,\n+\t\t\t\t rte_mbuf_rx_descriptor_fields1(elts[pos + 2]),\n \t\t\t\t rxdf1);\n \t\t_mm_storeu_si128((__m128i *)\n-\t\t\t\t &elts[pos + 3]->rx_descriptor_fields1,\n+\t\t\t\t rte_mbuf_rx_descriptor_fields1(elts[pos + 3]),\n \t\t\t\t rxdf2);\n #ifdef MLX5_PMD_SOFT_COUNTERS\n \t\tinvalid_mask = _mm_set_epi64x(0,\n@@ -511,10 +511,10 @@\n \trearm2 = _mm_blend_epi16(mbuf_init, ol_flags, 0x30);\n \trearm3 = _mm_blend_epi16(mbuf_init, _mm_srli_si128(ol_flags, 4), 0x30);\n \t/* Write 8B rearm_data and 8B ol_flags. */\n-\t_mm_store_si128((__m128i *)&pkts[0]->rearm_data, rearm0);\n-\t_mm_store_si128((__m128i *)&pkts[1]->rearm_data, rearm1);\n-\t_mm_store_si128((__m128i *)&pkts[2]->rearm_data, rearm2);\n-\t_mm_store_si128((__m128i *)&pkts[3]->rearm_data, rearm3);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(pkts[0]), rearm0);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(pkts[1]), rearm1);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(pkts[2]), rearm2);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(pkts[3]), rearm3);\n }\n \n /**\n", "prefixes": [ "v5", "18/22" ] }