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GET /api/patches/137159/?format=api
{ "id": 137159, "url": "http://patches.dpdk.org/api/patches/137159/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1708762927-14126-15-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1708762927-14126-15-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1708762927-14126-15-git-send-email-roretzla@linux.microsoft.com", "date": "2024-02-24T08:21:59", "name": "[v5,14/22] net/iavf: use mbuf descriptor accessors", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a49e2f94ae84679e0006a2969ed9fea0c3d84fa5", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1708762927-14126-15-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 31208, "url": "http://patches.dpdk.org/api/series/31208/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31208", "date": "2024-02-24T08:21:46", "name": "stop using RTE_MARKER extensions", "version": 5, "mbox": "http://patches.dpdk.org/series/31208/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/137159/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/137159/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C851443BBD;\n\tSat, 24 Feb 2024 09:25:01 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CB52F42DA7;\n\tSat, 24 Feb 2024 09:24:04 +0100 (CET)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 5D460402C8\n for <dev@dpdk.org>; Sat, 24 Feb 2024 09:22:13 +0100 (CET)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 0ACBC20B74CE; Sat, 24 Feb 2024 00:22:11 -0800 (PST)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 0ACBC20B74CE", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1708762932;\n bh=GRH8jix1bBTqdTqwCtwYVzxlYvrVOoa444KnTVEB44A=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=JUZbujq56ZQhE3qt2byaFvdE5uMWMoZ92HAKLrfDnJ51MnE2fhKpToOmjoV0kcU7M\n 2e2pTPF3KYBtnKfP6bLp3W2mWY6EXdWgvV6WTecpdC8eooow1ySQ2fR+YDzeq55TiN\n b2UUb5BiJhOf9PBaPyJDgLlSMdXJ81t4rmGQ/rhI=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "Ajit Khaparde <ajit.khaparde@broadcom.com>,\n Andrew Boyer <andrew.boyer@amd.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Chenbo Xia <chenbox@nvidia.com>, Chengwen Feng <fengchengwen@huawei.com>,\n Dariusz Sosnowski <dsosnowski@nvidia.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n Hyong Youb Kim <hyonkim@cisco.com>, Jerin Jacob <jerinj@marvell.com>,\n Jie Hai <haijie1@huawei.com>, Jingjing Wu <jingjing.wu@intel.com>,\n John Daley <johndale@cisco.com>, Kevin Laatz <kevin.laatz@intel.com>,\n Kiran Kumar K <kirankumark@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Maciej Czekaj <mczekaj@marvell.com>, Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Nithin Dabilpuram <ndabilpuram@marvell.com>, Ori Kam <orika@nvidia.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Satha Rao <skoteshwar@marvell.com>,\n Somnath Kotur <somnath.kotur@broadcom.com>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Yisen Zhuang <yisen.zhuang@huawei.com>,\n Yuying Zhang <Yuying.Zhang@intel.com>, mb@smartsharesystems.com,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v5 14/22] net/iavf: use mbuf descriptor accessors", "Date": "Sat, 24 Feb 2024 00:21:59 -0800", "Message-Id": "<1708762927-14126-15-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1708762927-14126-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1706657173-26166-1-git-send-email-roretzla@linux.microsoft.com>\n <1708762927-14126-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "RTE_MARKER typedefs are a GCC extension unsupported by MSVC. Use\nnew rte_mbuf_rearm_data and rte_mbuf_rx_descriptor_fields1 accessors\nthat provide a compatible type pointer without using the marker fields.\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n drivers/net/iavf/iavf_rxtx_vec_avx2.c | 32 ++++++++++++++++----------------\n drivers/net/iavf/iavf_rxtx_vec_avx512.c | 32 ++++++++++++++++----------------\n drivers/net/iavf/iavf_rxtx_vec_common.h | 4 +---\n drivers/net/iavf/iavf_rxtx_vec_neon.c | 16 ++++++++--------\n drivers/net/iavf/iavf_rxtx_vec_sse.c | 32 ++++++++++++++++----------------\n 5 files changed, 57 insertions(+), 59 deletions(-)", "diff": "diff --git a/drivers/net/iavf/iavf_rxtx_vec_avx2.c b/drivers/net/iavf/iavf_rxtx_vec_avx2.c\nindex 510b4d8..0211e83 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_avx2.c\n+++ b/drivers/net/iavf/iavf_rxtx_vec_avx2.c\n@@ -398,13 +398,13 @@\n \t\trearm2 = _mm256_permute2f128_si256(rearm2, mb2_3, 0x20);\n \t\trearm0 = _mm256_permute2f128_si256(rearm0, mb0_1, 0x20);\n \t\t/* write to mbuf */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 6]),\n \t\t\t\t rearm6);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 4]),\n \t\t\t\t rearm4);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 2]),\n \t\t\t\t rearm2);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 0]),\n \t\t\t\t rearm0);\n \n \t\t/* repeat for the odd mbufs */\n@@ -427,13 +427,13 @@\n \t\trearm3 = _mm256_blend_epi32(rearm3, mb2_3, 0xF0);\n \t\trearm1 = _mm256_blend_epi32(rearm1, mb0_1, 0xF0);\n \t\t/* again write to mbufs */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 7]),\n \t\t\t\t rearm7);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 5]),\n \t\t\t\t rearm5);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 3]),\n \t\t\t\t rearm3);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 1]),\n \t\t\t\t rearm1);\n \n \t\t/* extract and record EOP bit */\n@@ -1305,13 +1305,13 @@\n \t\trearm2 = _mm256_permute2f128_si256(rearm2, mb2_3, 0x20);\n \t\trearm0 = _mm256_permute2f128_si256(rearm0, mb0_1, 0x20);\n \t\t/* write to mbuf */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 6]),\n \t\t\t\t rearm6);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 4]),\n \t\t\t\t rearm4);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 2]),\n \t\t\t\t rearm2);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 0]),\n \t\t\t\t rearm0);\n \n \t\t/* repeat for the odd mbufs */\n@@ -1334,13 +1334,13 @@\n \t\trearm3 = _mm256_blend_epi32(rearm3, mb2_3, 0xF0);\n \t\trearm1 = _mm256_blend_epi32(rearm1, mb0_1, 0xF0);\n \t\t/* again write to mbufs */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 7]),\n \t\t\t\t rearm7);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 5]),\n \t\t\t\t rearm5);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 3]),\n \t\t\t\t rearm3);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 1]),\n \t\t\t\t rearm1);\n \n \t\t/* extract and record EOP bit */\ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_avx512.c b/drivers/net/iavf/iavf_rxtx_vec_avx512.c\nindex 3bb6f30..950ec91 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_avx512.c\n+++ b/drivers/net/iavf/iavf_rxtx_vec_avx512.c\n@@ -450,13 +450,13 @@\n \t\t\trearm0 = _mm256_permute2f128_si256(mbuf_init, mb0_1, 0x20);\n \t\t}\n \t\t/* write to mbuf */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 6]),\n \t\t\t\t rearm6);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 4]),\n \t\t\t\t rearm4);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 2]),\n \t\t\t\t rearm2);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 0]),\n \t\t\t\t rearm0);\n \n \t\t/* repeat for the odd mbufs */\n@@ -486,13 +486,13 @@\n \t\t\trearm1 = _mm256_blend_epi32(mbuf_init, mb0_1, 0xF0);\n \t\t}\n \t\t/* again write to mbufs */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 7]),\n \t\t\t\t rearm7);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 5]),\n \t\t\t\t rearm5);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 3]),\n \t\t\t\t rearm3);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 1]),\n \t\t\t\t rearm1);\n \n \t\t/* extract and record EOP bit */\n@@ -1461,13 +1461,13 @@\n \t\trearm2 = _mm256_permute2f128_si256(rearm2, mb2_3, 0x20);\n \t\trearm0 = _mm256_permute2f128_si256(rearm0, mb0_1, 0x20);\n \t\t/* write to mbuf */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 6]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 6]),\n \t\t\t\t rearm6);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 4]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 4]),\n \t\t\t\t rearm4);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 2]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 2]),\n \t\t\t\t rearm2);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 0]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 0]),\n \t\t\t\t rearm0);\n \n \t\t/* repeat for the odd mbufs */\n@@ -1490,13 +1490,13 @@\n \t\trearm3 = _mm256_blend_epi32(rearm3, mb2_3, 0xF0);\n \t\trearm1 = _mm256_blend_epi32(rearm1, mb0_1, 0xF0);\n \t\t/* again write to mbufs */\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 7]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 7]),\n \t\t\t\t rearm7);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 5]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 5]),\n \t\t\t\t rearm5);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 3]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 3]),\n \t\t\t\t rearm3);\n-\t\t_mm256_storeu_si256((__m256i *)&rx_pkts[i + 1]->rearm_data,\n+\t\t_mm256_storeu_si256((__m256i *)rte_mbuf_rearm_data(rx_pkts[i + 1]),\n \t\t\t\t rearm1);\n \n \t\t/* extract and record EOP bit */\ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_common.h b/drivers/net/iavf/iavf_rxtx_vec_common.h\nindex 5c52200..71e3644 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_common.h\n+++ b/drivers/net/iavf/iavf_rxtx_vec_common.h\n@@ -197,7 +197,6 @@\n static inline int\n iavf_rxq_vec_setup_default(struct iavf_rx_queue *rxq)\n {\n-\tuintptr_t p;\n \tstruct rte_mbuf mb_def = { .buf_addr = 0 }; /* zeroed mbuf */\n \n \tmb_def.nb_segs = 1;\n@@ -207,8 +206,7 @@\n \n \t/* prevent compiler reordering: rearm_data covers previous fields */\n \trte_compiler_barrier();\n-\tp = (uintptr_t)&mb_def.rearm_data;\n-\trxq->mbuf_initializer = *(uint64_t *)p;\n+\trxq->mbuf_initializer = *rte_mbuf_rearm_data(&mb_def);\n \treturn 0;\n }\n \ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_neon.c b/drivers/net/iavf/iavf_rxtx_vec_neon.c\nindex 83825aa..d7ea940 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_neon.c\n+++ b/drivers/net/iavf/iavf_rxtx_vec_neon.c\n@@ -159,10 +159,10 @@\n \trearm2 = vsetq_lane_u64(vgetq_lane_u32(vlan0, 2), mbuf_init, 1);\n \trearm3 = vsetq_lane_u64(vgetq_lane_u32(vlan0, 3), mbuf_init, 1);\n \n-\tvst1q_u64((uint64_t *)&rx_pkts[0]->rearm_data, rearm0);\n-\tvst1q_u64((uint64_t *)&rx_pkts[1]->rearm_data, rearm1);\n-\tvst1q_u64((uint64_t *)&rx_pkts[2]->rearm_data, rearm2);\n-\tvst1q_u64((uint64_t *)&rx_pkts[3]->rearm_data, rearm3);\n+\tvst1q_u64(rte_mbuf_rearm_data(rx_pkts[0]), rearm0);\n+\tvst1q_u64(rte_mbuf_rearm_data(rx_pkts[1]), rearm1);\n+\tvst1q_u64(rte_mbuf_rearm_data(rx_pkts[2]), rearm2);\n+\tvst1q_u64(rte_mbuf_rearm_data(rx_pkts[3]), rearm3);\n }\n \n #define PKTLEN_SHIFT 10\n@@ -332,13 +332,13 @@\n \t\tpkt_mb1 = vreinterpretq_u8_u16(tmp);\n \n \t\t/* D.3 copy final data to rx_pkts */\n-\t\tvst1q_u8((void *)&rx_pkts[pos + 3]->rx_descriptor_fields1,\n+\t\tvst1q_u8(rte_mbuf_rx_descriptor_fields1(rx_pkts[pos + 3]),\n \t\t\t\tpkt_mb4);\n-\t\tvst1q_u8((void *)&rx_pkts[pos + 2]->rx_descriptor_fields1,\n+\t\tvst1q_u8(rte_mbuf_rx_descriptor_fields1(rx_pkts[pos + 2]),\n \t\t\t\tpkt_mb3);\n-\t\tvst1q_u8((void *)&rx_pkts[pos + 1]->rx_descriptor_fields1,\n+\t\tvst1q_u8(rte_mbuf_rx_descriptor_fields1(rx_pkts[pos + 1]),\n \t\t\t\tpkt_mb2);\n-\t\tvst1q_u8((void *)&rx_pkts[pos]->rx_descriptor_fields1,\n+\t\tvst1q_u8(rte_mbuf_rx_descriptor_fields1(rx_pkts[pos]),\n \t\t\t\tpkt_mb1);\n \n \t\tdesc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl);\ndiff --git a/drivers/net/iavf/iavf_rxtx_vec_sse.c b/drivers/net/iavf/iavf_rxtx_vec_sse.c\nindex 96f187f..634d9f5 100644\n--- a/drivers/net/iavf/iavf_rxtx_vec_sse.c\n+++ b/drivers/net/iavf/iavf_rxtx_vec_sse.c\n@@ -183,10 +183,10 @@\n \t\t\toffsetof(struct rte_mbuf, rearm_data) + 8);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=\n \t\t\tRTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16));\n-\t_mm_store_si128((__m128i *)&rx_pkts[0]->rearm_data, rearm0);\n-\t_mm_store_si128((__m128i *)&rx_pkts[1]->rearm_data, rearm1);\n-\t_mm_store_si128((__m128i *)&rx_pkts[2]->rearm_data, rearm2);\n-\t_mm_store_si128((__m128i *)&rx_pkts[3]->rearm_data, rearm3);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(rx_pkts[0]), rearm0);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(rx_pkts[1]), rearm1);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(rx_pkts[2]), rearm2);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(rx_pkts[3]), rearm3);\n }\n \n static inline __m128i\n@@ -416,10 +416,10 @@\n \t\t\t offsetof(struct rte_mbuf, rearm_data) + 8);\n \tRTE_BUILD_BUG_ON(offsetof(struct rte_mbuf, rearm_data) !=\n \t\t\t RTE_ALIGN(offsetof(struct rte_mbuf, rearm_data), 16));\n-\t_mm_store_si128((__m128i *)&rx_pkts[0]->rearm_data, rearm0);\n-\t_mm_store_si128((__m128i *)&rx_pkts[1]->rearm_data, rearm1);\n-\t_mm_store_si128((__m128i *)&rx_pkts[2]->rearm_data, rearm2);\n-\t_mm_store_si128((__m128i *)&rx_pkts[3]->rearm_data, rearm3);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(rx_pkts[0]), rearm0);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(rx_pkts[1]), rearm1);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(rx_pkts[2]), rearm2);\n+\t_mm_store_si128((__m128i *)rte_mbuf_rearm_data(rx_pkts[3]), rearm3);\n }\n \n #define PKTLEN_SHIFT 10\n@@ -651,10 +651,10 @@\n \n \t\t/* D.3 copy final 3,4 data to rx_pkts */\n \t\t_mm_storeu_si128(\n-\t\t\t(void *)&rx_pkts[pos + 3]->rx_descriptor_fields1,\n+\t\t\trte_mbuf_rx_descriptor_fields1(rx_pkts[pos + 3]),\n \t\t\tpkt_mb4);\n \t\t_mm_storeu_si128(\n-\t\t\t(void *)&rx_pkts[pos + 2]->rx_descriptor_fields1,\n+\t\t\trte_mbuf_rx_descriptor_fields1(rx_pkts[pos + 2]),\n \t\t\tpkt_mb3);\n \n \t\t/* D.2 pkt 1,2 remove crc */\n@@ -689,9 +689,9 @@\n \n \t\t/* D.3 copy final 1,2 data to rx_pkts */\n \t\t_mm_storeu_si128(\n-\t\t\t(void *)&rx_pkts[pos + 1]->rx_descriptor_fields1,\n+\t\t\trte_mbuf_rx_descriptor_fields1(rx_pkts[pos + 1]),\n \t\t\tpkt_mb2);\n-\t\t_mm_storeu_si128((void *)&rx_pkts[pos]->rx_descriptor_fields1,\n+\t\t_mm_storeu_si128(rte_mbuf_rx_descriptor_fields1(rx_pkts[pos]),\n \t\t\t\t pkt_mb1);\n \t\tdesc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl);\n \t\t/* C.4 calc available number of desc */\n@@ -1089,10 +1089,10 @@\n \n \t\t/* D.3 copy final 3,4 data to rx_pkts */\n \t\t_mm_storeu_si128\n-\t\t\t((void *)&rx_pkts[pos + 3]->rx_descriptor_fields1,\n+\t\t\t(rte_mbuf_rx_descriptor_fields1(rx_pkts[pos + 3]),\n \t\t\t pkt_mb3);\n \t\t_mm_storeu_si128\n-\t\t\t((void *)&rx_pkts[pos + 2]->rx_descriptor_fields1,\n+\t\t\t(rte_mbuf_rx_descriptor_fields1(rx_pkts[pos + 2]),\n \t\t\t pkt_mb2);\n \n \t\t/* C* extract and record EOP bit */\n@@ -1116,9 +1116,9 @@\n \n \t\t/* D.3 copy final 1,2 data to rx_pkts */\n \t\t_mm_storeu_si128\n-\t\t\t((void *)&rx_pkts[pos + 1]->rx_descriptor_fields1,\n+\t\t\t(rte_mbuf_rx_descriptor_fields1(rx_pkts[pos + 1]),\n \t\t\t pkt_mb1);\n-\t\t_mm_storeu_si128((void *)&rx_pkts[pos]->rx_descriptor_fields1,\n+\t\t_mm_storeu_si128(rte_mbuf_rx_descriptor_fields1(rx_pkts[pos]),\n \t\t\t\t pkt_mb0);\n \t\tflex_desc_to_ptype_v(descs, &rx_pkts[pos], ptype_tbl);\n \t\t/* C.4 calc available number of desc */\n", "prefixes": [ "v5", "14/22" ] }