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GET /api/patches/136960/?format=api
{ "id": 136960, "url": "http://patches.dpdk.org/api/patches/136960/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240221103221.933238-5-bruce.richardson@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240221103221.933238-5-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240221103221.933238-5-bruce.richardson@intel.com", "date": "2024-02-21T10:32:13", "name": "[v4,04/12] eventdev: cleanup doxygen comments on info structure", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "021d41f1d1cd68b3403e03716f60becef9602be7", "submitter": { "id": 20, "url": "http://patches.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240221103221.933238-5-bruce.richardson@intel.com/mbox/", "series": [ { "id": 31169, "url": "http://patches.dpdk.org/api/series/31169/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31169", "date": "2024-02-21T10:32:09", "name": "improve eventdev API specification/documentation", "version": 4, "mbox": "http://patches.dpdk.org/series/31169/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136960/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/136960/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5A94543B61;\n\tWed, 21 Feb 2024 11:32:56 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 255D040DFD;\n\tWed, 21 Feb 2024 11:32:38 +0100 (CET)", "from mgamail.intel.com (mgamail.intel.com [192.198.163.15])\n by mails.dpdk.org (Postfix) with ESMTP id F2FED40A7A\n for <dev@dpdk.org>; Wed, 21 Feb 2024 11:32:34 +0100 (CET)", "from orviesa007.jf.intel.com ([10.64.159.147])\n by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Feb 2024 02:32:35 -0800", "from silpixa00401385.ir.intel.com ([10.237.214.38])\n by orviesa007.jf.intel.com with ESMTP; 21 Feb 2024 02:32:33 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1708511555; x=1740047555;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=k/5dlU9izFhQpEpGZK+oUdpakEj1XgvZRvY1liU5WP8=;\n b=O6Lit5ODkpnxV/C8/RKcDBRIaaZYuS2WeYIjtzLb4kl2Y7h/0yEJVOmX\n fU2cW09Exz3jNyIaWvzEEbxG+cpfjgZQodt0mRl+yKXg6sURjF5hmJz2j\n cIV5gMb70jUGLDxjg8TvUvVe7vWQX3UOaitOuSKioeq6TLN5HnHhqll8j\n 0Bdx3yF8bdpM1/greRxiSwhX09JJkyZm6mZtWzRvl/ImW5JllSjFYeq4x\n 2+F1P9LG1M24g7hlToZ6g3v5gE+du/c5BBIuSDCypyVjBnkb3IfmQLOoE\n 8BzteRfciZahSSYmInnxR4CeAmzZlWv60WFvH/AZXTWJi/xykBzb0Cee/ g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10990\"; a=\"2800709\"", "E=Sophos;i=\"6.06,175,1705392000\";\n d=\"scan'208\";a=\"2800709\"", "E=Sophos;i=\"6.06,175,1705392000\";\n d=\"scan'208\";a=\"5392992\"" ], "X-ExtLoop1": "1", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org,\n\tjerinj@marvell.com,\n\tmattias.ronnblom@ericsson.com", "Cc": "Bruce Richardson <bruce.richardson@intel.com>", "Subject": "[PATCH v4 04/12] eventdev: cleanup doxygen comments on info structure", "Date": "Wed, 21 Feb 2024 10:32:13 +0000", "Message-Id": "<20240221103221.933238-5-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.40.1", "In-Reply-To": "<20240221103221.933238-1-bruce.richardson@intel.com>", "References": "<20240119174346.108905-1-bruce.richardson@intel.com>\n <20240221103221.933238-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Some small rewording changes to the doxygen comments on struct\nrte_event_dev_info.\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n\n---\nV3: reworked following feedback\n- added closing \".\" on comments\n- added more cross-reference links\n- reworded priority level comments\n---\n lib/eventdev/rte_eventdev.h | 85 +++++++++++++++++++++++++------------\n 1 file changed, 58 insertions(+), 27 deletions(-)", "diff": "diff --git a/lib/eventdev/rte_eventdev.h b/lib/eventdev/rte_eventdev.h\nindex f7b98a6cfa..b9ec3fc45e 100644\n--- a/lib/eventdev/rte_eventdev.h\n+++ b/lib/eventdev/rte_eventdev.h\n@@ -537,57 +537,88 @@ rte_event_dev_socket_id(uint8_t dev_id);\n * Event device information\n */\n struct rte_event_dev_info {\n-\tconst char *driver_name;\t/**< Event driver name */\n-\tstruct rte_device *dev;\t/**< Device information */\n+\tconst char *driver_name;\t/**< Event driver name. */\n+\tstruct rte_device *dev;\t/**< Device information. */\n \tuint32_t min_dequeue_timeout_ns;\n-\t/**< Minimum supported global dequeue timeout(ns) by this device */\n+\t/**< Minimum global dequeue timeout(ns) supported by this device. */\n \tuint32_t max_dequeue_timeout_ns;\n-\t/**< Maximum supported global dequeue timeout(ns) by this device */\n+\t/**< Maximum global dequeue timeout(ns) supported by this device. */\n \tuint32_t dequeue_timeout_ns;\n-\t/**< Configured global dequeue timeout(ns) for this device */\n+\t/**< Configured global dequeue timeout(ns) for this device. */\n \tuint8_t max_event_queues;\n-\t/**< Maximum event_queues supported by this device */\n+\t/**< Maximum event queues supported by this device.\n+\t *\n+\t * This count excludes any queues covered by @ref max_single_link_event_port_queue_pairs.\n+\t */\n \tuint32_t max_event_queue_flows;\n-\t/**< Maximum supported flows in an event queue by this device*/\n+\t/**< Maximum number of flows within an event queue supported by this device. */\n \tuint8_t max_event_queue_priority_levels;\n-\t/**< Maximum number of event queue priority levels by this device.\n-\t * Valid when the device has RTE_EVENT_DEV_CAP_QUEUE_QOS capability\n+\t/**< Maximum number of event queue priority levels supported by this device.\n+\t *\n+\t * Valid when the device has @ref RTE_EVENT_DEV_CAP_QUEUE_QOS capability.\n+\t *\n+\t * The implementation shall normalize priority values specified between\n+\t * @ref RTE_EVENT_DEV_PRIORITY_HIGHEST and @ref RTE_EVENT_DEV_PRIORITY_LOWEST\n+\t * to map them internally to this range of priorities.\n+\t * [For devices supporting a power-of-2 number of priority levels, this\n+\t * normalization will be done via a right-shift operation, so only the top\n+\t * log2(max_levels) bits will be used by the event device.]\n+\t *\n+\t * @see rte_event_queue_conf.priority\n \t */\n \tuint8_t max_event_priority_levels;\n \t/**< Maximum number of event priority levels by this device.\n-\t * Valid when the device has RTE_EVENT_DEV_CAP_EVENT_QOS capability\n+\t *\n+\t * Valid when the device has @ref RTE_EVENT_DEV_CAP_EVENT_QOS capability.\n+\t *\n+\t * The implementation shall normalize priority values specified between\n+\t * @ref RTE_EVENT_DEV_PRIORITY_HIGHEST and @ref RTE_EVENT_DEV_PRIORITY_LOWEST\n+\t * to map them internally to this range of priorities.\n+\t * [For devices supporting a power-of-2 number of priority levels, this\n+\t * normalization will be done via a right-shift operation, so only the top\n+\t * log2(max_levels) bits will be used by the event device.]\n+\t *\n+\t * @see rte_event.priority\n \t */\n \tuint8_t max_event_ports;\n-\t/**< Maximum number of event ports supported by this device */\n+\t/**< Maximum number of event ports supported by this device.\n+\t *\n+\t * This count excludes any ports covered by @ref max_single_link_event_port_queue_pairs.\n+\t */\n \tuint8_t max_event_port_dequeue_depth;\n-\t/**< Maximum number of events can be dequeued at a time from an\n-\t * event port by this device.\n-\t * A device that does not support bulk dequeue will set this as 1.\n+\t/**< Maximum number of events that can be dequeued at a time from an event port\n+\t * on this device.\n+\t *\n+\t * A device that does not support burst dequeue\n+\t * (@ref RTE_EVENT_DEV_CAP_BURST_MODE) will set this to 1.\n \t */\n \tuint32_t max_event_port_enqueue_depth;\n-\t/**< Maximum number of events can be enqueued at a time from an\n-\t * event port by this device.\n-\t * A device that does not support bulk enqueue will set this as 1.\n+\t/**< Maximum number of events that can be enqueued at a time to an event port\n+\t * on this device.\n+\t *\n+\t * A device that does not support burst enqueue\n+\t * (@ref RTE_EVENT_DEV_CAP_BURST_MODE) will set this to 1.\n \t */\n \tuint8_t max_event_port_links;\n-\t/**< Maximum number of queues that can be linked to a single event\n-\t * port by this device.\n+\t/**< Maximum number of queues that can be linked to a single event port on this device.\n \t */\n \tint32_t max_num_events;\n \t/**< A *closed system* event dev has a limit on the number of events it\n-\t * can manage at a time. An *open system* event dev does not have a\n-\t * limit and will specify this as -1.\n+\t * can manage at a time.\n+\t * Once the number of events tracked by an eventdev exceeds this number,\n+\t * any enqueues of NEW events will fail.\n+\t * An *open system* event dev does not have a limit and will specify this as -1.\n \t */\n \tuint32_t event_dev_cap;\n-\t/**< Event device capabilities(RTE_EVENT_DEV_CAP_)*/\n+\t/**< Event device capabilities flags (RTE_EVENT_DEV_CAP_*). */\n \tuint8_t max_single_link_event_port_queue_pairs;\n-\t/**< Maximum number of event ports and queues that are optimized for\n-\t * (and only capable of) single-link configurations supported by this\n-\t * device. These ports and queues are not accounted for in\n-\t * max_event_ports or max_event_queues.\n+\t/**< Maximum number of event ports and queues, supported by this device,\n+\t * that are optimized for (and only capable of) single-link configurations.\n+\t * These ports and queues are not accounted for in @ref max_event_ports\n+\t * or @ref max_event_queues.\n \t */\n \tuint8_t max_profiles_per_port;\n-\t/**< Maximum number of event queue profiles per event port.\n+\t/**< Maximum number of event queue link profiles per event port.\n \t * A device that doesn't support multiple profiles will set this as 1.\n \t */\n };\n", "prefixes": [ "v4", "04/12" ] }