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GET /api/patches/136649/?format=api
{ "id": 136649, "url": "http://patches.dpdk.org/api/patches/136649/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240213165737.1534180-2-cristian.dumitrescu@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240213165737.1534180-2-cristian.dumitrescu@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240213165737.1534180-2-cristian.dumitrescu@intel.com", "date": "2024-02-13T16:57:35", "name": "[1/3] pipeline: add new instruction for upper half of IPv6 address", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "1625a4e448e936a6c42a056039c00bcb657e9883", "submitter": { "id": 19, "url": "http://patches.dpdk.org/api/people/19/?format=api", "name": "Cristian Dumitrescu", "email": "cristian.dumitrescu@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240213165737.1534180-2-cristian.dumitrescu@intel.com/mbox/", "series": [ { "id": 31092, "url": "http://patches.dpdk.org/api/series/31092/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31092", "date": "2024-02-13T16:57:36", "name": "pipeline: extend the IPv6 support", "version": 1, "mbox": "http://patches.dpdk.org/series/31092/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136649/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/136649/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 9BEA643B0C;\n\tTue, 13 Feb 2024 17:58:58 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2D71842E20;\n\tTue, 13 Feb 2024 17:58:51 +0100 (CET)", "from mgamail.intel.com (mgamail.intel.com [198.175.65.17])\n by mails.dpdk.org (Postfix) with ESMTP id 560CA42E0E\n for <dev@dpdk.org>; Tue, 13 Feb 2024 17:58:47 +0100 (CET)", "from fmviesa007.fm.intel.com ([10.60.135.147])\n by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Feb 2024 08:57:40 -0800", "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.223.184])\n by fmviesa007.fm.intel.com with ESMTP; 13 Feb 2024 08:57:39 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1707843527; x=1739379527;\n h=from:to:subject:date:message-id:in-reply-to:references:\n mime-version:content-transfer-encoding;\n bh=oafySCeKjAc9kLr9+t0dl6lvpHcxU07qhL+D6rE6zOs=;\n b=QDiHI6KKa0qmuJK4JRzy/GtHLnAFdluE59UAOUQqBh5nIR/6dDwE8P8N\n scipvt7vLGqGp9OEzJrzTPGCWLJdLrM20isn6LOTRPdsc9/sn+B1pAR/0\n aCrqGM/brILXbkLBt1fbhwzv7bi38jc51MqDcXkmNvfDbPzEwGoRqVosZ\n pCE8zHkf+RHl+8MWW7XcyNcjvg88Ruz9G25AFz2eMbhKJEzAyE4Wa6yYm\n kOR7EmZb2dEtzHyhTF9FfIMpv0mXBp2ldyaWnoWDgRbG/Mve9ekizDbXg\n GpwJqKxq2Oyq8MfS1tW4sSWh8ZmShFZf8Y/zBKJ8USkJLIOCM8ELT9USM A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10982\"; a=\"2000498\"", "E=Sophos;i=\"6.06,157,1705392000\";\n d=\"scan'208\";a=\"2000498\"", "E=Sophos;i=\"6.06,157,1705392000\";\n d=\"scan'208\";a=\"2855753\"" ], "X-ExtLoop1": "1", "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>", "To": "dev@dpdk.org", "Subject": "[PATCH 1/3] pipeline: add new instruction for upper half of IPv6\n address", "Date": "Tue, 13 Feb 2024 16:57:35 +0000", "Message-Id": "<20240213165737.1534180-2-cristian.dumitrescu@intel.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20240213165737.1534180-1-cristian.dumitrescu@intel.com>", "References": "<20240213165737.1534180-1-cristian.dumitrescu@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added new instruction called \"movh\" to read/write the upper half of an\nIPv6 address, i.e. bits 127-64 of a 128-bit field.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\n---\n lib/pipeline/rte_swx_pipeline.c | 99 ++++++++++++++++++++++++\n lib/pipeline/rte_swx_pipeline_internal.h | 52 ++++++++++++-\n 2 files changed, 147 insertions(+), 4 deletions(-)", "diff": "diff --git a/lib/pipeline/rte_swx_pipeline.c b/lib/pipeline/rte_swx_pipeline.c\nindex da37eda231..12f335005d 100644\n--- a/lib/pipeline/rte_swx_pipeline.c\n+++ b/lib/pipeline/rte_swx_pipeline.c\n@@ -3359,6 +3359,61 @@ instr_mov_i_exec(struct rte_swx_pipeline *p)\n \tthread_ip_inc(p);\n }\n \n+/*\n+ * movh.\n+ */\n+static int\n+instr_movh_translate(struct rte_swx_pipeline *p,\n+\t\t struct action *action,\n+\t\t char **tokens,\n+\t\t int n_tokens,\n+\t\t struct instruction *instr,\n+\t\t struct instruction_data *data __rte_unused)\n+{\n+\tchar *dst = tokens[1], *src = tokens[2];\n+\tstruct field *fdst, *fsrc;\n+\tuint32_t dst_struct_id = 0, src_struct_id = 0;\n+\n+\tCHECK(n_tokens == 3, EINVAL);\n+\n+\tfdst = struct_field_parse(p, NULL, dst, &dst_struct_id);\n+\tCHECK(fdst, EINVAL);\n+\tCHECK(!fdst->var_size, EINVAL);\n+\n+\tfsrc = struct_field_parse(p, action, src, &src_struct_id);\n+\tCHECK(fsrc, EINVAL);\n+\tCHECK(!fsrc->var_size, EINVAL);\n+\n+\t/* MOVH_64_128, MOVH_128_64. */\n+\tif ((dst[0] == 'h' && fdst->n_bits == 64 && fsrc->n_bits == 128) ||\n+\t (fdst->n_bits == 128 && src[0] == 'h' && fsrc->n_bits == 64)) {\n+\t\tinstr->type = INSTR_MOVH;\n+\n+\t\tinstr->mov.dst.struct_id = (uint8_t)dst_struct_id;\n+\t\tinstr->mov.dst.n_bits = fdst->n_bits;\n+\t\tinstr->mov.dst.offset = fdst->offset / 8;\n+\n+\t\tinstr->mov.src.struct_id = (uint8_t)src_struct_id;\n+\t\tinstr->mov.src.n_bits = fsrc->n_bits;\n+\t\tinstr->mov.src.offset = fsrc->offset / 8;\n+\t\treturn 0;\n+\t}\n+\n+\tCHECK(0, EINVAL);\n+}\n+\n+static inline void\n+instr_movh_exec(struct rte_swx_pipeline *p)\n+{\n+\tstruct thread *t = &p->threads[p->thread_id];\n+\tstruct instruction *ip = t->ip;\n+\n+\t__instr_movh_exec(p, t, ip);\n+\n+\t/* Thread. */\n+\tthread_ip_inc(p);\n+}\n+\n /*\n * dma.\n */\n@@ -6427,6 +6482,14 @@ instr_translate(struct rte_swx_pipeline *p,\n \t\t\t\t\t instr,\n \t\t\t\t\t data);\n \n+\tif (!strcmp(tokens[tpos], \"movh\"))\n+\t\treturn instr_movh_translate(p,\n+\t\t\t\t\t action,\n+\t\t\t\t\t &tokens[tpos],\n+\t\t\t\t\t n_tokens - tpos,\n+\t\t\t\t\t instr,\n+\t\t\t\t\t data);\n+\n \tif (!strcmp(tokens[tpos], \"add\"))\n \t\treturn instr_alu_add_translate(p,\n \t\t\t\t\t action,\n@@ -7463,6 +7526,8 @@ static instr_exec_t instruction_table[] = {\n \t[INSTR_MOV_128_32] = instr_mov_128_32_exec,\n \t[INSTR_MOV_I] = instr_mov_i_exec,\n \n+\t[INSTR_MOVH] = instr_movh_exec,\n+\n \t[INSTR_DMA_HT] = instr_dma_ht_exec,\n \t[INSTR_DMA_HT2] = instr_dma_ht2_exec,\n \t[INSTR_DMA_HT3] = instr_dma_ht3_exec,\n@@ -11788,6 +11853,8 @@ instr_type_to_name(struct instruction *instr)\n \tcase INSTR_MOV_128_32: return \"INSTR_MOV_128_32\";\n \tcase INSTR_MOV_I: return \"INSTR_MOV_I\";\n \n+\tcase INSTR_MOVH: return \"INSTR_MOVH\";\n+\n \tcase INSTR_DMA_HT: return \"INSTR_DMA_HT\";\n \tcase INSTR_DMA_HT2: return \"INSTR_DMA_HT2\";\n \tcase INSTR_DMA_HT3: return \"INSTR_DMA_HT3\";\n@@ -12181,6 +12248,34 @@ instr_mov_export(struct instruction *instr, FILE *f)\n \t\t\tinstr->mov.src_val);\n }\n \n+static void\n+instr_movh_export(struct instruction *instr, FILE *f)\n+{\n+\tfprintf(f,\n+\t\t\"\\t{\\n\"\n+\t\t\"\\t\\t.type = %s,\\n\"\n+\t\t\"\\t\\t.mov = {\\n\"\n+\t\t\"\\t\\t\\t.dst = {\\n\"\n+\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\"\\t\\t\\t},\\n\"\n+\t\t\"\\t\\t\\t.src = {\\n\"\n+\t\t\"\\t\\t\\t\\t.struct_id = %u,\\n\"\n+\t\t\"\\t\\t\\t\\t.n_bits = %u,\\n\"\n+\t\t\"\\t\\t\\t\\t.offset = %u,\\n\"\n+\t\t\"\\t\\t\\t},\\n\"\n+\t\t\"\\t\\t},\\n\"\n+\t\t\"\\t},\\n\",\n+\t\tinstr_type_to_name(instr),\n+\t\tinstr->mov.dst.struct_id,\n+\t\tinstr->mov.dst.n_bits,\n+\t\tinstr->mov.dst.offset,\n+\t\tinstr->mov.src.struct_id,\n+\t\tinstr->mov.src.n_bits,\n+\t\tinstr->mov.src.offset);\n+}\n+\n static void\n instr_dma_ht_export(struct instruction *instr, FILE *f)\n {\n@@ -12829,6 +12924,8 @@ static instruction_export_t export_table[] = {\n \t[INSTR_MOV_128_32] = instr_mov_export,\n \t[INSTR_MOV_I] = instr_mov_export,\n \n+\t[INSTR_MOVH] = instr_movh_export,\n+\n \t[INSTR_DMA_HT] = instr_dma_ht_export,\n \t[INSTR_DMA_HT2] = instr_dma_ht_export,\n \t[INSTR_DMA_HT3] = instr_dma_ht_export,\n@@ -13058,6 +13155,8 @@ instr_type_to_func(struct instruction *instr)\n \tcase INSTR_MOV_128_32: return \"__instr_mov_128_32_exec\";\n \tcase INSTR_MOV_I: return \"__instr_mov_i_exec\";\n \n+\tcase INSTR_MOVH: return \"__instr_movh_exec\";\n+\n \tcase INSTR_DMA_HT: return \"__instr_dma_ht_exec\";\n \tcase INSTR_DMA_HT2: return \"__instr_dma_ht2_exec\";\n \tcase INSTR_DMA_HT3: return \"__instr_dma_ht3_exec\";\ndiff --git a/lib/pipeline/rte_swx_pipeline_internal.h b/lib/pipeline/rte_swx_pipeline_internal.h\nindex 8ec12263b9..7ae7622329 100644\n--- a/lib/pipeline/rte_swx_pipeline_internal.h\n+++ b/lib/pipeline/rte_swx_pipeline_internal.h\n@@ -244,20 +244,34 @@ struct header_out_runtime {\n * Instruction.\n */\n \n-/* Packet headers are always in Network Byte Order (NBO), i.e. big endian.\n+/* Operand endianness conventions:\n+ *\n+ * Case 1: Small fields (i.e. fields with size <= 64 bits)\n+ *\n+ * Packet headers are always in Network Byte Order (NBO), i.e. big endian.\n * Packet meta-data fields are always assumed to be in Host Byte Order (HBO).\n * Table entry fields can be in either NBO or HBO; they are assumed to be in HBO\n * when transferred to packet meta-data and in NBO when transferred to packet\n * headers.\n- */\n-\n-/* Notation conventions:\n+ *\n+ * Notation conventions:\n * -Header field: H = h.header.field (dst/src)\n * -Meta-data field: M = m.field (dst/src)\n * -Extern object mailbox field: E = e.field (dst/src)\n * -Extern function mailbox field: F = f.field (dst/src)\n * -Table action data field: T = t.field (src only)\n * -Immediate value: I = 32-bit unsigned value (src only)\n+ *\n+ * Case 2: Big fields (i.e. fields with size > 64 bits)\n+ *\n+ * The big fields are allowed in both headers and meta-data, but they are always\n+ * stored in NBO. This is why the few instructions that accept a big field\n+ * operand require that the other operand, in case it is a small operand, be\n+ * stored in NBO as well, i.e. the small operand must be a header field\n+ * (i.e. meta-data field not allowed in this case).\n+ *\n+ * Notation conventions:\n+ * -Header or meta-data big field: HM-NBO.\n */\n \n enum instruction_type {\n@@ -333,6 +347,17 @@ enum instruction_type {\n \tINSTR_MOV_128_32, /* dst and src in NBO format, size(dst) = 128 bits, size(src) = 32 b. */\n \tINSTR_MOV_I, /* dst = HMEF, src = I; size(dst) <= 64 bits. */\n \n+\t/* movh dst src\n+\t * Read/write the upper half (i.e. bits 127 .. 64) of a 128-bit field into/from a 64-bit\n+\t * header field:\n+\t *\n+\t * dst64 = src128[127:64], where: dst64 = H, src128 = HM-NBO.\n+\t * dst128[127:64] = src64, where: dst128 = HM-NBO, src64 = H.\n+\t *\n+\t * Typically required for operations involving IPv6 addresses.\n+\t */\n+\tINSTR_MOVH,\n+\n \t/* dma h.header t.field\n \t * memcpy(h.header, t.field, sizeof(h.header))\n \t */\n@@ -2686,6 +2711,25 @@ __instr_mov_i_exec(struct rte_swx_pipeline *p __rte_unused,\n \tMOV_I(t, ip);\n }\n \n+/*\n+ * movh.\n+ */\n+static inline void\n+__instr_movh_exec(struct rte_swx_pipeline *p __rte_unused,\n+\t\t struct thread *t,\n+\t\t const struct instruction *ip)\n+{\n+\tuint8_t *dst = t->structs[ip->mov.dst.struct_id] + ip->mov.dst.offset;\n+\tuint8_t *src = t->structs[ip->mov.src.struct_id] + ip->mov.src.offset;\n+\n+\tuint64_t *dst64 = (uint64_t *)dst;\n+\tuint64_t *src64 = (uint64_t *)src;\n+\n+\tTRACE(\"[Thread %2u] movh\\n\", p->thread_id);\n+\n+\tdst64[0] = src64[0];\n+}\n+\n /*\n * dma.\n */\n", "prefixes": [ "1/3" ] }