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GET /api/patches/136455/?format=api
{ "id": 136455, "url": "http://patches.dpdk.org/api/patches/136455/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240207021849.52988-13-andrew.boyer@amd.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240207021849.52988-13-andrew.boyer@amd.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240207021849.52988-13-andrew.boyer@amd.com", "date": "2024-02-07T02:18:48", "name": "[v2,12/13] net/ionic: optimize device stop operation", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "666a8fa31d9b307716b106f5237846eac8c5871c", "submitter": { "id": 2861, "url": "http://patches.dpdk.org/api/people/2861/?format=api", "name": "Andrew Boyer", "email": "Andrew.Boyer@amd.com" }, "delegate": null, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240207021849.52988-13-andrew.boyer@amd.com/mbox/", "series": [ { "id": 31029, "url": "http://patches.dpdk.org/api/series/31029/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=31029", "date": "2024-02-07T02:18:48", "name": null, "version": 2, "mbox": "http://patches.dpdk.org/series/31029/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136455/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/136455/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 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s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=8DSXhgzgwelg7ionxOwieFnXyNEuuP4o5FhvdpHVJxA=;\n b=XhUAJHyrvqquQipWpcQjFmAgDgP0sOm/iy1WwkJEbadvjNrw+XDt5GoUqhA/NO7flVyj9TNzggKP8aPPKmcPUI1Ljg5Uc+XfsE4hKjqKPe7nUqIX0aQQXHu1v4845QGrnIxHcXmz2jZ7+hYFng031ShsndwcBas2OVCBH1CoTGU=", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 165.204.84.17)\n smtp.mailfrom=amd.com; dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=amd.com;", "Received-SPF": "Pass (protection.outlook.com: domain of amd.com designates\n 165.204.84.17 as permitted sender) receiver=protection.outlook.com;\n client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C", "From": "Andrew Boyer <andrew.boyer@amd.com>", "To": "<dev@dpdk.org>", "CC": "Andrew Boyer <andrew.boyer@amd.com>", "Subject": "[PATCH v2 12/13] net/ionic: optimize device stop operation", "Date": "Tue, 6 Feb 2024 18:18:48 -0800", "Message-ID": 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PAn1L5ZRfwQEqNZhyJ6api9h7i7r37rW1XVm8N0NhgWmfWH0eSO1Kz3c6+4W2doYoxH2NzC7AjLhRIvOOK9TVRfh2NrLN/pSqsngFBbwI43rBgj/cGguKjYsfuoZCcKPGvPocpY0j3S5luhy4CA6oZQeIobre/ZDSGLZODn01wFeIktKebbMOLXM/JxRVzKn7WRxFJ92yz3ylVnk6agto9qTbY7N05iboep9GAU9LmFUNmG8+l6DhhxMnSBB6ytOnVtMcOsOJDQniHG/JaSrrUvaMCh+Q7h6Um9AMhpryTzXpNCT0xY9O4ECHv16ecEnBbkcvZh99eLrtYJPhZmwNPyyA/Fk0raTPM4fcaz1dAdsMxvkzqrksijO/JwuxUlbZvxRrTBIj8vV1FYboihteCoeIzxs3w7hHuBRKmyObrYUI2dhpDQqY0oMmPJ4JNxkYWpc8b+h2/5Au3MRW7ZBZkrAH/sNrKWdgWw02cywcpfYTYlSB446wKys7/bAvF3dCUbTRTGw6xglzkuYcl5r2n1LQSnoiI7pAB8e9qmXcQr3ttTB5RNQlUWeOBmFTOSvTJ7mQTNA+7tBMumlq9PKy+33/RKbBzhgef/Pk4n1hqUAGZhKBT+/egoZX43zPxUA+S8vyiqjnFscCt9qJ+hyZaPgwiLA4qZQm7AvuSuKir3zogSYNabBYBcs6vrN8eEn1o0H7rffkE+gQUKwRM4dxivLobt0C8gMtDExSp3+dcrMABaVwoL7rbwrOk1bUypaYVtZZ0vjIxflP3Pyzh0L7A==", "X-Forefront-Antispam-Report": "CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE;\n SFS:(13230031)(4636009)(39860400002)(346002)(396003)(136003)(376002)(230922051799003)(82310400011)(64100799003)(186009)(1800799012)(451199024)(40470700004)(46966006)(36840700001)(40480700001)(40460700003)(41300700001)(316002)(478600001)(86362001)(36756003)(2616005)(2906002)(81166007)(356005)(426003)(1076003)(47076005)(26005)(82740400003)(16526019)(83380400001)(8676002)(4326008)(336012)(5660300002)(44832011)(70206006)(6916009)(36860700001)(30864003)(6666004)(8936002)(70586007)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "amd.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "07 Feb 2024 02:19:58.0724 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n ea80e3da-96ab-4ada-ced1-08dc27834813", "X-MS-Exchange-CrossTenant-Id": "3dd8961f-e488-4e60-8e11-a82d994e183d", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17];\n Helo=[SATLEXMB04.amd.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n SA2PEPF000015CC.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH3PR12MB8545", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Split the queue_stop operation into first-half and second-half helpers.\nMove the command context from the stack into each Rx/Tx queue struct.\nExpose some needed adminq interfaces.\n\nThis allows us to batch up the queue commands during dev_stop(), reducing\nthe outage window when restarting the process by about 1ms per queue.\n\nSigned-off-by: Andrew Boyer <andrew.boyer@amd.com>\n---\n drivers/net/ionic/ionic.h | 3 ++\n drivers/net/ionic/ionic_lif.c | 68 ++++++++++++++++++++++-------\n drivers/net/ionic/ionic_lif.h | 12 ++++--\n drivers/net/ionic/ionic_main.c | 17 +++++++-\n drivers/net/ionic/ionic_rxtx.c | 78 ++++++++++++++++++++--------------\n drivers/net/ionic/ionic_rxtx.h | 14 +++++-\n 6 files changed, 138 insertions(+), 54 deletions(-)", "diff": "diff --git a/drivers/net/ionic/ionic.h b/drivers/net/ionic/ionic.h\nindex c479eaba74..cb4ea450a9 100644\n--- a/drivers/net/ionic/ionic.h\n+++ b/drivers/net/ionic/ionic.h\n@@ -83,7 +83,10 @@ struct ionic_admin_ctx {\n \tunion ionic_adminq_comp comp;\n };\n \n+int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);\n int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);\n+int ionic_adminq_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx);\n+uint16_t ionic_adminq_space_avail(struct ionic_lif *lif);\n \n int ionic_dev_cmd_wait_check(struct ionic_dev *idev, unsigned long max_wait);\n int ionic_setup(struct ionic_adapter *adapter);\ndiff --git a/drivers/net/ionic/ionic_lif.c b/drivers/net/ionic/ionic_lif.c\nindex 90efcc8cbb..45317590fa 100644\n--- a/drivers/net/ionic/ionic_lif.c\n+++ b/drivers/net/ionic/ionic_lif.c\n@@ -31,11 +31,15 @@ static int ionic_lif_addr_add(struct ionic_lif *lif, const uint8_t *addr);\n static int ionic_lif_addr_del(struct ionic_lif *lif, const uint8_t *addr);\n \n static int\n-ionic_qcq_disable(struct ionic_qcq *qcq)\n+ionic_qcq_disable_nowait(struct ionic_qcq *qcq,\n+\t\tstruct ionic_admin_ctx *ctx)\n {\n+\tint err;\n+\n \tstruct ionic_queue *q = &qcq->q;\n \tstruct ionic_lif *lif = qcq->lif;\n-\tstruct ionic_admin_ctx ctx = {\n+\n+\t*ctx = (struct ionic_admin_ctx) {\n \t\t.pending_work = true,\n \t\t.cmd.q_control = {\n \t\t\t.opcode = IONIC_CMD_Q_CONTROL,\n@@ -45,28 +49,39 @@ ionic_qcq_disable(struct ionic_qcq *qcq)\n \t\t},\n \t};\n \n-\treturn ionic_adminq_post_wait(lif, &ctx);\n+\t/* Does not wait for command completion */\n+\terr = ionic_adminq_post(lif, ctx);\n+\tif (err)\n+\t\tctx->pending_work = false;\n+\treturn err;\n }\n \n void\n ionic_lif_stop(struct ionic_lif *lif)\n {\n-\tuint32_t i;\n+\tstruct rte_eth_dev *dev = lif->eth_dev;\n+\tuint32_t i, j, chunk;\n \n \tIONIC_PRINT_CALL();\n \n \tlif->state &= ~IONIC_LIF_F_UP;\n \n-\tfor (i = 0; i < lif->nrxqcqs; i++) {\n-\t\tstruct ionic_rx_qcq *rxq = lif->rxqcqs[i];\n-\t\tif (rxq->flags & IONIC_QCQ_F_INITED)\n-\t\t\t(void)ionic_dev_rx_queue_stop(lif->eth_dev, i);\n+\tchunk = ionic_adminq_space_avail(lif);\n+\n+\tfor (i = 0; i < lif->nrxqcqs; i += chunk) {\n+\t\tfor (j = 0; j < chunk && i + j < lif->nrxqcqs; j++)\n+\t\t\tionic_dev_rx_queue_stop_firsthalf(dev, i + j);\n+\n+\t\tfor (j = 0; j < chunk && i + j < lif->nrxqcqs; j++)\n+\t\t\tionic_dev_rx_queue_stop_secondhalf(dev, i + j);\n \t}\n \n-\tfor (i = 0; i < lif->ntxqcqs; i++) {\n-\t\tstruct ionic_tx_qcq *txq = lif->txqcqs[i];\n-\t\tif (txq->flags & IONIC_QCQ_F_INITED)\n-\t\t\t(void)ionic_dev_tx_queue_stop(lif->eth_dev, i);\n+\tfor (i = 0; i < lif->ntxqcqs; i += chunk) {\n+\t\tfor (j = 0; j < chunk && i + j < lif->ntxqcqs; j++)\n+\t\t\tionic_dev_tx_queue_stop_firsthalf(dev, i + j);\n+\n+\t\tfor (j = 0; j < chunk && i + j < lif->ntxqcqs; j++)\n+\t\t\tionic_dev_tx_queue_stop_secondhalf(dev, i + j);\n \t}\n }\n \n@@ -1240,21 +1255,42 @@ ionic_lif_rss_teardown(struct ionic_lif *lif)\n }\n \n void\n-ionic_lif_txq_deinit(struct ionic_tx_qcq *txq)\n+ionic_lif_txq_deinit_nowait(struct ionic_tx_qcq *txq)\n {\n-\tionic_qcq_disable(&txq->qcq);\n+\tionic_qcq_disable_nowait(&txq->qcq, &txq->admin_ctx);\n \n \ttxq->flags &= ~IONIC_QCQ_F_INITED;\n }\n \n void\n-ionic_lif_rxq_deinit(struct ionic_rx_qcq *rxq)\n+ionic_lif_txq_stats(struct ionic_tx_qcq *txq)\n+{\n+\tstruct ionic_tx_stats *stats = &txq->stats;\n+\n+\tIONIC_PRINT(DEBUG, \"TX queue %u pkts %ju tso %ju\",\n+\t\ttxq->qcq.q.index, stats->packets, stats->tso);\n+\tIONIC_PRINT(DEBUG, \"TX queue %u comps %ju (%ju per)\",\n+\t\ttxq->qcq.q.index, stats->comps,\n+\t\tstats->comps ? stats->packets / stats->comps : 0);\n+}\n+\n+void\n+ionic_lif_rxq_deinit_nowait(struct ionic_rx_qcq *rxq)\n {\n-\tionic_qcq_disable(&rxq->qcq);\n+\tionic_qcq_disable_nowait(&rxq->qcq, &rxq->admin_ctx);\n \n \trxq->flags &= ~IONIC_QCQ_F_INITED;\n }\n \n+void\n+ionic_lif_rxq_stats(struct ionic_rx_qcq *rxq)\n+{\n+\tstruct ionic_rx_stats *stats = &rxq->stats;\n+\n+\tIONIC_PRINT(DEBUG, \"RX queue %u pkts %ju mtod %ju\",\n+\t\trxq->qcq.q.index, stats->packets, stats->mtods);\n+}\n+\n static void\n ionic_lif_adminq_deinit(struct ionic_lif *lif)\n {\ndiff --git a/drivers/net/ionic/ionic_lif.h b/drivers/net/ionic/ionic_lif.h\nindex cac7a4583b..ee13f5b7c8 100644\n--- a/drivers/net/ionic/ionic_lif.h\n+++ b/drivers/net/ionic/ionic_lif.h\n@@ -10,7 +10,7 @@\n #include <rte_ethdev.h>\n #include <rte_ether.h>\n \n-#include \"ionic_osdep.h\"\n+#include \"ionic.h\"\n #include \"ionic_dev.h\"\n #include \"ionic_rx_filter.h\"\n \n@@ -99,6 +99,8 @@ struct ionic_rx_qcq {\n \n \t/* cacheline4+ */\n \tstruct rte_mbuf *mbs[IONIC_MBUF_BULK_ALLOC] __rte_cache_aligned;\n+\n+\tstruct ionic_admin_ctx admin_ctx;\n };\n \n struct ionic_tx_qcq {\n@@ -112,6 +114,8 @@ struct ionic_tx_qcq {\n \tuint16_t flags;\n \n \tstruct ionic_tx_stats stats;\n+\n+\tstruct ionic_admin_ctx admin_ctx;\n };\n \n #define IONIC_Q_TO_QCQ(_q)\tcontainer_of(_q, struct ionic_qcq, q)\n@@ -225,10 +229,12 @@ int ionic_tx_qcq_alloc(struct ionic_lif *lif, uint32_t socket_id,\n void ionic_qcq_free(struct ionic_qcq *qcq);\n \n int ionic_lif_rxq_init(struct ionic_rx_qcq *rxq);\n-void ionic_lif_rxq_deinit(struct ionic_rx_qcq *rxq);\n+void ionic_lif_rxq_deinit_nowait(struct ionic_rx_qcq *rxq);\n+void ionic_lif_rxq_stats(struct ionic_rx_qcq *rxq);\n \n int ionic_lif_txq_init(struct ionic_tx_qcq *txq);\n-void ionic_lif_txq_deinit(struct ionic_tx_qcq *txq);\n+void ionic_lif_txq_deinit_nowait(struct ionic_tx_qcq *txq);\n+void ionic_lif_txq_stats(struct ionic_tx_qcq *txq);\n \n int ionic_lif_rss_config(struct ionic_lif *lif, const uint16_t types,\n \tconst uint8_t *key, const uint32_t *indir);\ndiff --git a/drivers/net/ionic/ionic_main.c b/drivers/net/ionic/ionic_main.c\nindex c957d55bf9..1f24f64a33 100644\n--- a/drivers/net/ionic/ionic_main.c\n+++ b/drivers/net/ionic/ionic_main.c\n@@ -180,6 +180,12 @@ ionic_adminq_service(struct ionic_cq *cq, uint16_t cq_desc_index,\n \treturn true;\n }\n \n+uint16_t\n+ionic_adminq_space_avail(struct ionic_lif *lif)\n+{\n+\treturn ionic_q_space_avail(&lif->adminqcq->qcq.q);\n+}\n+\n /** ionic_adminq_post - Post an admin command.\n * @lif: Handle to lif.\n * @cmd_ctx: Api admin command context.\n@@ -191,7 +197,7 @@ ionic_adminq_service(struct ionic_cq *cq, uint16_t cq_desc_index,\n *\n * Return: zero or negative error status.\n */\n-static int\n+int\n ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)\n {\n \tstruct ionic_queue *q = &lif->adminqcq->qcq.q;\n@@ -279,7 +285,6 @@ ionic_adminq_wait_for_completion(struct ionic_lif *lif,\n int\n ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)\n {\n-\tbool done;\n \tint err;\n \n \tIONIC_PRINT(DEBUG, \"Sending %s (%d) via the admin queue\",\n@@ -292,6 +297,14 @@ ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)\n \t\treturn err;\n \t}\n \n+\treturn ionic_adminq_wait(lif, ctx);\n+}\n+\n+int\n+ionic_adminq_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)\n+{\n+\tbool done;\n+\n \tdone = ionic_adminq_wait_for_completion(lif, ctx,\n \t\tIONIC_DEVCMD_TIMEOUT);\n \ndiff --git a/drivers/net/ionic/ionic_rxtx.c b/drivers/net/ionic/ionic_rxtx.c\nindex d92fa1cca7..774dc596c0 100644\n--- a/drivers/net/ionic/ionic_rxtx.c\n+++ b/drivers/net/ionic/ionic_rxtx.c\n@@ -92,36 +92,40 @@ ionic_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid)\n }\n \n int __rte_cold\n-ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id)\n+ionic_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n {\n-\tstruct ionic_tx_stats *stats;\n-\tstruct ionic_tx_qcq *txq;\n+\tionic_dev_tx_queue_stop_firsthalf(dev, tx_queue_id);\n+\tionic_dev_tx_queue_stop_secondhalf(dev, tx_queue_id);\n+\n+\treturn 0;\n+}\n+\n+void __rte_cold\n+ionic_dev_tx_queue_stop_firsthalf(struct rte_eth_dev *dev,\n+\t\t\t\tuint16_t tx_queue_id)\n+{\n+\tstruct ionic_tx_qcq *txq = dev->data->tx_queues[tx_queue_id];\n \n \tIONIC_PRINT(DEBUG, \"Stopping TX queue %u\", tx_queue_id);\n \n-\ttxq = eth_dev->data->tx_queues[tx_queue_id];\n+\tdev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;\n \n-\teth_dev->data->tx_queue_state[tx_queue_id] =\n-\t\tRTE_ETH_QUEUE_STATE_STOPPED;\n+\tionic_lif_txq_deinit_nowait(txq);\n+}\n \n-\t/*\n-\t * Note: we should better post NOP Tx desc and wait for its completion\n-\t * before disabling Tx queue\n-\t */\n+void __rte_cold\n+ionic_dev_tx_queue_stop_secondhalf(struct rte_eth_dev *dev,\n+\t\t\t\tuint16_t tx_queue_id)\n+{\n+\tstruct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(dev);\n+\tstruct ionic_tx_qcq *txq = dev->data->tx_queues[tx_queue_id];\n \n-\tionic_lif_txq_deinit(txq);\n+\tionic_adminq_wait(lif, &txq->admin_ctx);\n \n \t/* Free all buffers from descriptor ring */\n \tionic_tx_empty(txq);\n \n-\tstats = &txq->stats;\n-\tIONIC_PRINT(DEBUG, \"TX queue %u pkts %ju tso %ju\",\n-\t\ttxq->qcq.q.index, stats->packets, stats->tso);\n-\tIONIC_PRINT(DEBUG, \"TX queue %u comps %ju (%ju per)\",\n-\t\ttxq->qcq.q.index, stats->comps,\n-\t\tstats->comps ? stats->packets / stats->comps : 0);\n-\n-\treturn 0;\n+\tionic_lif_txq_stats(txq);\n }\n \n int __rte_cold\n@@ -726,28 +730,40 @@ ionic_dev_rx_queue_start(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)\n * Stop Receive Units for specified queue.\n */\n int __rte_cold\n-ionic_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id)\n+ionic_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n {\n-\tuint8_t *rx_queue_state = eth_dev->data->rx_queue_state;\n-\tstruct ionic_rx_stats *stats;\n-\tstruct ionic_rx_qcq *rxq;\n+\tionic_dev_rx_queue_stop_firsthalf(dev, rx_queue_id);\n+\tionic_dev_rx_queue_stop_secondhalf(dev, rx_queue_id);\n+\n+\treturn 0;\n+}\n+\n+void __rte_cold\n+ionic_dev_rx_queue_stop_firsthalf(struct rte_eth_dev *dev,\n+\t\t\t\tuint16_t rx_queue_id)\n+{\n+\tstruct ionic_rx_qcq *rxq = dev->data->rx_queues[rx_queue_id];\n \n \tIONIC_PRINT(DEBUG, \"Stopping RX queue %u\", rx_queue_id);\n \n-\trxq = eth_dev->data->rx_queues[rx_queue_id];\n+\tdev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;\n+\n+\tionic_lif_rxq_deinit_nowait(rxq);\n+}\n \n-\trx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;\n+void __rte_cold\n+ionic_dev_rx_queue_stop_secondhalf(struct rte_eth_dev *dev,\n+\t\t\t\tuint16_t rx_queue_id)\n+{\n+\tstruct ionic_lif *lif = IONIC_ETH_DEV_TO_LIF(dev);\n+\tstruct ionic_rx_qcq *rxq = dev->data->rx_queues[rx_queue_id];\n \n-\tionic_lif_rxq_deinit(rxq);\n+\tionic_adminq_wait(lif, &rxq->admin_ctx);\n \n \t/* Free all buffers from descriptor ring */\n \tionic_rx_empty(rxq);\n \n-\tstats = &rxq->stats;\n-\tIONIC_PRINT(DEBUG, \"RX queue %u pkts %ju mtod %ju\",\n-\t\trxq->qcq.q.index, stats->packets, stats->mtods);\n-\n-\treturn 0;\n+\tionic_lif_rxq_stats(rxq);\n }\n \n int\ndiff --git a/drivers/net/ionic/ionic_rxtx.h b/drivers/net/ionic/ionic_rxtx.h\nindex 5348395956..7ca23178cc 100644\n--- a/drivers/net/ionic/ionic_rxtx.h\n+++ b/drivers/net/ionic/ionic_rxtx.h\n@@ -37,14 +37,24 @@ int ionic_dev_rx_queue_setup(struct rte_eth_dev *dev, uint16_t rx_queue_id,\n \tconst struct rte_eth_rxconf *rx_conf, struct rte_mempool *mp);\n void ionic_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t qid);\n int ionic_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n-int ionic_dev_rx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t rx_queue_id);\n+int ionic_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id);\n \n int ionic_dev_tx_queue_setup(struct rte_eth_dev *dev, uint16_t tx_queue_id,\n \tuint16_t nb_desc, uint32_t socket_id,\n \tconst struct rte_eth_txconf *tx_conf);\n void ionic_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t qid);\n-int ionic_dev_tx_queue_stop(struct rte_eth_dev *eth_dev, uint16_t tx_queue_id);\n int ionic_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n+int ionic_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id);\n+\n+/* Helpers for optimized dev_stop() */\n+void ionic_dev_rx_queue_stop_firsthalf(struct rte_eth_dev *dev,\n+\tuint16_t rx_queue_id);\n+void ionic_dev_rx_queue_stop_secondhalf(struct rte_eth_dev *dev,\n+\tuint16_t rx_queue_id);\n+void ionic_dev_tx_queue_stop_firsthalf(struct rte_eth_dev *dev,\n+\tuint16_t tx_queue_id);\n+void ionic_dev_tx_queue_stop_secondhalf(struct rte_eth_dev *dev,\n+\tuint16_t tx_queue_id);\n \n void ionic_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tstruct rte_eth_rxq_info *qinfo);\n", "prefixes": [ "v2", "12/13" ] }