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GET /api/patches/136318/?format=api
{ "id": 136318, "url": "http://patches.dpdk.org/api/patches/136318/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240202115611.288892-5-getelson@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240202115611.288892-5-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240202115611.288892-5-getelson@nvidia.com", "date": "2024-02-02T11:56:10", "name": "[4/5] net/mlx5: move multi-pattern actions management to table level", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "e71c743d0b204252c3352f1a752e210bd882644e", "submitter": { "id": 1882, "url": "http://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240202115611.288892-5-getelson@nvidia.com/mbox/", "series": [ { "id": 30987, "url": "http://patches.dpdk.org/api/series/30987/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30987", "date": "2024-02-02T11:56:07", "name": "net/mlx5: add support for flow table resizing", "version": 1, "mbox": "http://patches.dpdk.org/series/30987/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136318/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/136318/checks/", "tags": {}, "related": [], "headers": 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<dsosnowski@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, \"Ori Kam\" <orika@nvidia.com>,\n Suanming Mou <suanmingm@nvidia.com>, Matan Azrad <matan@nvidia.com>", "Subject": "[PATCH 4/5] net/mlx5: move multi-pattern actions management to table\n level", "Date": "Fri, 2 Feb 2024 13:56:10 +0200", "Message-ID": "<20240202115611.288892-5-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20240202115611.288892-1-getelson@nvidia.com>", "References": "<20240202115611.288892-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "SN1PEPF00026369:EE_|SA0PR12MB4383:EE_", "X-MS-Office365-Filtering-Correlation-Id": "c2378a49-cc34-4476-1be4-08dc23e60d13", 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Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n SN1PEPF00026369.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SA0PR12MB4383", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The multi-pattern actions related structures and management code\nhave been moved to the table level.\nThat code refactor is required for the upcoming table resize feature.\n\nSigned-off-by: Gregory Etelson <getelson@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow.h | 73 +++++++++-\n drivers/net/mlx5/mlx5_flow_hw.c | 229 +++++++++++++++-----------------\n 2 files changed, 177 insertions(+), 125 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex b003e97dc9..497d4b0f0c 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -1390,7 +1390,6 @@ struct mlx5_hw_encap_decap_action {\n \t/* Is header_reformat action shared across flows in table. */\n \tuint32_t shared:1;\n \tuint32_t multi_pattern:1;\n-\tvolatile uint32_t *multi_pattern_refcnt;\n \tsize_t data_size; /* Action metadata size. */\n \tuint8_t data[]; /* Action data. */\n };\n@@ -1413,7 +1412,6 @@ struct mlx5_hw_modify_header_action {\n \t/* Is MODIFY_HEADER action shared across flows in table. */\n \tuint32_t shared:1;\n \tuint32_t multi_pattern:1;\n-\tvolatile uint32_t *multi_pattern_refcnt;\n \t/* Amount of modification commands stored in the precompiled buffer. */\n \tuint32_t mhdr_cmds_num;\n \t/* Precompiled modification commands. */\n@@ -1467,6 +1465,76 @@ struct mlx5_flow_group {\n #define MLX5_HW_TBL_MAX_ITEM_TEMPLATE 2\n #define MLX5_HW_TBL_MAX_ACTION_TEMPLATE 32\n \n+#define MLX5_MULTIPATTERN_ENCAP_NUM 5\n+#define MLX5_MAX_TABLE_RESIZE_NUM 64\n+\n+struct mlx5_multi_pattern_segment {\n+\tuint32_t capacity;\n+\tuint32_t head_index;\n+\tstruct mlx5dr_action *mhdr_action;\n+\tstruct mlx5dr_action *reformat_action[MLX5_MULTIPATTERN_ENCAP_NUM];\n+};\n+\n+struct mlx5_tbl_multi_pattern_ctx {\n+\tstruct {\n+\t\tuint32_t elements_num;\n+\t\tstruct mlx5dr_action_reformat_header reformat_hdr[MLX5_HW_TBL_MAX_ACTION_TEMPLATE];\n+\t\t/**\n+\t\t * insert_header structure is larger than reformat_header.\n+\t\t * Enclosing these structures with union will case a gap between\n+\t\t * reformat_hdr array elements.\n+\t\t * mlx5dr_action_create_reformat() expects adjacent array elements.\n+\t\t */\n+\t\tstruct mlx5dr_action_insert_header insert_hdr[MLX5_HW_TBL_MAX_ACTION_TEMPLATE];\n+\t} reformat[MLX5_MULTIPATTERN_ENCAP_NUM];\n+\n+\tstruct {\n+\t\tuint32_t elements_num;\n+\t\tstruct mlx5dr_action_mh_pattern pattern[MLX5_HW_TBL_MAX_ACTION_TEMPLATE];\n+\t} mh;\n+\tstruct mlx5_multi_pattern_segment segments[MLX5_MAX_TABLE_RESIZE_NUM];\n+};\n+\n+static __rte_always_inline void\n+mlx5_multi_pattern_activate(struct mlx5_tbl_multi_pattern_ctx *mpctx)\n+{\n+\tmpctx->segments[0].head_index = 1;\n+}\n+\n+static __rte_always_inline bool\n+mlx5_is_multi_pattern_active(const struct mlx5_tbl_multi_pattern_ctx *mpctx)\n+{\n+\treturn mpctx->segments[0].head_index == 1;\n+}\n+\n+static __rte_always_inline struct mlx5_multi_pattern_segment *\n+mlx5_multi_pattern_segment_get_next(struct mlx5_tbl_multi_pattern_ctx *mpctx)\n+{\n+\tint i;\n+\n+\tfor (i = 0; i < MLX5_MAX_TABLE_RESIZE_NUM; i++) {\n+\t\tif (!mpctx->segments[i].capacity)\n+\t\t\treturn &mpctx->segments[i];\n+\t}\n+\treturn NULL;\n+}\n+\n+static __rte_always_inline struct mlx5_multi_pattern_segment *\n+mlx5_multi_pattern_segment_find(struct mlx5_tbl_multi_pattern_ctx *mpctx,\n+\t\t\t\tuint32_t flow_resource_ix)\n+{\n+\tint i;\n+\n+\tfor (i = 0; i < MLX5_MAX_TABLE_RESIZE_NUM; i++) {\n+\t\tuint32_t limit = mpctx->segments[i].head_index +\n+\t\t\t\t mpctx->segments[i].capacity;\n+\n+\t\tif (flow_resource_ix < limit)\n+\t\t\treturn &mpctx->segments[i];\n+\t}\n+\treturn NULL;\n+}\n+\n struct mlx5_flow_template_table_cfg {\n \tstruct rte_flow_template_table_attr attr; /* Table attributes passed through flow API. */\n \tbool external; /* True if created by flow API, false if table is internal to PMD. */\n@@ -1487,6 +1555,7 @@ struct rte_flow_template_table {\n \tuint8_t nb_item_templates; /* Item template number. */\n \tuint8_t nb_action_templates; /* Action template number. */\n \tuint32_t refcnt; /* Table reference counter. */\n+\tstruct mlx5_tbl_multi_pattern_ctx mpctx;\n };\n \n #endif\ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 3125500641..e5c770c6fc 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -74,41 +74,14 @@ struct mlx5_indlst_legacy {\n #define MLX5_CONST_ENCAP_ITEM(encap_type, ptr) \\\n (((const struct encap_type *)(ptr))->definition)\n \n-struct mlx5_multi_pattern_ctx {\n-\tunion {\n-\t\tstruct mlx5dr_action_reformat_header reformat_hdr;\n-\t\tstruct mlx5dr_action_mh_pattern mh_pattern;\n-\t};\n-\tunion {\n-\t\t/* action template auxiliary structures for object destruction */\n-\t\tstruct mlx5_hw_encap_decap_action *encap;\n-\t\tstruct mlx5_hw_modify_header_action *mhdr;\n-\t};\n-\t/* multi pattern action */\n-\tstruct mlx5dr_rule_action *rule_action;\n-};\n-\n-#define MLX5_MULTIPATTERN_ENCAP_NUM 4\n-\n-struct mlx5_tbl_multi_pattern_ctx {\n-\tstruct {\n-\t\tuint32_t elements_num;\n-\t\tstruct mlx5_multi_pattern_ctx ctx[MLX5_HW_TBL_MAX_ACTION_TEMPLATE];\n-\t} reformat[MLX5_MULTIPATTERN_ENCAP_NUM];\n-\n-\tstruct {\n-\t\tuint32_t elements_num;\n-\t\tstruct mlx5_multi_pattern_ctx ctx[MLX5_HW_TBL_MAX_ACTION_TEMPLATE];\n-\t} mh;\n-};\n-\n-#define MLX5_EMPTY_MULTI_PATTERN_CTX {{{0,}},}\n-\n static int\n mlx5_tbl_multi_pattern_process(struct rte_eth_dev *dev,\n \t\t\t struct rte_flow_template_table *tbl,\n-\t\t\t struct mlx5_tbl_multi_pattern_ctx *mpat,\n+\t\t\t struct mlx5_multi_pattern_segment *segment,\n+\t\t\t uint32_t bulk_size,\n \t\t\t struct rte_flow_error *error);\n+static void\n+mlx5_destroy_multi_pattern_segment(struct mlx5_multi_pattern_segment *segment);\n \n static __rte_always_inline int\n mlx5_multi_pattern_reformat_to_index(enum mlx5dr_action_type type)\n@@ -570,28 +543,14 @@ flow_hw_ct_compile(struct rte_eth_dev *dev,\n static void\n flow_hw_template_destroy_reformat_action(struct mlx5_hw_encap_decap_action *encap_decap)\n {\n-\tif (encap_decap->multi_pattern) {\n-\t\tuint32_t refcnt = __atomic_sub_fetch(encap_decap->multi_pattern_refcnt,\n-\t\t\t\t\t\t 1, __ATOMIC_RELAXED);\n-\t\tif (refcnt)\n-\t\t\treturn;\n-\t\tmlx5_free((void *)(uintptr_t)encap_decap->multi_pattern_refcnt);\n-\t}\n-\tif (encap_decap->action)\n+\tif (encap_decap->action && !encap_decap->multi_pattern)\n \t\tmlx5dr_action_destroy(encap_decap->action);\n }\n \n static void\n flow_hw_template_destroy_mhdr_action(struct mlx5_hw_modify_header_action *mhdr)\n {\n-\tif (mhdr->multi_pattern) {\n-\t\tuint32_t refcnt = __atomic_sub_fetch(mhdr->multi_pattern_refcnt,\n-\t\t\t\t\t\t 1, __ATOMIC_RELAXED);\n-\t\tif (refcnt)\n-\t\t\treturn;\n-\t\tmlx5_free((void *)(uintptr_t)mhdr->multi_pattern_refcnt);\n-\t}\n-\tif (mhdr->action)\n+\tif (mhdr->action && !mhdr->multi_pattern)\n \t\tmlx5dr_action_destroy(mhdr->action);\n }\n \n@@ -1870,6 +1829,7 @@ mlx5_tbl_translate_reformat(struct mlx5_priv *priv,\n \tconst struct rte_flow_attr *attr = &table_attr->flow_attr;\n \tenum mlx5dr_table_type tbl_type = get_mlx5dr_table_type(attr);\n \tstruct mlx5dr_action_reformat_header hdr;\n+\tstruct mlx5dr_action_insert_header ihdr;\n \tuint8_t buf[MLX5_ENCAP_MAX_LEN];\n \tbool shared_rfmt = false;\n \tint ret;\n@@ -1911,21 +1871,25 @@ mlx5_tbl_translate_reformat(struct mlx5_priv *priv,\n \t\tacts->encap_decap->shared = true;\n \t} else {\n \t\tuint32_t ix;\n-\t\ttypeof(mp_ctx->reformat[0]) *reformat_ctx = mp_ctx->reformat +\n-\t\t\t\t\t\t\t mp_reformat_ix;\n+\t\ttypeof(mp_ctx->reformat[0]) *reformat = mp_ctx->reformat +\n+\t\t\t\t\t\t\tmp_reformat_ix;\n \n-\t\tix = reformat_ctx->elements_num++;\n-\t\treformat_ctx->ctx[ix].reformat_hdr = hdr;\n-\t\treformat_ctx->ctx[ix].rule_action = &acts->rule_acts[at->reformat_off];\n-\t\treformat_ctx->ctx[ix].encap = acts->encap_decap;\n+\t\tix = reformat->elements_num++;\n+\t\tif (refmt_type == MLX5DR_ACTION_TYP_INSERT_HEADER)\n+\t\t\treformat->insert_hdr[ix] = ihdr;\n+\t\telse\n+\t\t\treformat->reformat_hdr[ix] = hdr;\n \t\tacts->rule_acts[at->reformat_off].reformat.hdr_idx = ix;\n \t\tacts->encap_decap_pos = at->reformat_off;\n+\t\tacts->encap_decap->multi_pattern = 1;\n \t\tacts->encap_decap->data_size = data_size;\n+\t\tacts->encap_decap->action_type = refmt_type;\n \t\tret = __flow_hw_act_data_encap_append\n \t\t\t(priv, acts, (at->actions + reformat_src)->type,\n \t\t\t reformat_src, at->reformat_off, data_size);\n \t\tif (ret)\n \t\t\treturn -rte_errno;\n+\t\tmlx5_multi_pattern_activate(mp_ctx);\n \t}\n \treturn 0;\n }\n@@ -1974,12 +1938,11 @@ mlx5_tbl_translate_modify_header(struct rte_eth_dev *dev,\n \t} else {\n \t\ttypeof(mp_ctx->mh) *mh = &mp_ctx->mh;\n \t\tuint32_t idx = mh->elements_num;\n-\t\tstruct mlx5_multi_pattern_ctx *mh_ctx = mh->ctx + mh->elements_num++;\n \n-\t\tmh_ctx->mh_pattern = pattern;\n-\t\tmh_ctx->mhdr = acts->mhdr;\n-\t\tmh_ctx->rule_action = &acts->rule_acts[mhdr_ix];\n+\t\tmh->pattern[mh->elements_num++] = pattern;\n+\t\tacts->mhdr->multi_pattern = 1;\n \t\tacts->rule_acts[mhdr_ix].modify_header.pattern_idx = idx;\n+\t\tmlx5_multi_pattern_activate(mp_ctx);\n \t}\n \treturn 0;\n }\n@@ -2539,16 +2502,17 @@ flow_hw_actions_translate(struct rte_eth_dev *dev,\n {\n \tint ret;\n \tuint32_t i;\n-\tstruct mlx5_tbl_multi_pattern_ctx mpat = MLX5_EMPTY_MULTI_PATTERN_CTX;\n \n \tfor (i = 0; i < tbl->nb_action_templates; i++) {\n \t\tif (__flow_hw_actions_translate(dev, &tbl->cfg,\n \t\t\t\t\t\t&tbl->ats[i].acts,\n \t\t\t\t\t\ttbl->ats[i].action_template,\n-\t\t\t\t\t\t&mpat, error))\n+\t\t\t\t\t\t&tbl->mpctx, error))\n \t\t\tgoto err;\n \t}\n-\tret = mlx5_tbl_multi_pattern_process(dev, tbl, &mpat, error);\n+\tret = mlx5_tbl_multi_pattern_process(dev, tbl, &tbl->mpctx.segments[0],\n+\t\t\t\t\t rte_log2_u32(tbl->cfg.attr.nb_flows),\n+\t\t\t\t\t error);\n \tif (ret)\n \t\tgoto err;\n \treturn 0;\n@@ -2922,6 +2886,7 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \tint ret;\n \tuint32_t age_idx = 0;\n \tstruct mlx5_aso_mtr *aso_mtr;\n+\tstruct mlx5_multi_pattern_segment *mp_segment;\n \n \trte_memcpy(rule_acts, hw_acts->rule_acts, sizeof(*rule_acts) * at->dr_actions_num);\n \tattr.group = table->grp->group_id;\n@@ -3052,6 +3017,10 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\t\tMLX5_ASSERT(ipv6_push->size == act_data->ipv6_ext.len);\n \t\t\tbreak;\n \t\tcase RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:\n+\t\t\tmp_segment = mlx5_multi_pattern_segment_find(&table->mpctx, job->flow->res_idx);\n+\t\t\tif (!mp_segment || !mp_segment->mhdr_action)\n+\t\t\t\treturn -1;\n+\t\t\trule_acts[hw_acts->mhdr->pos].action = mp_segment->mhdr_action;\n \t\t\tif (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)\n \t\t\t\tret = flow_hw_set_vlan_vid_construct(dev, job,\n \t\t\t\t\t\t\t\t act_data,\n@@ -3203,9 +3172,17 @@ flow_hw_actions_construct(struct rte_eth_dev *dev,\n \t\t\t\t age_idx);\n \t}\n \tif (hw_acts->encap_decap && !hw_acts->encap_decap->shared) {\n-\t\trule_acts[hw_acts->encap_decap_pos].reformat.offset =\n-\t\t\t\tjob->flow->res_idx - 1;\n-\t\trule_acts[hw_acts->encap_decap_pos].reformat.data = buf;\n+\t\tint ix = mlx5_multi_pattern_reformat_to_index(hw_acts->encap_decap->action_type);\n+\t\tstruct mlx5dr_rule_action *ra = &rule_acts[hw_acts->encap_decap_pos];\n+\n+\t\tif (ix < 0)\n+\t\t\treturn -1;\n+\t\tmp_segment = mlx5_multi_pattern_segment_find(&table->mpctx, job->flow->res_idx);\n+\t\tif (!mp_segment || !mp_segment->reformat_action[ix])\n+\t\t\treturn -1;\n+\t\tra->action = mp_segment->reformat_action[ix];\n+\t\tra->reformat.offset = job->flow->res_idx - 1;\n+\t\tra->reformat.data = buf;\n \t}\n \tif (hw_acts->push_remove && !hw_acts->push_remove->shared) {\n \t\trule_acts[hw_acts->push_remove_pos].ipv6_ext.offset =\n@@ -4111,86 +4088,65 @@ flow_hw_q_flow_flush(struct rte_eth_dev *dev,\n static int\n mlx5_tbl_multi_pattern_process(struct rte_eth_dev *dev,\n \t\t\t struct rte_flow_template_table *tbl,\n-\t\t\t struct mlx5_tbl_multi_pattern_ctx *mpat,\n+\t\t\t struct mlx5_multi_pattern_segment *segment,\n+\t\t\t uint32_t bulk_size,\n \t\t\t struct rte_flow_error *error)\n {\n+\tint ret = 0;\n \tuint32_t i;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tstruct mlx5_tbl_multi_pattern_ctx *mpctx = &tbl->mpctx;\n \tconst struct rte_flow_template_table_attr *table_attr = &tbl->cfg.attr;\n \tconst struct rte_flow_attr *attr = &table_attr->flow_attr;\n \tenum mlx5dr_table_type type = get_mlx5dr_table_type(attr);\n \tuint32_t flags = mlx5_hw_act_flag[!!attr->group][type];\n-\tstruct mlx5dr_action *dr_action;\n-\tuint32_t bulk_size = rte_log2_u32(table_attr->nb_flows);\n+\tstruct mlx5dr_action *dr_action = NULL;\n \n \tfor (i = 0; i < MLX5_MULTIPATTERN_ENCAP_NUM; i++) {\n-\t\tuint32_t j;\n-\t\tuint32_t *reformat_refcnt;\n-\t\ttypeof(mpat->reformat[0]) *reformat = mpat->reformat + i;\n-\t\tstruct mlx5dr_action_reformat_header hdr[MLX5_HW_TBL_MAX_ACTION_TEMPLATE];\n+\t\ttypeof(mpctx->reformat[0]) *reformat = mpctx->reformat + i;\n \t\tenum mlx5dr_action_type reformat_type =\n \t\t\tmlx5_multi_pattern_reformat_index_to_type(i);\n \n \t\tif (!reformat->elements_num)\n \t\t\tcontinue;\n-\t\tfor (j = 0; j < reformat->elements_num; j++)\n-\t\t\thdr[j] = reformat->ctx[j].reformat_hdr;\n-\t\treformat_refcnt = mlx5_malloc(MLX5_MEM_ZERO, sizeof(uint32_t), 0,\n-\t\t\t\t\t rte_socket_id());\n-\t\tif (!reformat_refcnt)\n-\t\t\treturn rte_flow_error_set(error, ENOMEM,\n-\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\t\t NULL, \"failed to allocate multi-pattern encap counter\");\n-\t\t*reformat_refcnt = reformat->elements_num;\n-\t\tdr_action = mlx5dr_action_create_reformat\n-\t\t\t(priv->dr_ctx, reformat_type, reformat->elements_num, hdr,\n-\t\t\t bulk_size, flags);\n+\t\tdr_action = reformat_type == MLX5DR_ACTION_TYP_INSERT_HEADER ?\n+\t\t\tmlx5dr_action_create_insert_header\n+\t\t\t(priv->dr_ctx, reformat->elements_num,\n+\t\t\t reformat->insert_hdr, bulk_size, flags) :\n+\t\t\tmlx5dr_action_create_reformat\n+\t\t\t(priv->dr_ctx, reformat_type, reformat->elements_num,\n+\t\t\t reformat->reformat_hdr, bulk_size, flags);\n \t\tif (!dr_action) {\n-\t\t\tmlx5_free(reformat_refcnt);\n-\t\t\treturn rte_flow_error_set(error, rte_errno,\n-\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\t\t NULL,\n-\t\t\t\t\t\t \"failed to create multi-pattern encap action\");\n-\t\t}\n-\t\tfor (j = 0; j < reformat->elements_num; j++) {\n-\t\t\treformat->ctx[j].rule_action->action = dr_action;\n-\t\t\treformat->ctx[j].encap->action = dr_action;\n-\t\t\treformat->ctx[j].encap->multi_pattern = 1;\n-\t\t\treformat->ctx[j].encap->multi_pattern_refcnt = reformat_refcnt;\n+\t\t\tret = rte_flow_error_set(error, rte_errno,\n+\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t\t\t NULL,\n+\t\t\t\t\t\t \"failed to create multi-pattern encap action\");\n+\t\t\tgoto error;\n \t\t}\n+\t\tsegment->reformat_action[i] = dr_action;\n \t}\n-\tif (mpat->mh.elements_num) {\n-\t\ttypeof(mpat->mh) *mh = &mpat->mh;\n-\t\tstruct mlx5dr_action_mh_pattern pattern[MLX5_HW_TBL_MAX_ACTION_TEMPLATE];\n-\t\tuint32_t *mh_refcnt = mlx5_malloc(MLX5_MEM_ZERO, sizeof(uint32_t),\n-\t\t\t\t\t\t 0, rte_socket_id());\n-\n-\t\tif (!mh_refcnt)\n-\t\t\treturn rte_flow_error_set(error, ENOMEM,\n-\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\t\t NULL, \"failed to allocate modify header counter\");\n-\t\t*mh_refcnt = mpat->mh.elements_num;\n-\t\tfor (i = 0; i < mpat->mh.elements_num; i++)\n-\t\t\tpattern[i] = mh->ctx[i].mh_pattern;\n+\tif (mpctx->mh.elements_num) {\n+\t\ttypeof(mpctx->mh) *mh = &mpctx->mh;\n \t\tdr_action = mlx5dr_action_create_modify_header\n-\t\t\t(priv->dr_ctx, mpat->mh.elements_num, pattern,\n+\t\t\t(priv->dr_ctx, mpctx->mh.elements_num, mh->pattern,\n \t\t\t bulk_size, flags);\n \t\tif (!dr_action) {\n-\t\t\tmlx5_free(mh_refcnt);\n-\t\t\treturn rte_flow_error_set(error, rte_errno,\n+\t\t\tret = rte_flow_error_set(error, rte_errno,\n \t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n-\t\t\t\t\t\t NULL,\n-\t\t\t\t\t\t \"failed to create multi-pattern header modify action\");\n-\t\t}\n-\t\tfor (i = 0; i < mpat->mh.elements_num; i++) {\n-\t\t\tmh->ctx[i].rule_action->action = dr_action;\n-\t\t\tmh->ctx[i].mhdr->action = dr_action;\n-\t\t\tmh->ctx[i].mhdr->multi_pattern = 1;\n-\t\t\tmh->ctx[i].mhdr->multi_pattern_refcnt = mh_refcnt;\n+\t\t\t\t\t\t NULL, \"failed to create multi-pattern header modify action\");\n+\t\t\tgoto error;\n \t\t}\n+\t\tsegment->mhdr_action = dr_action;\n+\t}\n+\tif (dr_action) {\n+\t\tsegment->capacity = RTE_BIT32(bulk_size);\n+\t\tif (segment != &mpctx->segments[MLX5_MAX_TABLE_RESIZE_NUM - 1])\n+\t\t\tsegment[1].head_index = segment->head_index + segment->capacity;\n \t}\n-\n \treturn 0;\n+error:\n+\tmlx5_destroy_multi_pattern_segment(segment);\n+\treturn ret;\n }\n \n static int\n@@ -4203,7 +4159,6 @@ mlx5_hw_build_template_table(struct rte_eth_dev *dev,\n {\n \tint ret;\n \tuint8_t i;\n-\tstruct mlx5_tbl_multi_pattern_ctx mpat = MLX5_EMPTY_MULTI_PATTERN_CTX;\n \n \tfor (i = 0; i < nb_action_templates; i++) {\n \t\tuint32_t refcnt = __atomic_add_fetch(&action_templates[i]->refcnt, 1,\n@@ -4224,16 +4179,21 @@ mlx5_hw_build_template_table(struct rte_eth_dev *dev,\n \t\tret = __flow_hw_actions_translate(dev, &tbl->cfg,\n \t\t\t\t\t\t &tbl->ats[i].acts,\n \t\t\t\t\t\t action_templates[i],\n-\t\t\t\t\t\t &mpat, error);\n+\t\t\t\t\t\t &tbl->mpctx, error);\n \t\tif (ret) {\n \t\t\ti++;\n \t\t\tgoto at_error;\n \t\t}\n \t}\n \ttbl->nb_action_templates = nb_action_templates;\n-\tret = mlx5_tbl_multi_pattern_process(dev, tbl, &mpat, error);\n-\tif (ret)\n-\t\tgoto at_error;\n+\tif (mlx5_is_multi_pattern_active(&tbl->mpctx)) {\n+\t\tret = mlx5_tbl_multi_pattern_process(dev, tbl,\n+\t\t\t\t\t\t &tbl->mpctx.segments[0],\n+\t\t\t\t\t\t rte_log2_u32(tbl->cfg.attr.nb_flows),\n+\t\t\t\t\t\t error);\n+\t\tif (ret)\n+\t\t\tgoto at_error;\n+\t}\n \treturn 0;\n \n at_error:\n@@ -4600,6 +4560,28 @@ flow_hw_template_table_create(struct rte_eth_dev *dev,\n \t\t\t\t action_templates, nb_action_templates, error);\n }\n \n+static void\n+mlx5_destroy_multi_pattern_segment(struct mlx5_multi_pattern_segment *segment)\n+{\n+\tint i;\n+\n+\tif (segment->mhdr_action)\n+\t\tmlx5dr_action_destroy(segment->mhdr_action);\n+\tfor (i = 0; i < MLX5_MULTIPATTERN_ENCAP_NUM; i++) {\n+\t\tif (segment->reformat_action[i])\n+\t\t\tmlx5dr_action_destroy(segment->reformat_action[i]);\n+\t}\n+\tsegment->capacity = 0;\n+}\n+\n+static void\n+flow_hw_destroy_table_multi_pattern_ctx(struct rte_flow_template_table *table)\n+{\n+\tint sx;\n+\n+\tfor (sx = 0; sx < MLX5_MAX_TABLE_RESIZE_NUM; sx++)\n+\t\tmlx5_destroy_multi_pattern_segment(table->mpctx.segments + sx);\n+}\n /**\n * Destroy flow table.\n *\n@@ -4645,6 +4627,7 @@ flow_hw_table_destroy(struct rte_eth_dev *dev,\n \t\t__atomic_fetch_sub(&table->ats[i].action_template->refcnt,\n \t\t\t\t 1, __ATOMIC_RELAXED);\n \t}\n+\tflow_hw_destroy_table_multi_pattern_ctx(table);\n \tmlx5dr_matcher_destroy(table->matcher);\n \tmlx5_hlist_unregister(priv->sh->groups, &table->grp->entry);\n \tmlx5_ipool_destroy(table->resource);\n", "prefixes": [ "4/5" ] }