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GET /api/patches/136166/?format=api
{ "id": 136166, "url": "http://patches.dpdk.org/api/patches/136166/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240125133043.575860-24-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240125133043.575860-24-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240125133043.575860-24-michaelba@nvidia.com", "date": "2024-01-25T13:30:43", "name": "[v2,23/23] net/mlx5: add support for modify GENEVE option header", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "855f4b0ce673168a7e4e37594094f0b4133aab82", "submitter": { "id": 1949, "url": "http://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240125133043.575860-24-michaelba@nvidia.com/mbox/", "series": [ { "id": 30916, "url": "http://patches.dpdk.org/api/series/30916/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30916", "date": "2024-01-25T13:30:20", "name": "net/mlx5: support Geneve and options for HWS", "version": 2, "mbox": "http://patches.dpdk.org/series/30916/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136166/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/136166/checks/", "tags": {}, "related": [], "headers": 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<viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>, Suanming Mou\n <suanmingm@nvidia.com>", "Subject": "[PATCH v2 23/23] net/mlx5: add support for modify GENEVE option\n header", "Date": "Thu, 25 Jan 2024 15:30:43 +0200", "Message-ID": "<20240125133043.575860-24-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20240125133043.575860-1-michaelba@nvidia.com>", "References": "<20231203112543.844014-1-michaelba@nvidia.com>\n <20240125133043.575860-1-michaelba@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000EDD2:EE_|SN7PR12MB7180:EE_", "X-MS-Office365-Filtering-Correlation-Id": "147cd586-9ca0-45f2-d675-08dc1da9ff42", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": 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SFS:(13230031)(4636009)(39860400002)(396003)(376002)(136003)(346002)(230922051799003)(186009)(82310400011)(1800799012)(64100799003)(451199024)(36840700001)(46966006)(40470700004)(40480700001)(55016003)(40460700003)(83380400001)(47076005)(1076003)(86362001)(356005)(41300700001)(30864003)(36756003)(478600001)(336012)(8676002)(26005)(54906003)(426003)(2616005)(6286002)(4326008)(82740400003)(107886003)(6916009)(36860700001)(70206006)(316002)(5660300002)(2906002)(7636003)(7696005)(70586007)(8936002);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "25 Jan 2024 13:31:54.7922 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 147cd586-9ca0-45f2-d675-08dc1da9ff42", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.118.233];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000EDD2.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SN7PR12MB7180", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Add support for GENEVE option fields modification.\nOnly fields configured in parser creation can be modified.\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\nAcked-by: Suanming Mou <suanmingm@nvidia.com>\n---\n doc/guides/nics/mlx5.rst | 4 +\n doc/guides/rel_notes/release_24_03.rst | 3 +\n drivers/net/mlx5/mlx5_flow.h | 21 +++++\n drivers/net/mlx5/mlx5_flow_dv.c | 78 ++++++++++++++++-\n drivers/net/mlx5/mlx5_flow_geneve.c | 117 +++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_flow_hw.c | 71 ++++++++++-----\n 6 files changed, 268 insertions(+), 26 deletions(-)", "diff": "diff --git a/doc/guides/nics/mlx5.rst b/doc/guides/nics/mlx5.rst\nindex 0e3d0bc099..6e1e2df79a 100644\n--- a/doc/guides/nics/mlx5.rst\n+++ b/doc/guides/nics/mlx5.rst\n@@ -591,6 +591,10 @@ Limitations\n - Modification of GENEVE Network ID's is not supported when configured\n ``FLEX_PARSER_PROFILE_ENABLE`` supports Geneve TLV options.\n See :ref:`mlx5_firmware_config` for more flex parser information.\n+ - Modification of GENEVE TLV option fields is supported only for HW steering.\n+ Only DWs configured in :ref:`parser creation <geneve_parser_api>` can be modified,\n+ 'type' and 'class' fields can be modified when ``match_on_class_mode=2``.\n+ - Modification of GENEVE TLV option data supports one DW per action.\n - Encapsulation levels are not supported, can modify outermost header fields only.\n - Offsets cannot skip past the boundary of a field.\n - If the field type is ``RTE_FLOW_FIELD_MAC_TYPE``\ndiff --git a/doc/guides/rel_notes/release_24_03.rst b/doc/guides/rel_notes/release_24_03.rst\nindex 8b14ab8986..73515aad1e 100644\n--- a/doc/guides/rel_notes/release_24_03.rst\n+++ b/doc/guides/rel_notes/release_24_03.rst\n@@ -81,6 +81,9 @@ New Features\n \n * Added HW steering support for ``RTE_FLOW_ITEM_TYPE_GENEVE_OPT`` flow item.\n * Added HW steering support for modify field ``RTE_FLOW_FIELD_GENEVE_VNI`` flow action.\n+ * Added HW steering support for modify field ``RTE_FLOW_FIELD_GENEVE_OPT_TYPE`` flow action.\n+ * Added HW steering support for modify field ``RTE_FLOW_FIELD_GENEVE_OPT_CLASS`` flow action.\n+ * Added HW steering support for modify field ``RTE_FLOW_FIELD_GENEVE_OPT_DATA`` flow action.\n \n \n Removed Items\ndiff --git a/drivers/net/mlx5/mlx5_flow.h b/drivers/net/mlx5/mlx5_flow.h\nindex 655e4d3d86..c9cc942d80 100644\n--- a/drivers/net/mlx5/mlx5_flow.h\n+++ b/drivers/net/mlx5/mlx5_flow.h\n@@ -1811,6 +1811,25 @@ mlx5_get_geneve_hl_data(const void *dr_ctx, uint8_t type, uint16_t class,\n \t\t\tstruct mlx5_hl_data ** const hl_dws,\n \t\t\tbool *ok_bit_on_class);\n \n+/**\n+ * Get modify field ID for single DW inside configured GENEVE TLV option.\n+ *\n+ * @param[in] dr_ctx\n+ * Pointer to HW steering DR context.\n+ * @param[in] type\n+ * GENEVE TLV option type.\n+ * @param[in] class\n+ * GENEVE TLV option class.\n+ * @param[in] dw_offset\n+ * Offset of DW inside the option.\n+ *\n+ * @return\n+ * Modify field ID on success, negative errno otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_get_geneve_option_modify_field_id(const void *dr_ctx, uint8_t type,\n+\t\t\t\t uint16_t class, uint8_t dw_offset);\n+\n void *\n mlx5_geneve_tlv_parser_create(uint16_t port_id,\n \t\t\t const struct rte_pmd_mlx5_geneve_tlv tlv_list[],\n@@ -1819,6 +1838,8 @@ int mlx5_geneve_tlv_parser_destroy(void *handle);\n int mlx5_flow_geneve_tlv_option_validate(struct mlx5_priv *priv,\n \t\t\t\t\t const struct rte_flow_item *geneve_opt,\n \t\t\t\t\t struct rte_flow_error *error);\n+int mlx5_geneve_opt_modi_field_get(struct mlx5_priv *priv,\n+\t\t\t\t const struct rte_flow_action_modify_data *data);\n \n struct mlx5_geneve_tlv_options_mng;\n int mlx5_geneve_tlv_option_register(struct mlx5_priv *priv,\ndiff --git a/drivers/net/mlx5/mlx5_flow_dv.c b/drivers/net/mlx5/mlx5_flow_dv.c\nindex 5d5e2cadf6..6998be107f 100644\n--- a/drivers/net/mlx5/mlx5_flow_dv.c\n+++ b/drivers/net/mlx5/mlx5_flow_dv.c\n@@ -1465,6 +1465,21 @@ mlx5_mpls_modi_field_get(const struct rte_flow_action_modify_data *data)\n \treturn MLX5_MODI_IN_MPLS_LABEL_0 + data->tag_index;\n }\n \n+static __rte_always_inline int\n+flow_geneve_opt_modi_field_get(struct mlx5_priv *priv,\n+\t\t\t const struct rte_flow_action_modify_data *data)\n+{\n+#ifdef HAVE_MLX5_HWS_SUPPORT\n+\treturn mlx5_geneve_opt_modi_field_get(priv, data);\n+#else\n+\t(void)priv;\n+\t(void)data;\n+\tDRV_LOG(ERR, \"GENEVE option modification is not supported.\");\n+\trte_errno = ENOTSUP;\n+\treturn -rte_errno;\n+#endif\n+}\n+\n static void\n mlx5_modify_flex_item(const struct rte_eth_dev *dev,\n \t\t const struct mlx5_flex_item *flex,\n@@ -1604,9 +1619,11 @@ mlx5_flow_field_id_to_modify_info\n \t\t const struct rte_flow_attr *attr, struct rte_flow_error *error)\n {\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n+\tenum mlx5_modification_field modi_id;\n \tuint32_t idx = 0;\n \tuint32_t off_be = 0;\n \tuint32_t length = 0;\n+\n \tswitch ((int)data->field) {\n \tcase RTE_FLOW_FIELD_START:\n \t\t/* not supported yet */\n@@ -1968,6 +1985,48 @@ mlx5_flow_field_id_to_modify_info\n \t\telse\n \t\t\tinfo[idx].offset = off_be;\n \t\tbreak;\n+\tcase RTE_FLOW_FIELD_GENEVE_OPT_TYPE:\n+\t\tMLX5_ASSERT(data->offset + width <= 8);\n+\t\tmodi_id = flow_geneve_opt_modi_field_get(priv, data);\n+\t\tif (modi_id < 0)\n+\t\t\treturn;\n+\t\t/* Type is on bits 16-8 of GENEVE option header (DW0). */\n+\t\toff_be = 32 - (16 + data->offset + width);\n+\t\tinfo[idx] = (struct field_modify_info){4, 0, modi_id};\n+\t\tif (mask)\n+\t\t\tmask[idx] = flow_modify_info_mask_32(width, off_be);\n+\t\telse\n+\t\t\tinfo[idx].offset = off_be;\n+\t\tbreak;\n+\tcase RTE_FLOW_FIELD_GENEVE_OPT_CLASS:\n+\t\tMLX5_ASSERT(data->offset + width <= 16);\n+\t\tmodi_id = flow_geneve_opt_modi_field_get(priv, data);\n+\t\tif (modi_id < 0)\n+\t\t\treturn;\n+\t\t/* Class is on bits 31-16 of GENEVE option header (DW0). */\n+\t\toff_be = 32 - (data->offset + width);\n+\t\tinfo[idx] = (struct field_modify_info){4, 0, modi_id};\n+\t\tif (mask)\n+\t\t\tmask[idx] = flow_modify_info_mask_32(width, off_be);\n+\t\telse\n+\t\t\tinfo[idx].offset = off_be;\n+\t\tbreak;\n+\tcase RTE_FLOW_FIELD_GENEVE_OPT_DATA:\n+\t\tif ((data->offset % 32) + width > 32) {\n+\t\t\tDRV_LOG(ERR, \"Geneve TLV option data is per DW.\");\n+\t\t\treturn;\n+\t\t}\n+\t\tmodi_id = flow_geneve_opt_modi_field_get(priv, data);\n+\t\tif (modi_id < 0)\n+\t\t\treturn;\n+\t\t/* Use offset inside DW. */\n+\t\toff_be = 32 - ((data->offset % 32) + width);\n+\t\tinfo[idx] = (struct field_modify_info){4, 0, modi_id};\n+\t\tif (mask)\n+\t\t\tmask[idx] = flow_modify_info_mask_32(width, off_be);\n+\t\telse\n+\t\t\tinfo[idx].offset = off_be;\n+\t\tbreak;\n \tcase RTE_FLOW_FIELD_GTP_TEID:\n \t\tMLX5_ASSERT(data->offset + width <= 32);\n \t\toff_be = 32 - (data->offset + width);\n@@ -1981,8 +2040,8 @@ mlx5_flow_field_id_to_modify_info\n \tcase RTE_FLOW_FIELD_MPLS:\n \t\tMLX5_ASSERT(data->offset + width <= 32);\n \t\toff_be = 32 - (data->offset + width);\n-\t\tinfo[idx] = (struct field_modify_info){4, 0,\n-\t\t\t\t\tmlx5_mpls_modi_field_get(data)};\n+\t\tmodi_id = mlx5_mpls_modi_field_get(data);\n+\t\tinfo[idx] = (struct field_modify_info){4, 0, modi_id};\n \t\tif (mask)\n \t\t\tmask[idx] = flow_modify_info_mask_32(width, off_be);\n \t\telse\n@@ -5488,6 +5547,21 @@ flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,\n \t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n \t\t\t\t\"modifications of the GENEVE Network\"\n \t\t\t\t\" Identifier is not supported\");\n+\tif (dst_data->field == RTE_FLOW_FIELD_GENEVE_OPT_TYPE ||\n+\t src_data->field == RTE_FLOW_FIELD_GENEVE_OPT_TYPE)\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\"modifications of the GENEVE option type is not supported\");\n+\tif (dst_data->field == RTE_FLOW_FIELD_GENEVE_OPT_CLASS ||\n+\t src_data->field == RTE_FLOW_FIELD_GENEVE_OPT_CLASS)\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\"modifications of the GENEVE option class is not supported\");\n+\tif (dst_data->field == RTE_FLOW_FIELD_GENEVE_OPT_DATA ||\n+\t src_data->field == RTE_FLOW_FIELD_GENEVE_OPT_DATA)\n+\t\treturn rte_flow_error_set(error, ENOTSUP,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\"modifications of the GENEVE option data is not supported\");\n \tif (dst_data->field == RTE_FLOW_FIELD_MPLS ||\n \t src_data->field == RTE_FLOW_FIELD_MPLS)\n \t\treturn rte_flow_error_set(error, ENOTSUP,\ndiff --git a/drivers/net/mlx5/mlx5_flow_geneve.c b/drivers/net/mlx5/mlx5_flow_geneve.c\nindex f3ee414d02..d5847a60e9 100644\n--- a/drivers/net/mlx5/mlx5_flow_geneve.c\n+++ b/drivers/net/mlx5/mlx5_flow_geneve.c\n@@ -254,6 +254,123 @@ mlx5_geneve_tlv_options_unregister(struct mlx5_priv *priv,\n \tmng->nb_options = 0;\n }\n \n+/**\n+ * Get single DW resource from given option.\n+ *\n+ * @param option\n+ * Pointer to single GENEVE TLV option.\n+ * @param offset\n+ * Offset of DW related to option start.\n+ *\n+ * @return\n+ * DW resource on success, NULL otherwise and rte_errno is set.\n+ */\n+static struct mlx5_geneve_tlv_resource *\n+mlx5_geneve_tlv_option_get_resource_by_offset(struct mlx5_geneve_tlv_option *option,\n+\t\t\t\t\t uint8_t offset)\n+{\n+\tuint8_t i;\n+\n+\tfor (i = 0; option->resources[i].obj != NULL; ++i) {\n+\t\tif (option->resources[i].offset < offset)\n+\t\t\tcontinue;\n+\t\tif (option->resources[i].offset == offset)\n+\t\t\treturn &option->resources[i];\n+\t\tbreak;\n+\t}\n+\tDRV_LOG(ERR, \"The DW in offset %u wasn't configured.\", offset);\n+\trte_errno = EINVAL;\n+\treturn NULL;\n+}\n+\n+int\n+mlx5_get_geneve_option_modify_field_id(const void *dr_ctx, uint8_t type,\n+\t\t\t\t uint16_t class, uint8_t dw_offset)\n+{\n+\tuint16_t port_id;\n+\n+\tMLX5_ETH_FOREACH_DEV(port_id, NULL) {\n+\t\tstruct mlx5_priv *priv;\n+\t\tstruct mlx5_geneve_tlv_option *option;\n+\t\tstruct mlx5_geneve_tlv_resource *resource;\n+\n+\t\tpriv = rte_eth_devices[port_id].data->dev_private;\n+\t\tif (priv->dr_ctx != dr_ctx)\n+\t\t\tcontinue;\n+\t\t/* Find specific option inside list. */\n+\t\toption = mlx5_geneve_tlv_option_get(priv, type, class);\n+\t\tif (option == NULL)\n+\t\t\treturn -rte_errno;\n+\t\t/* Find specific FW object inside option resources. */\n+\t\tresource = mlx5_geneve_tlv_option_get_resource_by_offset(option,\n+\t\t\t\t\t\t\t\t\t dw_offset);\n+\t\tif (resource == NULL)\n+\t\t\treturn -rte_errno;\n+\t\treturn resource->modify_field;\n+\t}\n+\tDRV_LOG(ERR, \"DR CTX %p doesn't belong to any DPDK port.\", dr_ctx);\n+\trte_errno = EINVAL;\n+\treturn -rte_errno;\n+}\n+\n+/**\n+ * Get modify field ID for single DW inside configured GENEVE TLV option.\n+ *\n+ * @param[in] priv\n+ * Pointer to port's private data.\n+ * @param[in] data\n+ * Pointer to modify field data structure.\n+ *\n+ * @return\n+ * Modify field ID on success, negative errno otherwise and rte_errno is set.\n+ */\n+int\n+mlx5_geneve_opt_modi_field_get(struct mlx5_priv *priv,\n+\t\t\t const struct rte_flow_action_modify_data *data)\n+{\n+\tuint16_t class = data->class_id;\n+\tuint8_t type = data->type;\n+\tstruct mlx5_geneve_tlv_option *option;\n+\tstruct mlx5_geneve_tlv_resource *resource;\n+\tuint8_t offset;\n+\n+\toption = mlx5_geneve_tlv_option_get(priv, type, class);\n+\tif (option == NULL)\n+\t\treturn -rte_errno;\n+\tswitch (data->field) {\n+\tcase RTE_FLOW_FIELD_GENEVE_OPT_TYPE:\n+\tcase RTE_FLOW_FIELD_GENEVE_OPT_CLASS:\n+\t\tif (!option->match_data[0].dw_mask) {\n+\t\t\tDRV_LOG(ERR, \"DW0 isn't configured\");\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn -rte_errno;\n+\t\t}\n+\t\tresource = &option->resources[0];\n+\t\tMLX5_ASSERT(resource->offset == 0);\n+\t\tbreak;\n+\tcase RTE_FLOW_FIELD_GENEVE_OPT_DATA:\n+\t\t/*\n+\t\t * Convert offset twice:\n+\t\t * - First conversion from bit offset to DW offset.\n+\t\t * - Second conversion is to be related to data start instead\n+\t\t * of option start.\n+\t\t */\n+\t\toffset = (data->offset >> 5) + 1;\n+\t\tresource = mlx5_geneve_tlv_option_get_resource_by_offset(option,\n+\t\t\t\t\t\t\t\t\t offset);\n+\t\tbreak;\n+\tdefault:\n+\t\tDRV_LOG(ERR,\n+\t\t\t\"Field ID %u doesn't describe GENEVE option header.\",\n+\t\t\tdata->field);\n+\t\trte_errno = EINVAL;\n+\t\treturn -rte_errno;\n+\t}\n+\tif (resource == NULL)\n+\t\treturn -rte_errno;\n+\treturn resource->modify_field;\n+}\n+\n /**\n * Create single GENEVE TLV option sample.\n *\ndiff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 687d809b1b..7510715189 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -1257,10 +1257,12 @@ flow_hw_modify_field_compile(struct rte_eth_dev *dev,\n \t\t\telse\n \t\t\t\tvalue = rte_cpu_to_be_32(value);\n \t\t\titem.spec = &value;\n-\t\t} else if (conf->dst.field == RTE_FLOW_FIELD_GTP_PSC_QFI) {\n+\t\t} else if (conf->dst.field == RTE_FLOW_FIELD_GTP_PSC_QFI ||\n+\t\t\t conf->dst.field == RTE_FLOW_FIELD_GENEVE_OPT_TYPE) {\n \t\t\t/*\n-\t\t\t * QFI is passed as an uint8_t integer, but it is accessed through\n-\t\t\t * a 2nd least significant byte of a 32-bit field in modify header command.\n+\t\t\t * Both QFI and Geneve option type are passed as an uint8_t integer,\n+\t\t\t * but it is accessed through a 2nd least significant byte of a 32-bit\n+\t\t\t * field in modify header command.\n \t\t\t */\n \t\t\tvalue = *(const uint8_t *)item.spec;\n \t\t\tvalue = rte_cpu_to_be_32(value << 8);\n@@ -2829,12 +2831,14 @@ flow_hw_modify_field_construct(struct mlx5_hw_q_job *job,\n \t\t\t*value_p = rte_cpu_to_be_32(*value_p << 16);\n \t\telse\n \t\t\t*value_p = rte_cpu_to_be_32(*value_p);\n-\t} else if (mhdr_action->dst.field == RTE_FLOW_FIELD_GTP_PSC_QFI) {\n+\t} else if (mhdr_action->dst.field == RTE_FLOW_FIELD_GTP_PSC_QFI ||\n+\t\t mhdr_action->dst.field == RTE_FLOW_FIELD_GENEVE_OPT_TYPE) {\n \t\tuint32_t tmp;\n \n \t\t/*\n-\t\t * QFI is passed as an uint8_t integer, but it is accessed through\n-\t\t * a 2nd least significant byte of a 32-bit field in modify header command.\n+\t\t * Both QFI and Geneve option type are passed as an uint8_t integer,\n+\t\t * but it is accessed through a 2nd least significant byte of a 32-bit\n+\t\t * field in modify header command.\n \t\t */\n \t\ttmp = values[0];\n \t\tvalue_p = (unaligned_uint32_t *)values;\n@@ -4955,6 +4959,14 @@ flow_hw_modify_field_is_used(const struct rte_flow_action_modify_field *action,\n \treturn action->src.field == field || action->dst.field == field;\n }\n \n+static bool\n+flow_hw_modify_field_is_geneve_opt(enum rte_flow_field_id field)\n+{\n+\treturn field == RTE_FLOW_FIELD_GENEVE_OPT_TYPE ||\n+\t field == RTE_FLOW_FIELD_GENEVE_OPT_CLASS ||\n+\t field == RTE_FLOW_FIELD_GENEVE_OPT_DATA;\n+}\n+\n static bool\n flow_hw_modify_field_is_add_dst_valid(const struct rte_flow_action_modify_field *conf)\n {\n@@ -5015,15 +5027,17 @@ flow_hw_validate_action_modify_field(struct rte_eth_dev *dev,\n \tret = flow_validate_modify_field_level(&action_conf->dst, error);\n \tif (ret)\n \t\treturn ret;\n-\tif (action_conf->dst.tag_index &&\n-\t !flow_modify_field_support_tag_array(action_conf->dst.field))\n-\t\treturn rte_flow_error_set(error, EINVAL,\n-\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n-\t\t\t\t\"destination tag index is not supported\");\n-\tif (action_conf->dst.class_id)\n-\t\treturn rte_flow_error_set(error, EINVAL,\n-\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n-\t\t\t\t\"destination class id is not supported\");\n+\tif (!flow_hw_modify_field_is_geneve_opt(action_conf->dst.field)) {\n+\t\tif (action_conf->dst.tag_index &&\n+\t\t !flow_modify_field_support_tag_array(action_conf->dst.field))\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\t\"destination tag index is not supported\");\n+\t\tif (action_conf->dst.class_id)\n+\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\t\"destination class id is not supported\");\n+\t}\n \tif (mask_conf->dst.level != UINT8_MAX)\n \t\treturn rte_flow_error_set(error, EINVAL,\n \t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n@@ -5038,15 +5052,17 @@ flow_hw_validate_action_modify_field(struct rte_eth_dev *dev,\n \t\t\t\t\"destination field mask and template are not equal\");\n \tif (action_conf->src.field != RTE_FLOW_FIELD_POINTER &&\n \t action_conf->src.field != RTE_FLOW_FIELD_VALUE) {\n-\t\tif (action_conf->src.tag_index &&\n-\t\t !flow_modify_field_support_tag_array(action_conf->src.field))\n-\t\t\treturn rte_flow_error_set(error, EINVAL,\n-\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n-\t\t\t\t\"source tag index is not supported\");\n-\t\tif (action_conf->src.class_id)\n-\t\t\treturn rte_flow_error_set(error, EINVAL,\n-\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n-\t\t\t\t\"source class id is not supported\");\n+\t\tif (!flow_hw_modify_field_is_geneve_opt(action_conf->src.field)) {\n+\t\t\tif (action_conf->src.tag_index &&\n+\t\t\t !flow_modify_field_support_tag_array(action_conf->src.field))\n+\t\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\t\"source tag index is not supported\");\n+\t\t\tif (action_conf->src.class_id)\n+\t\t\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\t\"source class id is not supported\");\n+\t\t}\n \t\tif (mask_conf->src.level != UINT8_MAX)\n \t\t\treturn rte_flow_error_set(error, EINVAL,\n \t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n@@ -5101,6 +5117,13 @@ flow_hw_validate_action_modify_field(struct rte_eth_dev *dev,\n \t\treturn rte_flow_error_set(error, EINVAL,\n \t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n \t\t\t\t\"modifying Geneve VNI is not supported when GENEVE opt is supported\");\n+\tif (priv->tlv_options == NULL &&\n+\t (flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_GENEVE_OPT_TYPE) ||\n+\t flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_GENEVE_OPT_CLASS) ||\n+\t flow_hw_modify_field_is_used(action_conf, RTE_FLOW_FIELD_GENEVE_OPT_DATA)))\n+\t\treturn rte_flow_error_set(error, EINVAL,\n+\t\t\t\tRTE_FLOW_ERROR_TYPE_ACTION, action,\n+\t\t\t\t\"modifying Geneve TLV option is supported only after parser configuration\");\n \t/* Due to HW bug, tunnel MPLS header is read only. */\n \tif (action_conf->dst.field == RTE_FLOW_FIELD_MPLS)\n \t\treturn rte_flow_error_set(error, EINVAL,\n", "prefixes": [ "v2", "23/23" ] }