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GET /api/patches/136058/?format=api
{ "id": 136058, "url": "http://patches.dpdk.org/api/patches/136058/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20240123114053.172189-2-bruce.richardson@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20240123114053.172189-2-bruce.richardson@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20240123114053.172189-2-bruce.richardson@intel.com", "date": "2024-01-23T11:40:48", "name": "[1/6] net/i40e: remove incorrect 16B descriptor read block", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "96f9deabfc600e63fb0415de41cf836c80a65c5e", "submitter": { "id": 20, "url": "http://patches.dpdk.org/api/people/20/?format=api", "name": "Bruce Richardson", "email": "bruce.richardson@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20240123114053.172189-2-bruce.richardson@intel.com/mbox/", "series": [ { "id": 30884, "url": "http://patches.dpdk.org/api/series/30884/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30884", "date": "2024-01-23T11:40:47", "name": "remove incorrect code for loading 16B descriptors", "version": 1, "mbox": "http://patches.dpdk.org/series/30884/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/136058/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/136058/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2AB27439A7;\n\tTue, 23 Jan 2024 12:41:20 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 8DF0D410F2;\n\tTue, 23 Jan 2024 12:41:16 +0100 (CET)", "from mgamail.intel.com (mgamail.intel.com [192.198.163.7])\n by mails.dpdk.org (Postfix) with ESMTP id C2DB9402B0;\n Tue, 23 Jan 2024 12:41:14 +0100 (CET)", "from orviesa002.jf.intel.com ([10.64.159.142])\n by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 23 Jan 2024 03:41:14 -0800", "from silpixa00400957.ir.intel.com (HELO\n silpixa00401385.ir.intel.com) ([10.237.214.26])\n by orviesa002.jf.intel.com with ESMTP; 23 Jan 2024 03:41:14 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1706010075; x=1737546075;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=I/2EzG5KN81ZqWLYgs0vgLi8timi0LOTCBJaIHoyZmk=;\n b=UajyE49Az+shjREvI5w6vMmLIkHEsmjItAvpfnUhr2K7OpNzo/AmFstc\n Kqlx3NoO6zk72HTL1QDxglK7KcM/LuGEttejzT/4rlxjCFzv3Qkidh4vP\n W2P8V/GvbZu9gT727pNnUoc3++LNCiDd8cOyNEo5613OalS/yfywwjNkp\n TdTv63xJSfSQMi1hKsu4PgF6Ej6qHTKfJ+eSaRKGftlovYjCTrn99PZmX\n bCeGFPqQGzz0sCNcbJ0y7rx4QXfug+EIpqQXt6wVUsuJq/V3AevNvwaTi\n bryPSmE16uDE5rPHO+oGb59KcVQjkXaq+reqQK3hUJDJ61dQQC9Pmmy0G w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10961\"; a=\"22965757\"", "E=Sophos;i=\"6.05,214,1701158400\"; d=\"scan'208\";a=\"22965757\"", "E=Sophos;i=\"6.05,214,1701158400\"; d=\"scan'208\";a=\"27722314\"" ], "X-ExtLoop1": "1", "From": "Bruce Richardson <bruce.richardson@intel.com>", "To": "dev@dpdk.org", "Cc": "Bruce Richardson <bruce.richardson@intel.com>,\n\tstable@dpdk.org", "Subject": "[PATCH 1/6] net/i40e: remove incorrect 16B descriptor read block", "Date": "Tue, 23 Jan 2024 11:40:48 +0000", "Message-Id": "<20240123114053.172189-2-bruce.richardson@intel.com>", "X-Mailer": "git-send-email 2.40.1", "In-Reply-To": "<20240123114053.172189-1-bruce.richardson@intel.com>", "References": "<20240123114053.172189-1-bruce.richardson@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "By default, the driver works with 32B descriptors, but has a separate\ndescriptor read block for reading two descriptors at a time when using\n16B descriptors. However, the 32B reads used are not guaranteed to be\natomic, which will cause issues if that is not the case on a system,\nsince the descriptors may be read in an undefined order. Remove the\nblock, to avoid issues, and just use the regular descriptor reading path\nfor 16B descriptors, if that support is enabled at build time.\n\nFixes: dafadd73762e (\"net/i40e: add AVX2 Rx function\")\nCc: stable@dpdk.org\n\nSigned-off-by: Bruce Richardson <bruce.richardson@intel.com>\n---\n drivers/net/i40e/i40e_rxtx_vec_avx2.c | 13 -------------\n 1 file changed, 13 deletions(-)", "diff": "diff --git a/drivers/net/i40e/i40e_rxtx_vec_avx2.c b/drivers/net/i40e/i40e_rxtx_vec_avx2.c\nindex f468c1fd90..ce87e185f0 100644\n--- a/drivers/net/i40e/i40e_rxtx_vec_avx2.c\n+++ b/drivers/net/i40e/i40e_rxtx_vec_avx2.c\n@@ -277,19 +277,6 @@ _recv_raw_pkts_vec_avx2(struct i40e_rx_queue *rxq, struct rte_mbuf **rx_pkts,\n #endif\n \n \t\t__m256i raw_desc0_1, raw_desc2_3, raw_desc4_5, raw_desc6_7;\n-#ifdef RTE_LIBRTE_I40E_16BYTE_RX_DESC\n-\t\t/* for AVX we need alignment otherwise loads are not atomic */\n-\t\tif (avx_aligned) {\n-\t\t\t/* load in descriptors, 2 at a time, in reverse order */\n-\t\t\traw_desc6_7 = _mm256_load_si256((void *)(rxdp + 6));\n-\t\t\trte_compiler_barrier();\n-\t\t\traw_desc4_5 = _mm256_load_si256((void *)(rxdp + 4));\n-\t\t\trte_compiler_barrier();\n-\t\t\traw_desc2_3 = _mm256_load_si256((void *)(rxdp + 2));\n-\t\t\trte_compiler_barrier();\n-\t\t\traw_desc0_1 = _mm256_load_si256((void *)(rxdp + 0));\n-\t\t} else\n-#endif\n \t\tdo {\n \t\t\tconst __m128i raw_desc7 = _mm_load_si128((void *)(rxdp + 7));\n \t\t\trte_compiler_barrier();\n", "prefixes": [ "1/6" ] }