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GET /api/patches/133673/?format=api
{ "id": 133673, "url": "http://patches.dpdk.org/api/patches/133673/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231031142733.2009166-4-dsosnowski@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231031142733.2009166-4-dsosnowski@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231031142733.2009166-4-dsosnowski@nvidia.com", "date": "2023-10-31T14:27:28", "name": "[3/8] common/mlx5: add Netlink check for Multiport E-Switch", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "44021c411ae192fed75bc48796d8e5cd18515ebe", "submitter": { "id": 2386, "url": "http://patches.dpdk.org/api/people/2386/?format=api", "name": "Dariusz Sosnowski", "email": "dsosnowski@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231031142733.2009166-4-dsosnowski@nvidia.com/mbox/", "series": [ { "id": 30075, "url": "http://patches.dpdk.org/api/series/30075/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30075", "date": "2023-10-31T14:27:26", "name": "net/mlx5: add Multiport E-Switch support", "version": 1, "mbox": "http://patches.dpdk.org/series/30075/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/133673/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/133673/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2060543252;\n\tTue, 31 Oct 2023 15:28:56 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 490EC41156;\n\tTue, 31 Oct 2023 15:28:27 +0100 (CET)", "from NAM04-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam04on2088.outbound.protection.outlook.com [40.107.102.88])\n by mails.dpdk.org (Postfix) with ESMTP id 62C6641143\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Dariusz Sosnowski <dsosnowski@nvidia.com>", "To": "Matan Azrad <matan@nvidia.com>, Viacheslav Ovsiienko\n <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>, Suanming Mou\n <suanmingm@nvidia.com>", "CC": "<dev@dpdk.org>, Raslan Darawsheh <rasland@nvidia.com>", "Subject": "[PATCH 3/8] common/mlx5: add Netlink check for Multiport E-Switch", "Date": "Tue, 31 Oct 2023 16:27:28 +0200", "Message-ID": "<20231031142733.2009166-4-dsosnowski@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20231031142733.2009166-1-dsosnowski@nvidia.com>", "References": "<20231031142733.2009166-1-dsosnowski@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "MWH0EPF000971E7:EE_|PH8PR12MB7183:EE_", "X-MS-Office365-Filtering-Correlation-Id": "198f5600-e0f1-423c-f42d-08dbda1da2a4", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n sZ5ApEgBpvNnEX86ZgDLwNbABgrU7ttbEU3B+vUMUWKDV47XGFsP96QIygbkrkJmySjcg+Q71ovAbXa+gpVtPvQy6hDGq8Ltfu88YtdFWugzRBr8UfM0HtARGrV8ecEyP6JEHC7P5rqWvnEQMvTkBCqgjeaXvS3oJpo0nfAhdecGMtf4GvBIgT4rc9ffafYmcQDfpfC8f7FVsIMmAO9PaZrJMFLjcGh8laalYxz+XmI2EmckGVxrEj7xddTHzo7Hijm1N8hYiE9GTNRPIEfuqkAmEMWWMhQnmy1uL9qRBbuMhI33bMXhQJR3LAZ8A2QtfSnkloJgN22HvsWSeQxDRKdKfyq4fvI+hVSWNcOXZCbtMuppPGV1bCOmccLyMWxVfTmRISDB3rFxvskSHxPILuS1y3VjECl7hGt1Qknts3AZPDtBs0yhiZ1uZVV1LKxklFeX5tMC3w94wTdDSoUE0ZDNRcW7ZXV7UvgUnJ6YTL4HwoRz/Vv8IwP9wbL9JpdOkGupO2IbZWCk+IgF0N++2IQcWhZaRMILCY849rcLXmjZacbqWGDQ4sZyGnATMkAy76rUK8WDkJnshq7phQ9VFTOuzOAO4ZQjkv5v/zp3H4/SpVncyrOD1fUvQsdH06NWZIUvvwQx+OcR/zPsXZLZBxBks3eAWep9nh7UtOEWNm8Vqo/t0PBG82Fr4DpPxLv7tyxiCVsPS5S32Vb6uDkSj8+InoTg3bu8LEpL0c/RYVnRgQgMh3ux5wZrlJrA/OAc", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(136003)(39860400002)(376002)(396003)(346002)(230922051799003)(82310400011)(1800799009)(451199024)(186009)(64100799003)(40470700004)(46966006)(36840700001)(2906002)(6286002)(26005)(1076003)(16526019)(2616005)(336012)(83380400001)(478600001)(7696005)(36860700001)(6666004)(426003)(47076005)(5660300002)(41300700001)(70206006)(70586007)(110136005)(107886003)(8676002)(4326008)(8936002)(316002)(54906003)(6636002)(40460700003)(356005)(7636003)(82740400003)(86362001)(36756003)(55016003)(40480700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "31 Oct 2023 14:28:21.9120 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 198f5600-e0f1-423c-f42d-08dbda1da2a4", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n MWH0EPF000971E7.namprd02.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "PH8PR12MB7183", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch implements checking if Multiport E-Switch is enabled\non a given PCI device using Devlink Linux kernel interface.\nThis facility will be used in follow up commits, which add support\nfor such configuration to mlx5 PMD.\n\nIf mlx5_core Linux kernel module supports Multiport E-Switch,\nthen it can be configured through a Devlink boolean parameter\n\"esw_multiport\". Checking the value of this parameter\nis implemented in mlx5_nl_devlink_esw_multiport_get() function.\nIf such parameter does not exist, this function returns -EINVAL.\n\nTo manually check if mlx5_core kernel module supports \"esw_multiport\"\nparameter, and check if Multiport E-Switch is enabled,\none can use the following command:\n\n # <pci-dbdf> should be substituted with PCI device address\n # in format <domain>:<bus>:<device>:<function>.\n $ devlink dev param show pci/0000:08:00.0 name esw_multiport\n pci/0000:08:00.0:\n name esw_multiport type driver-specific\n values:\n cmode runtime value true\n\nIf parameter is not supported, Devlink command fails with\n\"Invalid argument\" error.\n\nSigned-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>\nAcked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>\n---\n drivers/common/mlx5/linux/mlx5_nl.c | 70 +++++++++++++++++++++++++++++\n drivers/common/mlx5/linux/mlx5_nl.h | 5 +++\n drivers/common/mlx5/version.map | 2 +\n 3 files changed, 77 insertions(+)", "diff": "diff --git a/drivers/common/mlx5/linux/mlx5_nl.c b/drivers/common/mlx5/linux/mlx5_nl.c\nindex 33670bb5c8..28a1f56dba 100644\n--- a/drivers/common/mlx5/linux/mlx5_nl.c\n+++ b/drivers/common/mlx5/linux/mlx5_nl.c\n@@ -1962,3 +1962,73 @@ mlx5_nl_read_events(int nlsk_fd, mlx5_nl_event_cb *cb, void *cb_arg)\n \t}\n \treturn 0;\n }\n+\n+static int\n+mlx5_nl_esw_multiport_cb(struct nlmsghdr *nh, void *arg)\n+{\n+\n+\tint ret = -EINVAL;\n+\tint *enable = arg;\n+\tstruct nlattr *tail = RTE_PTR_ADD(nh, nh->nlmsg_len);\n+\tstruct nlattr *nla = RTE_PTR_ADD(nh, NLMSG_ALIGN(sizeof(*nh)) +\n+\t\t\t\t\tNLMSG_ALIGN(sizeof(struct genlmsghdr)));\n+\n+\twhile (nla->nla_len && nla < tail) {\n+\t\tswitch (nla->nla_type) {\n+\t\t/* Expected nested attributes case. */\n+\t\tcase DEVLINK_ATTR_PARAM:\n+\t\tcase DEVLINK_ATTR_PARAM_VALUES_LIST:\n+\t\tcase DEVLINK_ATTR_PARAM_VALUE:\n+\t\t\tret = 0;\n+\t\t\tnla += 1;\n+\t\t\tbreak;\n+\t\tcase DEVLINK_ATTR_PARAM_VALUE_DATA:\n+\t\t\t*enable = 1;\n+\t\t\treturn 0;\n+\t\tdefault:\n+\t\t\tnla = RTE_PTR_ADD(nla, NLMSG_ALIGN(nla->nla_len));\n+\t\t}\n+\t}\n+\t*enable = 0;\n+\treturn ret;\n+}\n+\n+#define NL_ESW_MULTIPORT_PARAM \"esw_multiport\"\n+\n+int\n+mlx5_nl_devlink_esw_multiport_get(int nlsk_fd, int family_id, const char *pci_addr, int *enable)\n+{\n+\tstruct nlmsghdr *nlh;\n+\tstruct genlmsghdr *genl;\n+\tuint32_t sn = MLX5_NL_SN_GENERATE;\n+\tint ret;\n+\tuint8_t buf[NLMSG_ALIGN(sizeof(struct nlmsghdr)) +\n+\t\t NLMSG_ALIGN(sizeof(struct genlmsghdr)) +\n+\t\t NLMSG_ALIGN(sizeof(struct nlattr)) * 4 +\n+\t\t NLMSG_ALIGN(MLX5_NL_MAX_ATTR_SIZE) * 4];\n+\n+\tmemset(buf, 0, sizeof(buf));\n+\tnlh = (struct nlmsghdr *)buf;\n+\tnlh->nlmsg_len = sizeof(struct nlmsghdr);\n+\tnlh->nlmsg_type = family_id;\n+\tnlh->nlmsg_flags = NLM_F_REQUEST | NLM_F_ACK;\n+\tgenl = (struct genlmsghdr *)nl_msg_tail(nlh);\n+\tnlh->nlmsg_len += sizeof(struct genlmsghdr);\n+\tgenl->cmd = DEVLINK_CMD_PARAM_GET;\n+\tgenl->version = DEVLINK_GENL_VERSION;\n+\tnl_attr_put(nlh, DEVLINK_ATTR_BUS_NAME, \"pci\", 4);\n+\tnl_attr_put(nlh, DEVLINK_ATTR_DEV_NAME, pci_addr, strlen(pci_addr) + 1);\n+\tnl_attr_put(nlh, DEVLINK_ATTR_PARAM_NAME,\n+\t\t NL_ESW_MULTIPORT_PARAM, sizeof(NL_ESW_MULTIPORT_PARAM));\n+\tret = mlx5_nl_send(nlsk_fd, nlh, sn);\n+\tif (ret >= 0)\n+\t\tret = mlx5_nl_recv(nlsk_fd, sn, mlx5_nl_esw_multiport_cb, enable);\n+\tif (ret < 0) {\n+\t\tDRV_LOG(DEBUG, \"Failed to get Multiport E-Switch enable on device %s: %d.\",\n+\t\t\tpci_addr, ret);\n+\t\treturn ret;\n+\t}\n+\tDRV_LOG(DEBUG, \"Multiport E-Switch is %sabled for device \\\"%s\\\".\",\n+\t\t*enable ? \"en\" : \"dis\", pci_addr);\n+\treturn ret;\n+}\ndiff --git a/drivers/common/mlx5/linux/mlx5_nl.h b/drivers/common/mlx5/linux/mlx5_nl.h\nindex db01d7323e..580de3b769 100644\n--- a/drivers/common/mlx5/linux/mlx5_nl.h\n+++ b/drivers/common/mlx5/linux/mlx5_nl.h\n@@ -71,6 +71,7 @@ __rte_internal\n uint32_t mlx5_nl_vlan_vmwa_create(struct mlx5_nl_vlan_vmwa_context *vmwa,\n \t\t\t\t uint32_t ifindex, uint16_t tag);\n \n+__rte_internal\n int mlx5_nl_devlink_family_id_get(int nlsk_fd);\n int mlx5_nl_enable_roce_get(int nlsk_fd, int family_id, const char *pci_addr,\n \t\t\t int *enable);\n@@ -82,4 +83,8 @@ int mlx5_nl_read_events(int nlsk_fd, mlx5_nl_event_cb *cb, void *cb_arg);\n __rte_internal\n int mlx5_nl_parse_link_status_update(struct nlmsghdr *hdr, uint32_t *ifindex);\n \n+__rte_internal\n+int mlx5_nl_devlink_esw_multiport_get(int nlsk_fd, int family_id,\n+\t\t\t\t const char *pci_addr, int *enable);\n+\n #endif /* RTE_PMD_MLX5_NL_H_ */\ndiff --git a/drivers/common/mlx5/version.map b/drivers/common/mlx5/version.map\nindex 0758ba76de..074eed46fd 100644\n--- a/drivers/common/mlx5/version.map\n+++ b/drivers/common/mlx5/version.map\n@@ -125,6 +125,8 @@ INTERNAL {\n \tmlx5_mr_addr2mr_bh;\n \n \tmlx5_nl_allmulti; # WINDOWS_NO_EXPORT\n+\tmlx5_nl_devlink_esw_multiport_get; # WINDOWS_NO_EXPORT\n+\tmlx5_nl_devlink_family_id_get; # WINDOWS_NO_EXPORT\n \tmlx5_nl_ifindex; # WINDOWS_NO_EXPORT\n \tmlx5_nl_init; # WINDOWS_NO_EXPORT\n \tmlx5_nl_mac_addr_add; # WINDOWS_NO_EXPORT\n", "prefixes": [ "3/8" ] }