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GET /api/patches/133591/?format=api
{ "id": 133591, "url": "http://patches.dpdk.org/api/patches/133591/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231029163202.216450-18-getelson@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231029163202.216450-18-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231029163202.216450-18-getelson@nvidia.com", "date": "2023-10-29T16:31:50", "name": "[18/30] net/mlx5/hws: support reformat trailer action", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "a0c2ccc7e7797cf90f7d907b3a1d4c4ef767770a", "submitter": { "id": 1882, "url": "http://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231029163202.216450-18-getelson@nvidia.com/mbox/", "series": [ { "id": 30049, "url": "http://patches.dpdk.org/api/series/30049/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=30049", "date": "2023-10-29T16:31:33", "name": "[01/30] net/mlx5/hws: Definer, add mlx5dr context to definer_conv_data", "version": 1, "mbox": "http://patches.dpdk.org/series/30049/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/133591/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/133591/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0114143238;\n\tSun, 29 Oct 2023 17:35:07 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E483242D0B;\n\tSun, 29 Oct 2023 17:33:33 +0100 (CET)", "from NAM11-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam11on2041.outbound.protection.outlook.com [40.107.236.41])\n by mails.dpdk.org (Postfix) with ESMTP id A011C427DC\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<getelson@nvidia.com>, <mkashani@nvidia.com>, <rasland@nvidia.com>,\n \"Hamdan Igbaria\" <hamdani@nvidia.com>, Alex Vesker <valex@nvidia.com>, Matan\n Azrad <matan@nvidia.com>, Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Ori\n Kam <orika@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>", "Subject": "[PATCH 18/30] net/mlx5/hws: support reformat trailer action", "Date": "Sun, 29 Oct 2023 18:31:50 +0200", "Message-ID": "<20231029163202.216450-18-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20231029163202.216450-1-getelson@nvidia.com>", "References": "<20231029163202.216450-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CO1PEPF000044F4:EE_|DS0PR12MB8043:EE_", "X-MS-Office365-Filtering-Correlation-Id": "6841ccd3-b238-4d17-92b7-08dbd89cc830", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n VYAiG2LqzKXBplEvjiXi4cdW01oYiVvAJigWBpcj3o/tooIhVMd+rH5Kqa8YdnQpCnU+Csae5twHuIhfCjVoalN1Lj4yEu+0HqVimfCtN5QeXz4CfCafaWjNpCHxtWjUmOslvNHeXkUjfH3ROW4DqRv5Q6ZY4Qp4EcAtvQLteUtwfx4nL9Rz6t9Y9feesvlowjGsESSct4SvsD7430+Q0QxqVJBfaVAqsCcxp0CZptdP3TxkhYcfKNVDhXqeU8ai8XAftBM0rtU1aIiK45q8jwRq6A/MIcJVLeACHDRJKxrNOe9/5nHofLqemwbMt/W3xZf/tVZycWcUpeGiirb/+sUwDc/iDsJ9QSXJMzDiIFSzROQL6Y8ga6Nqk5dptUkW9SZXJNlPuIvYkFQ4+umJBzKDttKf+wqRfy2T+6IklK9gGIJ5W9ptdPviKdihFjeenPaLot+FJ0c1qB4mlLnbk4sYAX9cBhmUvFYio9zRvgjnVTfGSjU7UsrGZTJh3sLsAfjGKORSImXBchz65iyeilajIKif+ti/u2cWaRUz+BFWRObBt9kaBIwHyssCiHEPzg/dI9jL8/8ukdKpSK1VlWHsrDxhKhclOj+23AyetmRSDHinHUTb/6J5NneXEiAHQte9mURFkxB9s8sZVliuYX6a7jWYfosVaeYRlQmxP4Aoo9pAU46HEwJr2jbFkBZpTW3TfVjzxszfRPAfZLM2fE7PTHW2Br46Dkt8cj6SiF5e1n3P3oOBBZHlBm8WWLiw", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(39860400002)(136003)(346002)(396003)(376002)(230922051799003)(186009)(1800799009)(82310400011)(64100799003)(451199024)(36840700001)(40470700004)(46966006)(40460700003)(40480700001)(55016003)(1076003)(478600001)(16526019)(2616005)(70586007)(316002)(6666004)(7696005)(107886003)(70206006)(336012)(47076005)(426003)(36860700001)(86362001)(7636003)(6286002)(26005)(8936002)(41300700001)(8676002)(82740400003)(83380400001)(4326008)(356005)(5660300002)(6916009)(36756003)(54906003)(2906002)(30864003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "29 Oct 2023 16:33:28.7243 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 6841ccd3-b238-4d17-92b7-08dbd89cc830", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1PEPF000044F4.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DS0PR12MB8043", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Hamdan Igbaria <hamdani@nvidia.com>\n\nSupport reformat trailer action, this action allows\nto insert/remove specific crypto security protocol\ntrailer on the packet.\nFor now support IPsec crypto protocol trailer.\nThe trailer should be added before encrypting the\npacket in Tx flow, and it can be removed after decryption\nin Rx flow.\n\nSigned-off-by: Hamdan Igbaria <hamdani@nvidia.com>\nReviewed-by: Alex Vesker <valex@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/common/mlx5/mlx5_prm.h | 11 +++\n drivers/net/mlx5/hws/mlx5dr.h | 32 ++++++++\n drivers/net/mlx5/hws/mlx5dr_action.c | 114 ++++++++++++++++++++++++++-\n drivers/net/mlx5/hws/mlx5dr_action.h | 5 ++\n drivers/net/mlx5/hws/mlx5dr_cmd.c | 8 ++\n drivers/net/mlx5/hws/mlx5dr_cmd.h | 5 ++\n drivers/net/mlx5/hws/mlx5dr_debug.c | 1 +\n 7 files changed, 172 insertions(+), 4 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex 31ebec7bcf..793fc1a674 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -3501,6 +3501,7 @@ enum mlx5_ifc_stc_action_type {\n \tMLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_ENCRYPTION = 0x10,\n \tMLX5_IFC_STC_ACTION_TYPE_CRYPTO_IPSEC_DECRYPTION = 0x11,\n \tMLX5_IFC_STC_ACTION_TYPE_ASO = 0x12,\n+\tMLX5_IFC_STC_ACTION_TYPE_TRAILER = 0x13,\n \tMLX5_IFC_STC_ACTION_TYPE_COUNTER = 0x14,\n \tMLX5_IFC_STC_ACTION_TYPE_ADD_FIELD = 0x1b,\n \tMLX5_IFC_STC_ACTION_TYPE_JUMP_TO_STE_TABLE = 0x80,\n@@ -3557,6 +3558,15 @@ struct mlx5_ifc_stc_ste_param_ipsec_decrypt_bits {\n \tu8 ipsec_object_id[0x20];\n };\n \n+struct mlx5_ifc_stc_ste_param_trailer_bits {\n+\tu8 reserved_at_0[0x8];\n+\tu8 command[0x4];\n+\tu8 reserved_at_c[0x2];\n+\tu8 type[0x2];\n+\tu8 reserved_at_10[0xa];\n+\tu8 length[0x6];\n+};\n+\n struct mlx5_ifc_stc_ste_param_header_modify_list_bits {\n \tu8 header_modify_pattern_id[0x20];\n \tu8 header_modify_argument_id[0x20];\n@@ -3625,6 +3635,7 @@ union mlx5_ifc_stc_param_bits {\n \tstruct mlx5_ifc_stc_ste_param_vport_bits vport;\n \tstruct mlx5_ifc_stc_ste_param_ipsec_encrypt_bits ipsec_encrypt;\n \tstruct mlx5_ifc_stc_ste_param_ipsec_decrypt_bits ipsec_decrypt;\n+\tstruct mlx5_ifc_stc_ste_param_trailer_bits trailer;\n \tu8 reserved_at_0[0x80];\n };\n \ndiff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h\nindex bd352fa26d..e425a8803a 100644\n--- a/drivers/net/mlx5/hws/mlx5dr.h\n+++ b/drivers/net/mlx5/hws/mlx5dr.h\n@@ -33,6 +33,7 @@ enum mlx5dr_action_type {\n \tMLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2,\n \tMLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2,\n \tMLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3,\n+\tMLX5DR_ACTION_TYP_REFORMAT_TRAILER,\n \tMLX5DR_ACTION_TYP_DROP,\n \tMLX5DR_ACTION_TYP_TIR,\n \tMLX5DR_ACTION_TYP_TBL,\n@@ -195,6 +196,21 @@ struct mlx5dr_action_crypto_attr {\n \tenum mlx5dr_action_crypto_op op;\n };\n \n+enum mlx5dr_action_trailer_type {\n+\tMLX5DR_ACTION_TRAILER_TYPE_IPSEC,\n+};\n+\n+enum mlx5dr_action_trailer_op {\n+\tMLX5DR_ACTION_TRAILER_OP_INSERT,\n+\tMLX5DR_ACTION_TRAILER_OP_REMOVE,\n+};\n+\n+struct mlx5dr_action_trailer_attr {\n+\tenum mlx5dr_action_trailer_type type;\n+\tenum mlx5dr_action_trailer_op op;\n+\tuint8_t size;\n+};\n+\n /* In actions that take offset, the offset is unique, pointing to a single\n * resource and the user should not reuse the same index because data changing\n * is not atomic.\n@@ -607,6 +623,22 @@ mlx5dr_action_create_reformat(struct mlx5dr_context *ctx,\n \t\t\t uint32_t log_bulk_size,\n \t\t\t uint32_t flags);\n \n+/* Create reformat trailer action.\n+ *\n+ * @param[in] ctx\n+ *\tThe context in which the new action will be created.\n+ * @param[in] attr\n+ *\tattributes: specifies if to insert/remove trailer,\n+ *\talso specifies the trailer type and size in bytes.\n+ * @param[in] flags\n+ *\tAction creation flags. (enum mlx5dr_action_flags)\n+ * @return pointer to mlx5dr_action on success NULL otherwise.\n+ */\n+struct mlx5dr_action *\n+mlx5dr_action_create_reformat_trailer(struct mlx5dr_context *ctx,\n+\t\t\t\t struct mlx5dr_action_trailer_attr *attr,\n+\t\t\t\t uint32_t flags);\n+\n /* Create direct rule modify header action.\n *\n * @param[in] ctx\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c\nindex 956909a628..f8de3d8d98 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_action.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_action.c\n@@ -9,16 +9,17 @@\n #define MLX5DR_ACTION_METER_INIT_COLOR_OFFSET 1\n \n /* This is the maximum allowed action order for each table type:\n- *\t TX: POP_VLAN, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, ENCRYPT,\n+ *\t TX: POP_VLAN, CTR, ASO, PUSH_VLAN, MODIFY, ENCAP, TRAILER, ENCRYPT,\n *\t Term\n- *\t RX: TAG, DECAP, POP_VLAN, CTR, DECRYPT, ASO, PUSH_VLAN,\n+ *\t RX: TAG, TRAILER, DECAP, POP_VLAN, CTR, DECRYPT, ASO, PUSH_VLAN,\n *\t MODIFY, ENCAP, Term\n- *\tFDB: DECAP, POP_VLAN, CTR, DECRYPT, ASO, PUSH_VLAN, MODIFY,\n+ *\tFDB: TRAILER, DECAP, POP_VLAN, CTR, DECRYPT, ASO, PUSH_VLAN, MODIFY,\n *\t ENCAP, ENCRYPT, Term\n */\n static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_MAX] = {\n \t[MLX5DR_TABLE_TYPE_NIC_RX] = {\n \t\tBIT(MLX5DR_ACTION_TYP_TAG),\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER),\n \t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |\n \t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),\n \t\tBIT(MLX5DR_ACTION_TYP_POP_VLAN),\n@@ -53,6 +54,7 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_\n \t\tBIT(MLX5DR_ACTION_TYP_MODIFY_HDR),\n \t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |\n \t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER),\n \t\tBIT(MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT),\n \t\tBIT(MLX5DR_ACTION_TYP_TBL) |\n \t\tBIT(MLX5DR_ACTION_TYP_MISS) |\n@@ -61,6 +63,7 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_\n \t\tBIT(MLX5DR_ACTION_TYP_LAST),\n \t},\n \t[MLX5DR_TABLE_TYPE_FDB] = {\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER),\n \t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L2_TO_L2) |\n \t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2),\n \t\tBIT(MLX5DR_ACTION_TYP_POP_VLAN),\n@@ -75,6 +78,7 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_\n \t\tBIT(MLX5DR_ACTION_TYP_MODIFY_HDR),\n \t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2) |\n \t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3),\n+\t\tBIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER),\n \t\tBIT(MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT),\n \t\tBIT(MLX5DR_ACTION_TYP_TBL) |\n \t\tBIT(MLX5DR_ACTION_TYP_MISS) |\n@@ -296,7 +300,8 @@ bool mlx5dr_action_check_restrictions(struct mlx5dr_matcher *matcher,\n \t\tbreak;\n \tdefault:\n \t\trestricted_bits = BIT(MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT) |\n-\t\t\t\t BIT(MLX5DR_ACTION_TYP_CRYPTO_DECRYPT);\n+\t\t\t\t BIT(MLX5DR_ACTION_TYP_CRYPTO_DECRYPT) |\n+\t\t\t\t BIT(MLX5DR_ACTION_TYP_REFORMAT_TRAILER);\n \t}\n \n \twhile (actions[idx] != MLX5DR_ACTION_TYP_LAST) {\n@@ -377,6 +382,7 @@ mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,\n \tstruct mlx5dr_devx_obj *devx_obj;\n \tbool use_fixup = false;\n \tuint32_t fw_tbl_type;\n+\tuint32_t val;\n \n \tfw_tbl_type = mlx5dr_table_get_res_fw_ft_type(table_type, is_mirror);\n \n@@ -444,6 +450,20 @@ mlx5dr_action_fixup_stc_attr(struct mlx5dr_context *ctx,\n \t\t}\n \t\tbreak;\n \n+\tcase MLX5_IFC_STC_ACTION_TYPE_TRAILER:\n+\t\tif (table_type != MLX5DR_TABLE_TYPE_FDB)\n+\t\t\tbreak;\n+\n+\t\tval = stc_attr->reformat_trailer.op;\n+\t\tif ((val == MLX5DR_ACTION_TRAILER_OP_INSERT && !is_mirror) ||\n+\t\t (val == MLX5DR_ACTION_TRAILER_OP_REMOVE && is_mirror)) {\n+\t\t\tfixup_stc_attr->action_type = MLX5_IFC_STC_ACTION_TYPE_NOP;\n+\t\t\tfixup_stc_attr->action_offset = stc_attr->action_offset;\n+\t\t\tfixup_stc_attr->stc_offset = stc_attr->stc_offset;\n+\t\t\tuse_fixup = true;\n+\t\t}\n+\t\tbreak;\n+\n \tdefault:\n \t\tbreak;\n \t}\n@@ -683,6 +703,13 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action,\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_DW5;\n \t\tattr->id = obj->id;\n \t\tbreak;\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TRAILER:\n+\t\tattr->action_type = MLX5_IFC_STC_ACTION_TYPE_TRAILER;\n+\t\tattr->action_offset = MLX5DR_ACTION_OFFSET_DW5;\n+\t\tattr->reformat_trailer.type = action->reformat_trailer.type;\n+\t\tattr->reformat_trailer.op = action->reformat_trailer.op;\n+\t\tattr->reformat_trailer.size = action->reformat_trailer.size;\n+\t\tbreak;\n \tdefault:\n \t\tDR_LOG(ERR, \"Invalid action type %d\", action->type);\n \t\tassert(false);\n@@ -2080,6 +2107,64 @@ mlx5dr_action_create_crypto(struct mlx5dr_context *ctx,\n \treturn action;\n }\n \n+struct mlx5dr_action *\n+mlx5dr_action_create_reformat_trailer(struct mlx5dr_context *ctx,\n+\t\t\t\t struct mlx5dr_action_trailer_attr *attr,\n+\t\t\t\t uint32_t flags)\n+{\n+\tstruct mlx5dr_action *action;\n+\n+\tif (mlx5dr_action_is_root_flags(flags)) {\n+\t\tDR_LOG(ERR, \"Action flags must be only non root (HWS)\");\n+\t\trte_errno = ENOTSUP;\n+\t\treturn NULL;\n+\t}\n+\n+\tif (attr->type != MLX5DR_ACTION_TRAILER_TYPE_IPSEC) {\n+\t\tDR_LOG(ERR, \"Only trailer of IPsec is supported\");\n+\t\trte_errno = ENOTSUP;\n+\t\treturn NULL;\n+\t}\n+\n+\tif (attr->op == MLX5DR_ACTION_TRAILER_OP_INSERT) {\n+\t\tif (flags & MLX5DR_ACTION_FLAG_HWS_RX) {\n+\t\t\tDR_LOG(ERR, \"Trailer insertion is not supported in Rx\");\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn NULL;\n+\t\t}\n+\t} else if (attr->op == MLX5DR_ACTION_TRAILER_OP_REMOVE) {\n+\t\tif (flags & MLX5DR_ACTION_FLAG_HWS_TX) {\n+\t\t\tDR_LOG(ERR, \"Trailer removal is not supported in Tx\");\n+\t\t\trte_errno = EINVAL;\n+\t\t\treturn NULL;\n+\t\t}\n+\t} else {\n+\t\trte_errno = ENOTSUP;\n+\t\treturn NULL;\n+\t}\n+\n+\tif (attr->size % DW_SIZE) {\n+\t\tDR_LOG(ERR, \"Wrong trailer size, size should divide by %u\", DW_SIZE);\n+\t\trte_errno = EINVAL;\n+\t\treturn NULL;\n+\t}\n+\n+\taction = mlx5dr_action_create_generic(ctx, flags, MLX5DR_ACTION_TYP_REFORMAT_TRAILER);\n+\tif (!action)\n+\t\treturn NULL;\n+\n+\taction->reformat_trailer.type = attr->type;\n+\taction->reformat_trailer.op = attr->op;\n+\taction->reformat_trailer.size = attr->size;\n+\n+\tif (mlx5dr_action_create_stcs(action, NULL)) {\n+\t\tsimple_free(action);\n+\t\treturn NULL;\n+\t}\n+\n+\treturn action;\n+}\n+\n static void mlx5dr_action_destroy_hws(struct mlx5dr_action *action)\n {\n \tstruct mlx5dr_devx_obj *obj = NULL;\n@@ -2103,6 +2188,7 @@ static void mlx5dr_action_destroy_hws(struct mlx5dr_action *action)\n \tcase MLX5DR_ACTION_TYP_PUSH_VLAN:\n \tcase MLX5DR_ACTION_TYP_CRYPTO_ENCRYPT:\n \tcase MLX5DR_ACTION_TYP_CRYPTO_DECRYPT:\n+\tcase MLX5DR_ACTION_TYP_REFORMAT_TRAILER:\n \t\tmlx5dr_action_destroy_stcs(action);\n \t\tbreak;\n \tcase MLX5DR_ACTION_TYP_DEST_ROOT:\n@@ -2631,6 +2717,18 @@ mlx5dr_action_setter_crypto_decryption(struct mlx5dr_actions_apply_data *apply,\n \tapply->wqe_data[MLX5DR_ACTION_OFFSET_DW7] = 0;\n }\n \n+static void\n+mlx5dr_action_setter_reformat_trailer(struct mlx5dr_actions_apply_data *apply,\n+\t\t\t\t struct mlx5dr_actions_wqe_setter *setter)\n+{\n+\tmlx5dr_action_apply_stc(apply, MLX5DR_ACTION_STC_IDX_DW5, setter->idx_triple);\n+\tapply->wqe_ctrl->stc_ix[MLX5DR_ACTION_STC_IDX_DW6] = 0;\n+\tapply->wqe_ctrl->stc_ix[MLX5DR_ACTION_STC_IDX_DW7] = 0;\n+\tapply->wqe_data[MLX5DR_ACTION_OFFSET_DW5] = 0;\n+\tapply->wqe_data[MLX5DR_ACTION_OFFSET_DW6] = 0;\n+\tapply->wqe_data[MLX5DR_ACTION_OFFSET_DW7] = 0;\n+}\n+\n int mlx5dr_action_template_process(struct mlx5dr_action_template *at)\n {\n \tstruct mlx5dr_actions_wqe_setter *start_setter = at->setters + 1;\n@@ -2782,6 +2880,14 @@ int mlx5dr_action_template_process(struct mlx5dr_action_template *at)\n \t\t\tsetter->idx_triple = i;\n \t\t\tbreak;\n \n+\t\tcase MLX5DR_ACTION_TYP_REFORMAT_TRAILER:\n+\t\t\t/* Single push trailer, consume triple due to HW limitations */\n+\t\t\tsetter = mlx5dr_action_setter_find_first(last_setter, ASF_TRIPLE);\n+\t\t\tsetter->flags |= ASF_TRIPLE;\n+\t\t\tsetter->set_triple = &mlx5dr_action_setter_reformat_trailer;\n+\t\t\tsetter->idx_triple = i;\n+\t\t\tbreak;\n+\n \t\tdefault:\n \t\t\tDR_LOG(ERR, \"Unsupported action type: %d\", action_type[i]);\n \t\t\trte_errno = ENOTSUP;\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_action.h b/drivers/net/mlx5/hws/mlx5dr_action.h\nindex 6bfa0bcc4a..b64d6cc9a8 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_action.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_action.h\n@@ -153,6 +153,11 @@ struct mlx5dr_action {\n \t\t\t\tstruct {\n \t\t\t\t\tstruct mlx5dv_steering_anchor *sa;\n \t\t\t\t} root_tbl;\n+\t\t\t\tstruct {\n+\t\t\t\t\tuint8_t type;\n+\t\t\t\t\tuint8_t op;\n+\t\t\t\t\tuint8_t size;\n+\t\t\t\t} reformat_trailer;\n \t\t\t\tstruct {\n \t\t\t\t\tstruct mlx5dr_devx_obj *devx_obj;\n \t\t\t\t} devx_dest;\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c\nindex 3b3690699d..02547e7178 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c\n@@ -549,6 +549,14 @@ mlx5dr_cmd_stc_modify_set_stc_param(struct mlx5dr_cmd_stc_modify_attr *stc_attr,\n \t\tMLX5_SET(stc_ste_param_ipsec_decrypt, stc_parm, ipsec_object_id,\n \t\t\t stc_attr->id);\n \t\tbreak;\n+\tcase MLX5_IFC_STC_ACTION_TYPE_TRAILER:\n+\t\tMLX5_SET(stc_ste_param_trailer, stc_parm, command,\n+\t\t\t stc_attr->reformat_trailer.op);\n+\t\tMLX5_SET(stc_ste_param_trailer, stc_parm, type,\n+\t\t\t stc_attr->reformat_trailer.type);\n+\t\tMLX5_SET(stc_ste_param_trailer, stc_parm, length,\n+\t\t\t stc_attr->reformat_trailer.size);\n+\t\tbreak;\n \tdefault:\n \t\tDR_LOG(ERR, \"Not supported type %d\", stc_attr->action_type);\n \t\trte_errno = EINVAL;\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h\nindex 7bbb684dbd..c082157538 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h\n@@ -141,6 +141,11 @@ struct mlx5dr_cmd_stc_modify_attr {\n \t\t\tuint16_t start_anchor;\n \t\t\tuint16_t num_of_words;\n \t\t} remove_words;\n+\t\tstruct {\n+\t\t\tuint8_t type;\n+\t\t\tuint8_t op;\n+\t\t\tuint8_t size;\n+\t\t} reformat_trailer;\n \n \t\tuint32_t dest_table_id;\n \t\tuint32_t dest_tir_num;\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_debug.c b/drivers/net/mlx5/hws/mlx5dr_debug.c\nindex 74893f61fb..976a1993e3 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_debug.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_debug.c\n@@ -10,6 +10,7 @@ const char *mlx5dr_debug_action_type_str[] = {\n \t[MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2] = \"L2_TO_TNL_L2\",\n \t[MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2] = \"TNL_L3_TO_L2\",\n \t[MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3] = \"L2_TO_TNL_L3\",\n+\t[MLX5DR_ACTION_TYP_REFORMAT_TRAILER] = \"REFORMAT_TRAILER\",\n \t[MLX5DR_ACTION_TYP_DROP] = \"DROP\",\n \t[MLX5DR_ACTION_TYP_TIR] = \"TIR\",\n \t[MLX5DR_ACTION_TYP_TBL] = \"TBL\",\n", "prefixes": [ "18/30" ] }