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GET /api/patches/133379/?format=api
{ "id": 133379, "url": "http://patches.dpdk.org/api/patches/133379/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/2b4e2e189aed1dba8de03742b752267f9e9ad973.1698307299.git.gmuthukrishn@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<2b4e2e189aed1dba8de03742b752267f9e9ad973.1698307299.git.gmuthukrishn@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/2b4e2e189aed1dba8de03742b752267f9e9ad973.1698307299.git.gmuthukrishn@marvell.com", "date": "2023-10-26T08:15:10", "name": "[v1,2/4] crypto/cnxk: use generic EC opcodes", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "8e9fb94caddd002e2bc767e191f75b59d701d096", "submitter": { "id": 2301, "url": "http://patches.dpdk.org/api/people/2301/?format=api", "name": "Gowrishankar Muthukrishnan", "email": "gmuthukrishn@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/2b4e2e189aed1dba8de03742b752267f9e9ad973.1698307299.git.gmuthukrishn@marvell.com/mbox/", "series": [ { "id": 29995, "url": "http://patches.dpdk.org/api/series/29995/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29995", "date": "2023-10-26T08:15:08", "name": "test/cryptodev: add ECDH tests", "version": 1, "mbox": "http://patches.dpdk.org/series/29995/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/133379/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/133379/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 732F343206;\n\tThu, 26 Oct 2023 10:15:41 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3B23842DFF;\n\tThu, 26 Oct 2023 10:15:28 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id DB4F342DEA\n for <dev@dpdk.org>; Thu, 26 Oct 2023 10:15:26 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 39Q71eTW017512; Thu, 26 Oct 2023 01:15:26 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3txcsr1b2k-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT);\n Thu, 26 Oct 2023 01:15:26 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Thu, 26 Oct 2023 01:15:24 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Thu, 26 Oct 2023 01:15:24 -0700", "from BG-LT91401.marvell.com (BG-LT91401.marvell.com [10.28.168.34])\n by maili.marvell.com (Postfix) with ESMTP id 54F9F3F704D;\n Thu, 26 Oct 2023 01:15:22 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=K9O3M69nniP7/08w3X/Vdcm017LL5whMYKdZU+bQsgU=;\n b=k+e8n6nN/xH8/P3wUxsUBKWrr3VyDTfQO6WlvERWYQ2ToGK/OpWgtYlHefoNAkAKmYDC\n EvxRgs5tIQHqsLg0xgW7ihlUysLdVV9skl0qpSTfYOruEzJScX178PDxaBeb/E7+TJCa\n JjivfWgPQV3fl7J906Zn6m7HRmDbbrCr4kaZcCDO4YDz3NZ0d20ap1vTbnIfzz+IhBhp\n CFxFxcH/pC2Y8ZvUI4dbS9fmL+OAfbkNRXKq94lX3WjC+aqxA0QDTJWfTrwoqS2Yq9Qs\n aInHWdkSPUtTK+qVpOsh9YerI0zNcgDZQMIaYWqdTjuRxkOufqij1UOjyKoQv86FVYlA 8g==", "From": "Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>", "To": "<dev@dpdk.org>", "CC": "<anoobj@marvell.com>, Akhil Goyal <gakhil@marvell.com>, Fan Zhang\n <fanzhang.oss@gmail.com>, Gowrishankar Muthukrishnan\n <gmuthukrishn@marvell.com>", "Subject": "[PATCH v1 2/4] crypto/cnxk: use generic EC opcodes", "Date": "Thu, 26 Oct 2023 13:45:10 +0530", "Message-ID": "\n <2b4e2e189aed1dba8de03742b752267f9e9ad973.1698307299.git.gmuthukrishn@marvell.com>", "X-Mailer": "git-send-email 2.21.0", "In-Reply-To": "<cover.1698307299.git.gmuthukrishn@marvell.com>", "References": "<cover.1698307299.git.gmuthukrishn@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "swpvs9yUKJSMp1eup4I7_-fy6kFwy_8b", "X-Proofpoint-GUID": "swpvs9yUKJSMp1eup4I7_-fy6kFwy_8b", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.272,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2023-10-26_05,2023-10-25_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Use generic EC opcodes for sign and verify ops in ECDSA and SM2\nimplementations.\n\nSigned-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>\n---\n drivers/common/cnxk/roc_ae.h | 14 +++++++---\n drivers/crypto/cnxk/cnxk_ae.h | 50 +++++++++++++++++++----------------\n 2 files changed, 38 insertions(+), 26 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_ae.h b/drivers/common/cnxk/roc_ae.h\nindex d459c5e680..eaf12ab254 100644\n--- a/drivers/common/cnxk/roc_ae.h\n+++ b/drivers/common/cnxk/roc_ae.h\n@@ -5,9 +5,11 @@\n #ifndef __ROC_AE_H__\n #define __ROC_AE_H__\n \n+#include \"roc_platform.h\"\n+\n /* AE opcodes */\n #define ROC_AE_MAJOR_OP_MODEX\t 0x03\n-#define ROC_AE_MAJOR_OP_ECDSA\t 0x04\n+#define ROC_AE_MAJOR_OP_EC\t 0x04\n #define ROC_AE_MAJOR_OP_ECC\t 0x05\n #define ROC_AE_MINOR_OP_MODEX\t 0x01\n #define ROC_AE_MINOR_OP_PKCS_ENC 0x02\n@@ -15,8 +17,8 @@\n #define ROC_AE_MINOR_OP_PKCS_DEC 0x04\n #define ROC_AE_MINOR_OP_PKCS_DEC_CRT 0x05\n #define ROC_AE_MINOR_OP_MODEX_CRT 0x06\n-#define ROC_AE_MINOR_OP_ECDSA_SIGN 0x01\n-#define ROC_AE_MINOR_OP_ECDSA_VERIFY 0x02\n+#define ROC_AE_MINOR_OP_EC_SIGN 0x01\n+#define ROC_AE_MINOR_OP_EC_VERIFY 0x02\n #define ROC_AE_MINOR_OP_ECC_UMP\t 0x03\n #define ROC_AE_MINOR_OP_ECC_FPM\t 0x04\n \n@@ -38,6 +40,12 @@ typedef enum {\n \tROC_AE_EC_ID_PMAX\n } roc_ae_ec_id;\n \n+/* EC param1 fields */\n+#define ROC_AE_EC_PARAM1_ECDSA (0 << 7)\n+#define ROC_AE_EC_PARAM1_SM2 (1 << 7)\n+#define ROC_AE_EC_PARAM1_NIST (0 << 6)\n+#define ROC_AE_EC_PARAM1_NONNIST (1 << 6)\n+\n /* Prime and order fields of built-in elliptic curves */\n struct roc_ae_ec_group {\n \tstruct {\ndiff --git a/drivers/crypto/cnxk/cnxk_ae.h b/drivers/crypto/cnxk/cnxk_ae.h\nindex 09468d58b0..6e61ccb0c5 100644\n--- a/drivers/crypto/cnxk/cnxk_ae.h\n+++ b/drivers/crypto/cnxk/cnxk_ae.h\n@@ -588,8 +588,8 @@ cnxk_ae_ecdsa_sign_prep(struct rte_crypto_ecdsa_op_param *ecdsa,\n \tdptr += p_align;\n \n \t/* Setup opcodes */\n-\tw4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;\n-\tw4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_SIGN;\n+\tw4.s.opcode_major = ROC_AE_MAJOR_OP_EC;\n+\tw4.s.opcode_minor = ROC_AE_MINOR_OP_EC_SIGN;\n \n \tw4.s.param1 = curveid | (message_len << 8);\n \tw4.s.param2 = (p_align << 8) | k_len;\n@@ -683,8 +683,8 @@ cnxk_ae_ecdsa_verify_prep(struct rte_crypto_ecdsa_op_param *ecdsa,\n \tdptr += p_align;\n \n \t/* Setup opcodes */\n-\tw4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;\n-\tw4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_VERIFY;\n+\tw4.s.opcode_major = ROC_AE_MAJOR_OP_EC;\n+\tw4.s.opcode_minor = ROC_AE_MINOR_OP_EC_VERIFY;\n \n \tw4.s.param1 = curveid | (message_len << 8);\n \tw4.s.param2 = 0;\n@@ -719,9 +719,9 @@ cnxk_ae_enqueue_ecdsa_op(struct rte_crypto_op *op,\n \n static __rte_always_inline void\n cnxk_ae_sm2_sign_prep(struct rte_crypto_sm2_op_param *sm2,\n-\t\t\t struct roc_ae_buf_ptr *meta_buf,\n-\t\t\t uint64_t fpm_table_iova, struct roc_ae_ec_group *ec_grp,\n-\t\t\t struct cnxk_ae_sess *sess, struct cpt_inst_s *inst)\n+\t\t\tstruct roc_ae_buf_ptr *meta_buf,\n+\t\t\tuint64_t fpm_table_iova, struct roc_ae_ec_group *ec_grp,\n+\t\t\tstruct cnxk_ae_sess *sess, struct cpt_inst_s *inst)\n {\n \tuint16_t message_len = sm2->message.length;\n \tuint16_t pkey_len = sess->ec_ctx.pkey.length;\n@@ -787,10 +787,12 @@ cnxk_ae_sm2_sign_prep(struct rte_crypto_sm2_op_param *sm2,\n \tdptr += p_align;\n \n \t/* Setup opcodes */\n-\tw4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;\n-\tw4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_SIGN;\n+\tw4.s.opcode_major = ROC_AE_MAJOR_OP_EC;\n+\tw4.s.opcode_minor = ROC_AE_MINOR_OP_EC_SIGN;\n \n-\tw4.s.param1 = 2 | 1 << 7 | 1 << 6 | (message_len << 8);\n+\t/* prime length of SM2 curve is same as that of P256. */\n+\tw4.s.param1 = ROC_AE_EC_ID_P256 |\n+\t\tROC_AE_EC_PARAM1_SM2 | ROC_AE_EC_PARAM1_NONNIST | (message_len << 8);\n \tw4.s.param2 = (p_align << 8) | k_len;\n \tw4.s.dlen = dlen;\n \n@@ -800,10 +802,10 @@ cnxk_ae_sm2_sign_prep(struct rte_crypto_sm2_op_param *sm2,\n \n static __rte_always_inline void\n cnxk_ae_sm2_verify_prep(struct rte_crypto_sm2_op_param *sm2,\n-\t\t\t struct roc_ae_buf_ptr *meta_buf,\n-\t\t\t uint64_t fpm_table_iova,\n-\t\t\t struct roc_ae_ec_group *ec_grp, struct cnxk_ae_sess *sess,\n-\t\t\t struct cpt_inst_s *inst)\n+\t\t\t struct roc_ae_buf_ptr *meta_buf,\n+\t\t\t uint64_t fpm_table_iova,\n+\t\t\t struct roc_ae_ec_group *ec_grp, struct cnxk_ae_sess *sess,\n+\t\t\t struct cpt_inst_s *inst)\n {\n \tuint32_t message_len = sm2->message.length;\n \tuint16_t o_offset, r_offset, s_offset;\n@@ -881,10 +883,12 @@ cnxk_ae_sm2_verify_prep(struct rte_crypto_sm2_op_param *sm2,\n \tdptr += p_align;\n \n \t/* Setup opcodes */\n-\tw4.s.opcode_major = ROC_AE_MAJOR_OP_ECDSA;\n-\tw4.s.opcode_minor = ROC_AE_MINOR_OP_ECDSA_VERIFY;\n+\tw4.s.opcode_major = ROC_AE_MAJOR_OP_EC;\n+\tw4.s.opcode_minor = ROC_AE_MINOR_OP_EC_VERIFY;\n \n-\tw4.s.param1 = 2 | 1 << 7 | 1 << 6 | (message_len << 8);\n+\t/* prime length of SM2 curve is same as that of P256. */\n+\tw4.s.param1 = ROC_AE_EC_ID_P256 |\n+\t\tROC_AE_EC_PARAM1_SM2 | ROC_AE_EC_PARAM1_NONNIST | (message_len << 8);\n \tw4.s.param2 = 0;\n \tw4.s.dlen = dlen;\n \n@@ -894,20 +898,20 @@ cnxk_ae_sm2_verify_prep(struct rte_crypto_sm2_op_param *sm2,\n \n static __rte_always_inline int __rte_hot\n cnxk_ae_enqueue_sm2_op(struct rte_crypto_op *op,\n-\t\t\t\t\t struct roc_ae_buf_ptr *meta_buf,\n-\t\t\t\t\t struct cnxk_ae_sess *sess, uint64_t *fpm_iova,\n-\t\t\t\t\t struct roc_ae_ec_group **ec_grp,\n-\t\t\t\t\t struct cpt_inst_s *inst)\n+\t\t\t struct roc_ae_buf_ptr *meta_buf,\n+\t\t\t struct cnxk_ae_sess *sess, uint64_t *fpm_iova,\n+\t\t\t struct roc_ae_ec_group **ec_grp,\n+\t\t\t struct cpt_inst_s *inst)\n {\n \tstruct rte_crypto_sm2_op_param *sm2 = &op->asym->sm2;\n \tuint8_t curveid = sess->ec_ctx.curveid;\n \n \tif (sm2->op_type == RTE_CRYPTO_ASYM_OP_SIGN)\n \t\tcnxk_ae_sm2_sign_prep(sm2, meta_buf, fpm_iova[curveid],\n-\t\t\t\t\t\t\t ec_grp[curveid], sess, inst);\n+\t\t\t\t\tec_grp[curveid], sess, inst);\n \telse if (sm2->op_type == RTE_CRYPTO_ASYM_OP_VERIFY)\n \t\tcnxk_ae_sm2_verify_prep(sm2, meta_buf, fpm_iova[curveid],\n-\t\t\t\t\t\t\t\tec_grp[curveid], sess, inst);\n+\t\t\t\t\t ec_grp[curveid], sess, inst);\n \telse {\n \t\top->status = RTE_CRYPTO_OP_STATUS_INVALID_ARGS;\n \t\treturn -EINVAL;\n", "prefixes": [ "v1", "2/4" ] }