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GET /api/patches/133297/?format=api
{ "id": 133297, "url": "http://patches.dpdk.org/api/patches/133297/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231025112232.201606-5-getelson@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231025112232.201606-5-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231025112232.201606-5-getelson@nvidia.com", "date": "2023-10-25T11:22:25", "name": "[v6,04/10] net/mlx5/hws: add support for mirroring", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0f79162a2fb53de25e44697d6146144d6af49134", "submitter": { "id": 1882, "url": "http://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231025112232.201606-5-getelson@nvidia.com/mbox/", "series": [ { "id": 29979, "url": "http://patches.dpdk.org/api/series/29979/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29979", "date": "2023-10-25T11:22:21", "name": "net/mlx5: support indirect actions list", "version": 6, "mbox": "http://patches.dpdk.org/series/29979/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/133297/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/133297/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 12B36431FB;\n\tWed, 25 Oct 2023 13:23:35 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id B3DE242686;\n\tWed, 25 Oct 2023 13:23:18 +0200 (CEST)", "from NAM10-BN7-obe.outbound.protection.outlook.com\n (mail-bn7nam10on2076.outbound.protection.outlook.com [40.107.92.76])\n by mails.dpdk.org (Postfix) with ESMTP id 2297C41157\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<getelson@nvidia.com>, =?utf-8?b?wqA=?= <mkashani@nvidia.com>,\n <rasland@nvidia.com>, Shun Hao <shunh@nvidia.com>,\n Alex Vesker <valex@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>,\n Matan Azrad <matan@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>", "Subject": "[PATCH v6 04/10] net/mlx5/hws: add support for mirroring", "Date": "Wed, 25 Oct 2023 14:22:25 +0300", "Message-ID": "<20231025112232.201606-5-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20231025112232.201606-1-getelson@nvidia.com>", "References": "<20231017080928.30454-1-getelson@nvidia.com>\n <20231025112232.201606-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "BL02EPF0001A101:EE_|IA0PR12MB7751:EE_", "X-MS-Office365-Filtering-Correlation-Id": "f2d13726-b78d-45ae-0305-08dbd54cc7a5", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 1AuPQoRdYP94ZS6IA8mbemG4bigBjEQCCumy98Z8DMTIvBDCTaX6rHazB81VuKkYZhweuGLoSuiV0oYz+dgqxBxsE29CiHr46R7vruBOYGvUGNLm4IBo8m6VMl7MEZtamxBo3X2cwSYOkZ8nCyLih5SbIa8xGSTpLRzXgepxxJdRCNPhFZX6N3WjLyC3nIQHwNCAv1X45g3Uvi1LtVckYj+dU48mLAZqMnrZ/2Ik8r8iNqFf90tatjhaP7dhra+GgbhdpdXOydb9FKzJYrd6jbrIuDTEQ+Cuj7cDG38MuWtPUUMU6NOhe7q5VoygVik6cqkw9vIWzvVUt6BYMBJo2A63jzaF2H/y45ZlF5ThNcHiUAMgHl894bW0bG/a8qpVfeKygb4cB0gFPtgfySFBdcouekM5ZCDJrqTgzYvR8R/uDS5KBj9Lnc0GmjjWjSl6+L/72bt4LJ/MYkV0vAC4Qfv3e+nxSW7H+GeEH7MY1dDK0nYH8eJwvN4ivG+TZJh1QMdJz0pSOm7iOjfDYjtiaPhbfx2aeqBx6Y2ZU9i7x1l9apnctYy/yq2MmFxcUo6GA2wfYxnSbjj7ZG090l2BDWxo8bYeJ/CYSCuuwo+7Ximfv54is5oY8uzXz0hjCUBRtweKem+WOODY7CdB5pt4m+uBRygwQOW/rH+GJW3yUpcW5fQYdyhkC1Ah5xB53MzYiUdtyQAiPOYePPnLnwCTPscypb7kHi3fFQnmQ4zudKbKgAT5UeyVMdWcoywIaiTg", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; 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Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n BL02EPF0001A101.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "IA0PR12MB7751", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Shun Hao <shunh@nvidia.com>\n\nThis patch supports mirroring by adding an dest_array action. The action\naccecpts a list containing multiple destination actions, and can duplicate\npacket and forward to each destination in the list.\n\nSigned-off-by: Shun Hao <shunh@nvidia.com>\nAcked-by: Alex Vesker <valex@nvidia.com>\nAcked-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/common/mlx5/mlx5_prm.h | 23 ++++-\n drivers/net/mlx5/hws/mlx5dr.h | 34 +++++++\n drivers/net/mlx5/hws/mlx5dr_action.c | 130 ++++++++++++++++++++++++++-\n drivers/net/mlx5/hws/mlx5dr_action.h | 3 +\n drivers/net/mlx5/hws/mlx5dr_cmd.c | 64 ++++++++++---\n drivers/net/mlx5/hws/mlx5dr_cmd.h | 21 ++++-\n drivers/net/mlx5/hws/mlx5dr_debug.c | 1 +\n drivers/net/mlx5/hws/mlx5dr_table.c | 7 +-\n 8 files changed, 262 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/common/mlx5/mlx5_prm.h b/drivers/common/mlx5/mlx5_prm.h\nindex df621b19af..aa0b622ca2 100644\n--- a/drivers/common/mlx5/mlx5_prm.h\n+++ b/drivers/common/mlx5/mlx5_prm.h\n@@ -2320,7 +2320,11 @@ struct mlx5_ifc_cmd_hca_cap_2_bits {\n };\n \n struct mlx5_ifc_esw_cap_bits {\n-\tu8 reserved_at_0[0x60];\n+\tu8 reserved_at_0[0x1d];\n+\tu8 merged_eswitch[0x1];\n+\tu8 reserved_at_1e[0x2];\n+\n+\tu8 reserved_at_20[0x40];\n \n \tu8 esw_manager_vport_number_valid[0x1];\n \tu8 reserved_at_61[0xf];\n@@ -5045,6 +5049,7 @@ struct mlx5_ifc_query_flow_table_out_bits {\n enum mlx5_flow_destination_type {\n \tMLX5_FLOW_DESTINATION_TYPE_VPORT = 0x0,\n \tMLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE = 0x1,\n+\tMLX5_FLOW_DESTINATION_TYPE_TIR = 0x2,\n };\n \n enum mlx5_flow_context_action {\n@@ -5088,6 +5093,19 @@ union mlx5_ifc_dest_format_flow_counter_list_auto_bits {\n \tu8 reserved_at_0[0x40];\n };\n \n+struct mlx5_ifc_extended_dest_format_bits {\n+\tstruct mlx5_ifc_dest_format_bits destination_entry;\n+\n+\tu8 packet_reformat_id[0x20];\n+\n+\tu8 reserved_at_60[0x20];\n+};\n+\n+#define MLX5_IFC_MULTI_PATH_FT_MAX_LEVEL 64\n+\n+#ifdef PEDANTIC\n+#pragma GCC diagnostic ignored \"-Wpedantic\"\n+#endif\n struct mlx5_ifc_flow_context_bits {\n \tu8 reserved_at_00[0x20];\n \tu8 group_id[0x20];\n@@ -5106,8 +5124,7 @@ struct mlx5_ifc_flow_context_bits {\n \tu8 reserved_at_e0[0x40];\n \tu8 encrypt_decrypt_obj_id[0x20];\n \tu8 reserved_at_140[0x16c0];\n-\t/* Currently only one destnation */\n-\tunion mlx5_ifc_dest_format_flow_counter_list_auto_bits destination[1];\n+\tunion mlx5_ifc_dest_format_flow_counter_list_auto_bits destination[0];\n };\n \n struct mlx5_ifc_set_fte_in_bits {\ndiff --git a/drivers/net/mlx5/hws/mlx5dr.h b/drivers/net/mlx5/hws/mlx5dr.h\nindex ea8bf683f3..1995c55132 100644\n--- a/drivers/net/mlx5/hws/mlx5dr.h\n+++ b/drivers/net/mlx5/hws/mlx5dr.h\n@@ -46,6 +46,7 @@ enum mlx5dr_action_type {\n \tMLX5DR_ACTION_TYP_ASO_METER,\n \tMLX5DR_ACTION_TYP_ASO_CT,\n \tMLX5DR_ACTION_TYP_DEST_ROOT,\n+\tMLX5DR_ACTION_TYP_DEST_ARRAY,\n \tMLX5DR_ACTION_TYP_MAX,\n };\n \n@@ -213,6 +214,20 @@ struct mlx5dr_rule_action {\n \t};\n };\n \n+struct mlx5dr_action_dest_attr {\n+\t/* Required action combination */\n+\tenum mlx5dr_action_type *action_type;\n+\n+\t/* Required destination action to forward the packet */\n+\tstruct mlx5dr_action *dest;\n+\n+\t/* Optional reformat data */\n+\tstruct {\n+\t\tsize_t reformat_data_sz;\n+\t\tvoid *reformat_data;\n+\t} reformat;\n+};\n+\n /* Open a context used for direct rule insertion using hardware steering.\n * Each context can contain multiple tables of different types.\n *\n@@ -616,6 +631,25 @@ mlx5dr_action_create_pop_vlan(struct mlx5dr_context *ctx, uint32_t flags);\n struct mlx5dr_action *\n mlx5dr_action_create_push_vlan(struct mlx5dr_context *ctx, uint32_t flags);\n \n+/* Create a dest array action, this action can duplicate packets and forward to\n+ * multiple destinations in the destination list.\n+ * @param[in] ctx\n+ * The context in which the new action will be created.\n+ * @param[in] num_dest\n+ * The number of dests attributes.\n+ * @param[in] dests\n+ * The destination array. Each contains a destination action and can have\n+ * additional actions.\n+ * @param[in] flags\n+ * Action creation flags. (enum mlx5dr_action_flags)\n+ * @return pointer to mlx5dr_action on success NULL otherwise.\n+ */\n+struct mlx5dr_action *\n+mlx5dr_action_create_dest_array(struct mlx5dr_context *ctx,\n+\t\t\t\tsize_t num_dest,\n+\t\t\t\tstruct mlx5dr_action_dest_attr *dests,\n+\t\t\t\tuint32_t flags);\n+\n /* Create dest root table, this action will jump to root table according\n * the given priority.\n * @param[in] ctx\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_action.c b/drivers/net/mlx5/hws/mlx5dr_action.c\nindex 55ec4f71c9..f068bc7e9c 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_action.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_action.c\n@@ -34,7 +34,8 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_\n \t\tBIT(MLX5DR_ACTION_TYP_MISS) |\n \t\tBIT(MLX5DR_ACTION_TYP_TIR) |\n \t\tBIT(MLX5DR_ACTION_TYP_DROP) |\n-\t\tBIT(MLX5DR_ACTION_TYP_DEST_ROOT),\n+\t\tBIT(MLX5DR_ACTION_TYP_DEST_ROOT) |\n+\t\tBIT(MLX5DR_ACTION_TYP_DEST_ARRAY),\n \t\tBIT(MLX5DR_ACTION_TYP_LAST),\n \t},\n \t[MLX5DR_TABLE_TYPE_NIC_TX] = {\n@@ -71,7 +72,8 @@ static const uint32_t action_order_arr[MLX5DR_TABLE_TYPE_MAX][MLX5DR_ACTION_TYP_\n \t\tBIT(MLX5DR_ACTION_TYP_MISS) |\n \t\tBIT(MLX5DR_ACTION_TYP_VPORT) |\n \t\tBIT(MLX5DR_ACTION_TYP_DROP) |\n-\t\tBIT(MLX5DR_ACTION_TYP_DEST_ROOT),\n+\t\tBIT(MLX5DR_ACTION_TYP_DEST_ROOT) |\n+\t\tBIT(MLX5DR_ACTION_TYP_DEST_ARRAY),\n \t\tBIT(MLX5DR_ACTION_TYP_LAST),\n \t},\n };\n@@ -535,6 +537,7 @@ static void mlx5dr_action_fill_stc_attr(struct mlx5dr_action *action,\n \t\t}\n \t\tbreak;\n \tcase MLX5DR_ACTION_TYP_TBL:\n+\tcase MLX5DR_ACTION_TYP_DEST_ARRAY:\n \t\tattr->action_type = MLX5_IFC_STC_ACTION_TYPE_JUMP_TO_FT;\n \t\tattr->action_offset = MLX5DR_ACTION_OFFSET_HIT;\n \t\tattr->dest_table_id = obj->id;\n@@ -1700,6 +1703,124 @@ mlx5dr_action_create_modify_header(struct mlx5dr_context *ctx,\n \treturn NULL;\n }\n \n+struct mlx5dr_action *\n+mlx5dr_action_create_dest_array(struct mlx5dr_context *ctx,\n+\t\t\t\tsize_t num_dest,\n+\t\t\t\tstruct mlx5dr_action_dest_attr *dests,\n+\t\t\t\tuint32_t flags)\n+{\n+\tstruct mlx5dr_cmd_set_fte_dest *dest_list = NULL;\n+\tstruct mlx5dr_cmd_ft_create_attr ft_attr = {0};\n+\tstruct mlx5dr_cmd_set_fte_attr fte_attr = {0};\n+\tstruct mlx5dr_cmd_forward_tbl *fw_island;\n+\tenum mlx5dr_table_type table_type;\n+\tstruct mlx5dr_action *action;\n+\tuint32_t i;\n+\tint ret;\n+\n+\tif (num_dest <= 1) {\n+\t\trte_errno = EINVAL;\n+\t\tDR_LOG(ERR, \"Action must have multiple dests\");\n+\t\treturn NULL;\n+\t}\n+\n+\tif (flags == (MLX5DR_ACTION_FLAG_HWS_RX | MLX5DR_ACTION_FLAG_SHARED)) {\n+\t\tft_attr.type = FS_FT_NIC_RX;\n+\t\tft_attr.level = MLX5_IFC_MULTI_PATH_FT_MAX_LEVEL - 1;\n+\t\ttable_type = MLX5DR_TABLE_TYPE_NIC_RX;\n+\t} else if (flags == (MLX5DR_ACTION_FLAG_HWS_FDB | MLX5DR_ACTION_FLAG_SHARED)) {\n+\t\tft_attr.type = FS_FT_FDB;\n+\t\tft_attr.level = ctx->caps->fdb_ft.max_level - 1;\n+\t\ttable_type = MLX5DR_TABLE_TYPE_FDB;\n+\t} else {\n+\t\tDR_LOG(ERR, \"Action flags not supported\");\n+\t\trte_errno = ENOTSUP;\n+\t\treturn NULL;\n+\t}\n+\n+\tif (mlx5dr_context_shared_gvmi_used(ctx)) {\n+\t\tDR_LOG(ERR, \"Cannot use this action in shared GVMI context\");\n+\t\trte_errno = ENOTSUP;\n+\t\treturn NULL;\n+\t}\n+\n+\tdest_list = simple_calloc(num_dest, sizeof(*dest_list));\n+\tif (!dest_list) {\n+\t\tDR_LOG(ERR, \"Failed to allocate memory for destinations\");\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n+\n+\tfor (i = 0; i < num_dest; i++) {\n+\t\tenum mlx5dr_action_type *action_type = dests[i].action_type;\n+\n+\t\tif (!mlx5dr_action_check_combo(dests[i].action_type, table_type)) {\n+\t\t\tDR_LOG(ERR, \"Invalid combination of actions\");\n+\t\t\trte_errno = EINVAL;\n+\t\t\tgoto free_dest_list;\n+\t\t}\n+\n+\t\tfor (; *action_type != MLX5DR_ACTION_TYP_LAST; action_type++) {\n+\t\t\tswitch (*action_type) {\n+\t\t\tcase MLX5DR_ACTION_TYP_TBL:\n+\t\t\t\tdest_list[i].destination_type =\n+\t\t\t\t\tMLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;\n+\t\t\t\tdest_list[i].destination_id = dests[i].dest->devx_dest.devx_obj->id;\n+\t\t\t\tfte_attr.action_flags |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;\n+\t\t\t\tfte_attr.ignore_flow_level = 1;\n+\t\t\t\tbreak;\n+\t\t\tcase MLX5DR_ACTION_TYP_VPORT:\n+\t\t\t\tdest_list[i].destination_type = MLX5_FLOW_DESTINATION_TYPE_VPORT;\n+\t\t\t\tdest_list[i].destination_id = dests[i].dest->vport.vport_num;\n+\t\t\t\tfte_attr.action_flags |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;\n+\t\t\t\tif (ctx->caps->merged_eswitch) {\n+\t\t\t\t\tdest_list[i].ext_flags |=\n+\t\t\t\t\t\tMLX5DR_CMD_EXT_DEST_ESW_OWNER_VHCA_ID;\n+\t\t\t\t\tdest_list[i].esw_owner_vhca_id =\n+\t\t\t\t\t\tdests[i].dest->vport.esw_owner_vhca_id;\n+\t\t\t\t}\n+\t\t\t\tbreak;\n+\t\t\tcase MLX5DR_ACTION_TYP_TIR:\n+\t\t\t\tdest_list[i].destination_type = MLX5_FLOW_DESTINATION_TYPE_TIR;\n+\t\t\t\tdest_list[i].destination_id = dests[i].dest->devx_dest.devx_obj->id;\n+\t\t\t\tfte_attr.action_flags |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;\n+\t\t\t\tbreak;\n+\t\t\tdefault:\n+\t\t\t\tDR_LOG(ERR, \"Unsupported action in dest_array\");\n+\t\t\t\trte_errno = ENOTSUP;\n+\t\t\t\tgoto free_dest_list;\n+\t\t\t}\n+\t\t}\n+\t}\n+\tfte_attr.dests_num = num_dest;\n+\tfte_attr.dests = dest_list;\n+\n+\tfw_island = mlx5dr_cmd_forward_tbl_create(ctx->ibv_ctx, &ft_attr, &fte_attr);\n+\tif (!fw_island)\n+\t\tgoto free_dest_list;\n+\n+\taction = mlx5dr_action_create_generic(ctx, flags, MLX5DR_ACTION_TYP_DEST_ARRAY);\n+\tif (!action)\n+\t\tgoto destroy_fw_island;\n+\n+\tret = mlx5dr_action_create_stcs(action, fw_island->ft);\n+\tif (ret)\n+\t\tgoto free_action;\n+\n+\taction->dest_array.fw_island = fw_island;\n+\n+\tsimple_free(dest_list);\n+\treturn action;\n+\n+free_action:\n+\tsimple_free(action);\n+destroy_fw_island:\n+\tmlx5dr_cmd_forward_tbl_destroy(fw_island);\n+free_dest_list:\n+\tsimple_free(dest_list);\n+\treturn NULL;\n+}\n+\n struct mlx5dr_action *\n mlx5dr_action_create_dest_root(struct mlx5dr_context *ctx,\n \t\t\t uint16_t priority,\n@@ -1782,6 +1903,10 @@ static void mlx5dr_action_destroy_hws(struct mlx5dr_action *action)\n \t\tmlx5dr_action_destroy_stcs(action);\n \t\tmlx5dr_action_put_shared_stc(action, MLX5DR_CONTEXT_SHARED_STC_POP);\n \t\tbreak;\n+\tcase MLX5DR_ACTION_TYP_DEST_ARRAY:\n+\t\tmlx5dr_action_destroy_stcs(action);\n+\t\tmlx5dr_cmd_forward_tbl_destroy(action->dest_array.fw_island);\n+\t\tbreak;\n \tcase MLX5DR_ACTION_TYP_REFORMAT_TNL_L3_TO_L2:\n \tcase MLX5DR_ACTION_TYP_MODIFY_HDR:\n \t\tfor (i = 0; i < action->modify_header.num_of_patterns; i++) {\n@@ -2291,6 +2416,7 @@ int mlx5dr_action_template_process(struct mlx5dr_action_template *at)\n \t\tcase MLX5DR_ACTION_TYP_TIR:\n \t\tcase MLX5DR_ACTION_TYP_TBL:\n \t\tcase MLX5DR_ACTION_TYP_DEST_ROOT:\n+\t\tcase MLX5DR_ACTION_TYP_DEST_ARRAY:\n \t\tcase MLX5DR_ACTION_TYP_VPORT:\n \t\tcase MLX5DR_ACTION_TYP_MISS:\n \t\t\t/* Hit action */\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_action.h b/drivers/net/mlx5/hws/mlx5dr_action.h\nindex 104c6880c1..efe07c9d47 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_action.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_action.h\n@@ -151,6 +151,9 @@ struct mlx5dr_action {\n \t\t\t\tstruct {\n \t\t\t\t\tstruct mlx5dr_devx_obj *devx_obj;\n \t\t\t\t} devx_dest;\n+\t\t\t\tstruct {\n+\t\t\t\t\tstruct mlx5dr_cmd_forward_tbl *fw_island;\n+\t\t\t\t} dest_array;\n \t\t\t};\n \t\t};\n \ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.c b/drivers/net/mlx5/hws/mlx5dr_cmd.c\nindex 8f407f9bce..22f7c6b019 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.c\n@@ -158,18 +158,31 @@ mlx5dr_cmd_set_fte(struct ibv_context *ctx,\n \t\t uint32_t group_id,\n \t\t struct mlx5dr_cmd_set_fte_attr *fte_attr)\n {\n-\tuint32_t in[MLX5_ST_SZ_DW(set_fte_in) + MLX5_ST_SZ_DW(dest_format)] = {0};\n \tuint32_t out[MLX5_ST_SZ_DW(set_fte_out)] = {0};\n \tstruct mlx5dr_devx_obj *devx_obj;\n+\tuint32_t dest_entry_sz;\n+\tuint32_t total_dest_sz;\n \tvoid *in_flow_context;\n \tuint32_t action_flags;\n-\tvoid *in_dests;\n+\tuint8_t *in_dests;\n+\tuint32_t inlen;\n+\tuint32_t *in;\n+\tuint32_t i;\n+\n+\tdest_entry_sz = MLX5_ST_SZ_BYTES(dest_format);\n+\ttotal_dest_sz = dest_entry_sz * fte_attr->dests_num;\n+\tinlen = align((MLX5_ST_SZ_BYTES(set_fte_in) + total_dest_sz), DW_SIZE);\n+\tin = simple_calloc(1, inlen);\n+\tif (!in) {\n+\t\trte_errno = ENOMEM;\n+\t\treturn NULL;\n+\t}\n \n \tdevx_obj = simple_malloc(sizeof(*devx_obj));\n \tif (!devx_obj) {\n \t\tDR_LOG(ERR, \"Failed to allocate memory for fte object\");\n \t\trte_errno = ENOMEM;\n-\t\treturn NULL;\n+\t\tgoto free_in;\n \t}\n \n \tMLX5_SET(set_fte_in, in, opcode, MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY);\n@@ -179,6 +192,7 @@ mlx5dr_cmd_set_fte(struct ibv_context *ctx,\n \tin_flow_context = MLX5_ADDR_OF(set_fte_in, in, flow_context);\n \tMLX5_SET(flow_context, in_flow_context, group_id, group_id);\n \tMLX5_SET(flow_context, in_flow_context, flow_source, fte_attr->flow_source);\n+\tMLX5_SET(set_fte_in, in, ignore_flow_level, fte_attr->ignore_flow_level);\n \n \taction_flags = fte_attr->action_flags;\n \tMLX5_SET(flow_context, in_flow_context, action, action_flags);\n@@ -195,15 +209,39 @@ mlx5dr_cmd_set_fte(struct ibv_context *ctx,\n \t}\n \n \tif (action_flags & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {\n-\t\t/* Only destination_list_size of size 1 is supported */\n-\t\tMLX5_SET(flow_context, in_flow_context, destination_list_size, 1);\n-\t\tin_dests = MLX5_ADDR_OF(flow_context, in_flow_context, destination);\n-\t\tMLX5_SET(dest_format, in_dests, destination_type, fte_attr->destination_type);\n-\t\tMLX5_SET(dest_format, in_dests, destination_id, fte_attr->destination_id);\n-\t\tMLX5_SET(set_fte_in, in, ignore_flow_level, fte_attr->ignore_flow_level);\n+\t\tin_dests = (uint8_t *)MLX5_ADDR_OF(flow_context, in_flow_context, destination);\n+\n+\t\tfor (i = 0; i < fte_attr->dests_num; i++) {\n+\t\t\tstruct mlx5dr_cmd_set_fte_dest *dest = &fte_attr->dests[i];\n+\n+\t\t\tswitch (dest->destination_type) {\n+\t\t\tcase MLX5_FLOW_DESTINATION_TYPE_VPORT:\n+\t\t\t\tif (dest->ext_flags & MLX5DR_CMD_EXT_DEST_ESW_OWNER_VHCA_ID) {\n+\t\t\t\t\tMLX5_SET(dest_format, in_dests,\n+\t\t\t\t\t\t destination_eswitch_owner_vhca_id_valid, 1);\n+\t\t\t\t\tMLX5_SET(dest_format, in_dests,\n+\t\t\t\t\t\t destination_eswitch_owner_vhca_id,\n+\t\t\t\t\t\t dest->esw_owner_vhca_id);\n+\t\t\t\t}\n+\t\t\t\t/* Fall through */\n+\t\t\tcase MLX5_FLOW_DESTINATION_TYPE_TIR:\n+\t\t\tcase MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE:\n+\t\t\t\tMLX5_SET(dest_format, in_dests, destination_type,\n+\t\t\t\t\t dest->destination_type);\n+\t\t\t\tMLX5_SET(dest_format, in_dests, destination_id,\n+\t\t\t\t\t dest->destination_id);\n+\t\t\t\tbreak;\n+\t\t\tdefault:\n+\t\t\t\trte_errno = EOPNOTSUPP;\n+\t\t\t\tgoto free_devx;\n+\t\t\t}\n+\n+\t\t\tin_dests = in_dests + dest_entry_sz;\n+\t\t}\n+\t\tMLX5_SET(flow_context, in_flow_context, destination_list_size, fte_attr->dests_num);\n \t}\n \n-\tdevx_obj->obj = mlx5_glue->devx_obj_create(ctx, in, sizeof(in), out, sizeof(out));\n+\tdevx_obj->obj = mlx5_glue->devx_obj_create(ctx, in, inlen, out, sizeof(out));\n \tif (!devx_obj->obj) {\n \t\tDR_LOG(ERR, \"Failed to create FTE (syndrome: %#x)\",\n \t\t mlx5dr_cmd_get_syndrome(out));\n@@ -211,10 +249,13 @@ mlx5dr_cmd_set_fte(struct ibv_context *ctx,\n \t\tgoto free_devx;\n \t}\n \n+\tsimple_free(in);\n \treturn devx_obj;\n \n free_devx:\n \tsimple_free(devx_obj);\n+free_in:\n+\tsimple_free(in);\n \treturn NULL;\n }\n \n@@ -1244,6 +1285,9 @@ int mlx5dr_cmd_query_caps(struct ibv_context *ctx,\n \t\t\tcaps->eswitch_manager_vport_number =\n \t\t\tMLX5_GET(query_hca_cap_out, out,\n \t\t\t\t capability.esw_cap.esw_manager_vport_number);\n+\n+\t\tcaps->merged_eswitch = MLX5_GET(query_hca_cap_out, out,\n+\t\t\t\t\t\tcapability.esw_cap.merged_eswitch);\n \t}\n \n \tret = mlx5_glue->query_device_ex(ctx, NULL, &attr_ex);\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_cmd.h b/drivers/net/mlx5/hws/mlx5dr_cmd.h\nindex bf3a362300..6f4aa3e320 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_cmd.h\n+++ b/drivers/net/mlx5/hws/mlx5dr_cmd.h\n@@ -5,15 +5,27 @@\n #ifndef MLX5DR_CMD_H_\n #define MLX5DR_CMD_H_\n \n+enum mlx5dr_cmd_ext_dest_flags {\n+\tMLX5DR_CMD_EXT_DEST_REFORMAT = 1 << 0,\n+\tMLX5DR_CMD_EXT_DEST_ESW_OWNER_VHCA_ID = 1 << 1,\n+};\n+\n+struct mlx5dr_cmd_set_fte_dest {\n+\tuint8_t destination_type;\n+\tuint32_t destination_id;\n+\tenum mlx5dr_cmd_ext_dest_flags ext_flags;\n+\tuint16_t esw_owner_vhca_id;\n+};\n+\n struct mlx5dr_cmd_set_fte_attr {\n \tuint32_t action_flags;\n+\tuint8_t ignore_flow_level;\n+\tuint8_t flow_source;\n \tuint8_t encrypt_decrypt_type;\n \tuint32_t encrypt_decrypt_obj_id;\n \tuint32_t packet_reformat_id;\n-\tuint8_t destination_type;\n-\tuint32_t destination_id;\n-\tuint8_t ignore_flow_level;\n-\tuint8_t flow_source;\n+\tuint32_t dests_num;\n+\tstruct mlx5dr_cmd_set_fte_dest *dests;\n };\n \n struct mlx5dr_cmd_ft_create_attr {\n@@ -216,6 +228,7 @@ struct mlx5dr_cmd_query_caps {\n \tstruct mlx5dr_cmd_query_ft_caps nic_ft;\n \tstruct mlx5dr_cmd_query_ft_caps fdb_ft;\n \tbool eswitch_manager;\n+\tuint8_t merged_eswitch;\n \tuint32_t eswitch_manager_vport_number;\n \tuint8_t log_header_modify_argument_granularity;\n \tuint8_t log_header_modify_argument_max_alloc;\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_debug.c b/drivers/net/mlx5/hws/mlx5dr_debug.c\nindex 89529944a3..e7b1f2cc32 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_debug.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_debug.c\n@@ -23,6 +23,7 @@ const char *mlx5dr_debug_action_type_str[] = {\n \t[MLX5DR_ACTION_TYP_ASO_METER] = \"ASO_METER\",\n \t[MLX5DR_ACTION_TYP_ASO_CT] = \"ASO_CT\",\n \t[MLX5DR_ACTION_TYP_DEST_ROOT] = \"DEST_ROOT\",\n+\t[MLX5DR_ACTION_TYP_DEST_ARRAY] = \"DEST_ARRAY\",\n };\n \n static_assert(ARRAY_SIZE(mlx5dr_debug_action_type_str) == MLX5DR_ACTION_TYP_MAX,\ndiff --git a/drivers/net/mlx5/hws/mlx5dr_table.c b/drivers/net/mlx5/hws/mlx5dr_table.c\nindex 91eb92db78..55b9b20150 100644\n--- a/drivers/net/mlx5/hws/mlx5dr_table.c\n+++ b/drivers/net/mlx5/hws/mlx5dr_table.c\n@@ -22,6 +22,7 @@ mlx5dr_table_up_default_fdb_miss_tbl(struct mlx5dr_table *tbl)\n \tstruct mlx5dr_cmd_ft_create_attr ft_attr = {0};\n \tstruct mlx5dr_cmd_set_fte_attr fte_attr = {0};\n \tstruct mlx5dr_cmd_forward_tbl *default_miss;\n+\tstruct mlx5dr_cmd_set_fte_dest dest = {0};\n \tstruct mlx5dr_context *ctx = tbl->ctx;\n \tuint8_t tbl_type = tbl->type;\n \n@@ -37,9 +38,11 @@ mlx5dr_table_up_default_fdb_miss_tbl(struct mlx5dr_table *tbl)\n \tft_attr.level = tbl->ctx->caps->fdb_ft.max_level; /* The last level */\n \tft_attr.rtc_valid = false;\n \n+\tdest.destination_type = MLX5_FLOW_DESTINATION_TYPE_VPORT;\n+\tdest.destination_id = ctx->caps->eswitch_manager_vport_number;\n \tfte_attr.action_flags = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;\n-\tfte_attr.destination_type = MLX5_FLOW_DESTINATION_TYPE_VPORT;\n-\tfte_attr.destination_id = ctx->caps->eswitch_manager_vport_number;\n+\tfte_attr.dests_num = 1;\n+\tfte_attr.dests = &dest;\n \n \tdefault_miss = mlx5dr_cmd_forward_tbl_create(mlx5dr_context_get_local_ibv(ctx),\n \t\t\t\t\t\t &ft_attr, &fte_attr);\n", "prefixes": [ "v6", "04/10" ] }