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GET /api/patches/132804/?format=api
{ "id": 132804, "url": "http://patches.dpdk.org/api/patches/132804/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/1697574677-16578-2-git-send-email-roretzla@linux.microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<1697574677-16578-2-git-send-email-roretzla@linux.microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/1697574677-16578-2-git-send-email-roretzla@linux.microsoft.com", "date": "2023-10-17T20:30:59", "name": "[v2,01/19] power: use rte optional stdatomic API", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "20813eb1e474e2dac93fd76d378027d3cb940aba", "submitter": { "id": 2077, "url": "http://patches.dpdk.org/api/people/2077/?format=api", "name": "Tyler Retzlaff", "email": "roretzla@linux.microsoft.com" }, "delegate": { "id": 24651, "url": "http://patches.dpdk.org/api/users/24651/?format=api", "username": "dmarchand", "first_name": "David", "last_name": "Marchand", "email": "david.marchand@redhat.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/1697574677-16578-2-git-send-email-roretzla@linux.microsoft.com/mbox/", "series": [ { "id": 29892, "url": "http://patches.dpdk.org/api/series/29892/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29892", "date": "2023-10-17T20:30:58", "name": "use rte optional stdatomic API", "version": 2, "mbox": "http://patches.dpdk.org/series/29892/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/132804/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/132804/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 5787F43190;\n\tTue, 17 Oct 2023 22:31:31 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C41E942DF3;\n\tTue, 17 Oct 2023 22:31:26 +0200 (CEST)", "from linux.microsoft.com (linux.microsoft.com [13.77.154.182])\n by mails.dpdk.org (Postfix) with ESMTP id 35732402DE\n for <dev@dpdk.org>; Tue, 17 Oct 2023 22:31:19 +0200 (CEST)", "by linux.microsoft.com (Postfix, from userid 1086)\n id 6DE3720B74C1; Tue, 17 Oct 2023 13:31:18 -0700 (PDT)" ], "DKIM-Filter": "OpenDKIM Filter v2.11.0 linux.microsoft.com 6DE3720B74C1", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1697574678;\n bh=Q+EvG4gLjlvtjVB70zS8hfxg9KyFpSSui2BjIESEaJo=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n b=NdQl0px9Xpft7IT92IzPKs4++tHQYsMbAgNNVZKzJ57Uv72/vblSBX/9oB6GggLgT\n a9Gb3YEjBay8urj8zq3sY+Bf4H7n8XS3unaldMFwIA01DAjsLr+8I7bGEOP0fsdStE\n RASAgVKRfShEvx1a9fpL1AYTfSVXEltAm8w5jxNg=", "From": "Tyler Retzlaff <roretzla@linux.microsoft.com>", "To": "dev@dpdk.org", "Cc": "Akhil Goyal <gakhil@marvell.com>,\n Anatoly Burakov <anatoly.burakov@intel.com>,\n Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Chenbo Xia <chenbo.xia@intel.com>, Ciara Power <ciara.power@intel.com>,\n David Christensen <drc@linux.vnet.ibm.com>,\n David Hunt <david.hunt@intel.com>,\n Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>,\n Dmitry Malloy <dmitrym@microsoft.com>,\n Elena Agostini <eagostini@nvidia.com>,\n Erik Gabriel Carrillo <erik.g.carrillo@intel.com>,\n Fan Zhang <fanzhang.oss@gmail.com>, Ferruh Yigit <ferruh.yigit@amd.com>,\n Harman Kalra <hkalra@marvell.com>,\n Harry van Haaren <harry.van.haaren@intel.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Jerin Jacob <jerinj@marvell.com>,\n Konstantin Ananyev <konstantin.v.ananyev@yandex.ru>,\n Matan Azrad <matan@nvidia.com>,\n Maxime Coquelin <maxime.coquelin@redhat.com>,\n Narcisa Ana Maria Vasile <navasile@linux.microsoft.com>,\n Nicolas Chautru <nicolas.chautru@intel.com>,\n Olivier Matz <olivier.matz@6wind.com>, Ori Kam <orika@nvidia.com>,\n Pallavi Kadam <pallavi.kadam@intel.com>,\n Pavan Nikhilesh <pbhagavatula@marvell.com>,\n Reshma Pattan <reshma.pattan@intel.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Shijith Thotton <sthotton@marvell.com>,\n Sivaprasad Tummala <sivaprasad.tummala@amd.com>,\n Stephen Hemminger <stephen@networkplumber.org>,\n Suanming Mou <suanmingm@nvidia.com>, Sunil Kumar Kori <skori@marvell.com>,\n Thomas Monjalon <thomas@monjalon.net>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>,\n Yipeng Wang <yipeng1.wang@intel.com>,\n Tyler Retzlaff <roretzla@linux.microsoft.com>", "Subject": "[PATCH v2 01/19] power: use rte optional stdatomic API", "Date": "Tue, 17 Oct 2023 13:30:59 -0700", "Message-Id": "<1697574677-16578-2-git-send-email-roretzla@linux.microsoft.com>", "X-Mailer": "git-send-email 1.8.3.1", "In-Reply-To": "<1697574677-16578-1-git-send-email-roretzla@linux.microsoft.com>", "References": "<1697497745-20664-1-git-send-email-roretzla@linux.microsoft.com>\n <1697574677-16578-1-git-send-email-roretzla@linux.microsoft.com>", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Replace the use of gcc builtin __atomic_xxx intrinsics with corresponding\nrte_atomic_xxx optional stdatomic API\n\nSigned-off-by: Tyler Retzlaff <roretzla@linux.microsoft.com>\n---\n lib/power/power_acpi_cpufreq.c | 33 +++++++++++++++++----------------\n lib/power/power_cppc_cpufreq.c | 25 +++++++++++++------------\n lib/power/power_pstate_cpufreq.c | 31 ++++++++++++++++---------------\n 3 files changed, 46 insertions(+), 43 deletions(-)", "diff": "diff --git a/lib/power/power_acpi_cpufreq.c b/lib/power/power_acpi_cpufreq.c\nindex 6e57aca..8b55f19 100644\n--- a/lib/power/power_acpi_cpufreq.c\n+++ b/lib/power/power_acpi_cpufreq.c\n@@ -7,6 +7,7 @@\n #include <stdlib.h>\n \n #include <rte_memcpy.h>\n+#include <rte_stdatomic.h>\n #include <rte_string_fns.h>\n \n #include \"power_acpi_cpufreq.h\"\n@@ -41,13 +42,13 @@ enum power_state {\n * Power info per lcore.\n */\n struct acpi_power_info {\n-\tunsigned int lcore_id; /**< Logical core id */\n+\tunsigned int lcore_id; /**< Logical core id */\n \tuint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */\n \tuint32_t nb_freqs; /**< number of available freqs */\n \tFILE *f; /**< FD of scaling_setspeed */\n \tchar governor_ori[32]; /**< Original governor name */\n \tuint32_t curr_idx; /**< Freq index in freqs array */\n-\tuint32_t state; /**< Power in use state */\n+\tRTE_ATOMIC(uint32_t) state; /**< Power in use state */\n \tuint16_t turbo_available; /**< Turbo Boost available */\n \tuint16_t turbo_enable; /**< Turbo Boost enable/disable */\n } __rte_cache_aligned;\n@@ -249,9 +250,9 @@ struct acpi_power_info {\n \t * ordering below as lock to make sure the frequency operations\n \t * in the critical section are done under the correct state.\n \t */\n-\tif (!__atomic_compare_exchange_n(&(pi->state), &exp_state,\n-\t\t\t\t\tPOWER_ONGOING, 0,\n-\t\t\t\t\t__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {\n+\tif (!rte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state,\n+\t\t\t\t\tPOWER_ONGOING,\n+\t\t\t\t\trte_memory_order_acquire, rte_memory_order_relaxed)) {\n \t\tRTE_LOG(INFO, POWER, \"Power management of lcore %u is \"\n \t\t\t\t\"in use\\n\", lcore_id);\n \t\treturn -1;\n@@ -289,15 +290,15 @@ struct acpi_power_info {\n \tRTE_LOG(INFO, POWER, \"Initialized successfully for lcore %u \"\n \t\t\t\"power management\\n\", lcore_id);\n \texp_state = POWER_ONGOING;\n-\t__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_USED,\n-\t\t\t\t 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);\n+\trte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state, POWER_USED,\n+\t\t\t\t rte_memory_order_release, rte_memory_order_relaxed);\n \n \treturn 0;\n \n fail:\n \texp_state = POWER_ONGOING;\n-\t__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,\n-\t\t\t\t 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);\n+\trte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state, POWER_UNKNOWN,\n+\t\t\t\t rte_memory_order_release, rte_memory_order_relaxed);\n \n \treturn -1;\n }\n@@ -321,9 +322,9 @@ struct acpi_power_info {\n \t * ordering below as lock to make sure the frequency operations\n \t * in the critical section are done under the correct state.\n \t */\n-\tif (!__atomic_compare_exchange_n(&(pi->state), &exp_state,\n-\t\t\t\t\tPOWER_ONGOING, 0,\n-\t\t\t\t\t__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {\n+\tif (!rte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state,\n+\t\t\t\t\tPOWER_ONGOING,\n+\t\t\t\t\trte_memory_order_acquire, rte_memory_order_relaxed)) {\n \t\tRTE_LOG(INFO, POWER, \"Power management of lcore %u is \"\n \t\t\t\t\"not used\\n\", lcore_id);\n \t\treturn -1;\n@@ -344,15 +345,15 @@ struct acpi_power_info {\n \t\t\t\"'userspace' mode and been set back to the \"\n \t\t\t\"original\\n\", lcore_id);\n \texp_state = POWER_ONGOING;\n-\t__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_IDLE,\n-\t\t\t\t 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);\n+\trte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state, POWER_IDLE,\n+\t\t\t\t rte_memory_order_release, rte_memory_order_relaxed);\n \n \treturn 0;\n \n fail:\n \texp_state = POWER_ONGOING;\n-\t__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,\n-\t\t\t\t 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);\n+\trte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state, POWER_UNKNOWN,\n+\t\t\t\t rte_memory_order_release, rte_memory_order_relaxed);\n \n \treturn -1;\n }\ndiff --git a/lib/power/power_cppc_cpufreq.c b/lib/power/power_cppc_cpufreq.c\nindex fc9cffe..bb70f6a 100644\n--- a/lib/power/power_cppc_cpufreq.c\n+++ b/lib/power/power_cppc_cpufreq.c\n@@ -6,6 +6,7 @@\n #include <stdlib.h>\n \n #include <rte_memcpy.h>\n+#include <rte_stdatomic.h>\n \n #include \"power_cppc_cpufreq.h\"\n #include \"power_common.h\"\n@@ -49,8 +50,8 @@ enum power_state {\n * Power info per lcore.\n */\n struct cppc_power_info {\n-\tunsigned int lcore_id; /**< Logical core id */\n-\tuint32_t state; /**< Power in use state */\n+\tunsigned int lcore_id; /**< Logical core id */\n+\tRTE_ATOMIC(uint32_t) state; /**< Power in use state */\n \tFILE *f; /**< FD of scaling_setspeed */\n \tchar governor_ori[32]; /**< Original governor name */\n \tuint32_t curr_idx; /**< Freq index in freqs array */\n@@ -353,9 +354,9 @@ struct cppc_power_info {\n \t * ordering below as lock to make sure the frequency operations\n \t * in the critical section are done under the correct state.\n \t */\n-\tif (!__atomic_compare_exchange_n(&(pi->state), &exp_state,\n-\t\t\t\t\tPOWER_ONGOING, 0,\n-\t\t\t\t\t__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {\n+\tif (!rte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state,\n+\t\t\t\t\tPOWER_ONGOING,\n+\t\t\t\t\trte_memory_order_acquire, rte_memory_order_relaxed)) {\n \t\tRTE_LOG(INFO, POWER, \"Power management of lcore %u is \"\n \t\t\t\t\"in use\\n\", lcore_id);\n \t\treturn -1;\n@@ -393,12 +394,12 @@ struct cppc_power_info {\n \tRTE_LOG(INFO, POWER, \"Initialized successfully for lcore %u \"\n \t\t\t\"power management\\n\", lcore_id);\n \n-\t__atomic_store_n(&(pi->state), POWER_USED, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&(pi->state), POWER_USED, rte_memory_order_release);\n \n \treturn 0;\n \n fail:\n-\t__atomic_store_n(&(pi->state), POWER_UNKNOWN, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&(pi->state), POWER_UNKNOWN, rte_memory_order_release);\n \treturn -1;\n }\n \n@@ -431,9 +432,9 @@ struct cppc_power_info {\n \t * ordering below as lock to make sure the frequency operations\n \t * in the critical section are done under the correct state.\n \t */\n-\tif (!__atomic_compare_exchange_n(&(pi->state), &exp_state,\n-\t\t\t\t\tPOWER_ONGOING, 0,\n-\t\t\t\t\t__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {\n+\tif (!rte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state,\n+\t\t\t\t\tPOWER_ONGOING,\n+\t\t\t\t\trte_memory_order_acquire, rte_memory_order_relaxed)) {\n \t\tRTE_LOG(INFO, POWER, \"Power management of lcore %u is \"\n \t\t\t\t\"not used\\n\", lcore_id);\n \t\treturn -1;\n@@ -453,12 +454,12 @@ struct cppc_power_info {\n \tRTE_LOG(INFO, POWER, \"Power management of lcore %u has exited from \"\n \t\t\t\"'userspace' mode and been set back to the \"\n \t\t\t\"original\\n\", lcore_id);\n-\t__atomic_store_n(&(pi->state), POWER_IDLE, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&(pi->state), POWER_IDLE, rte_memory_order_release);\n \n \treturn 0;\n \n fail:\n-\t__atomic_store_n(&(pi->state), POWER_UNKNOWN, __ATOMIC_RELEASE);\n+\trte_atomic_store_explicit(&(pi->state), POWER_UNKNOWN, rte_memory_order_release);\n \n \treturn -1;\n }\ndiff --git a/lib/power/power_pstate_cpufreq.c b/lib/power/power_pstate_cpufreq.c\nindex 52aa645..5ca5f60 100644\n--- a/lib/power/power_pstate_cpufreq.c\n+++ b/lib/power/power_pstate_cpufreq.c\n@@ -12,6 +12,7 @@\n #include <inttypes.h>\n \n #include <rte_memcpy.h>\n+#include <rte_stdatomic.h>\n \n #include \"rte_power_pmd_mgmt.h\"\n #include \"power_pstate_cpufreq.h\"\n@@ -59,7 +60,7 @@ struct pstate_power_info {\n \tuint32_t non_turbo_max_ratio; /**< Non Turbo Max ratio */\n \tuint32_t sys_max_freq; /**< system wide max freq */\n \tuint32_t core_base_freq; /**< core base freq */\n-\tuint32_t state; /**< Power in use state */\n+\tRTE_ATOMIC(uint32_t) state; /**< Power in use state */\n \tuint16_t turbo_available; /**< Turbo Boost available */\n \tuint16_t turbo_enable; /**< Turbo Boost enable/disable */\n \tuint16_t priority_core; /**< High Performance core */\n@@ -555,9 +556,9 @@ struct pstate_power_info {\n \t * ordering below as lock to make sure the frequency operations\n \t * in the critical section are done under the correct state.\n \t */\n-\tif (!__atomic_compare_exchange_n(&(pi->state), &exp_state,\n-\t\t\t\t\tPOWER_ONGOING, 0,\n-\t\t\t\t\t__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {\n+\tif (!rte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state,\n+\t\t\t\t\tPOWER_ONGOING,\n+\t\t\t\t\trte_memory_order_acquire, rte_memory_order_relaxed)) {\n \t\tRTE_LOG(INFO, POWER, \"Power management of lcore %u is \"\n \t\t\t\t\"in use\\n\", lcore_id);\n \t\treturn -1;\n@@ -600,15 +601,15 @@ struct pstate_power_info {\n \tRTE_LOG(INFO, POWER, \"Initialized successfully for lcore %u \"\n \t\t\t\"power management\\n\", lcore_id);\n \texp_state = POWER_ONGOING;\n-\t__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_USED,\n-\t\t\t\t 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);\n+\trte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state, POWER_USED,\n+\t\t\t\t rte_memory_order_release, rte_memory_order_relaxed);\n \n \treturn 0;\n \n fail:\n \texp_state = POWER_ONGOING;\n-\t__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,\n-\t\t\t\t 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);\n+\trte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state, POWER_UNKNOWN,\n+\t\t\t\t rte_memory_order_release, rte_memory_order_relaxed);\n \n \treturn -1;\n }\n@@ -633,9 +634,9 @@ struct pstate_power_info {\n \t * ordering below as lock to make sure the frequency operations\n \t * in the critical section are under done the correct state.\n \t */\n-\tif (!__atomic_compare_exchange_n(&(pi->state), &exp_state,\n-\t\t\t\t\tPOWER_ONGOING, 0,\n-\t\t\t\t\t__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {\n+\tif (!rte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state,\n+\t\t\t\t\tPOWER_ONGOING,\n+\t\t\t\t\trte_memory_order_acquire, rte_memory_order_relaxed)) {\n \t\tRTE_LOG(INFO, POWER, \"Power management of lcore %u is \"\n \t\t\t\t\"not used\\n\", lcore_id);\n \t\treturn -1;\n@@ -658,15 +659,15 @@ struct pstate_power_info {\n \t\t\t\"'performance' mode and been set back to the \"\n \t\t\t\"original\\n\", lcore_id);\n \texp_state = POWER_ONGOING;\n-\t__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_IDLE,\n-\t\t\t\t 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);\n+\trte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state, POWER_IDLE,\n+\t\t\t\t rte_memory_order_release, rte_memory_order_relaxed);\n \n \treturn 0;\n \n fail:\n \texp_state = POWER_ONGOING;\n-\t__atomic_compare_exchange_n(&(pi->state), &exp_state, POWER_UNKNOWN,\n-\t\t\t\t 0, __ATOMIC_RELEASE, __ATOMIC_RELAXED);\n+\trte_atomic_compare_exchange_strong_explicit(&(pi->state), &exp_state, POWER_UNKNOWN,\n+\t\t\t\t rte_memory_order_release, rte_memory_order_relaxed);\n \n \treturn -1;\n }\n", "prefixes": [ "v2", "01/19" ] }