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GET /api/patches/132734/?format=api
{ "id": 132734, "url": "http://patches.dpdk.org/api/patches/132734/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20231017080928.30454-15-getelson@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20231017080928.30454-15-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20231017080928.30454-15-getelson@nvidia.com", "date": "2023-10-17T08:09:26", "name": "[v3,14/16] net/mlx5: fix mirror redirect action", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "42c0bd0cbe08ac973dbbd1b7878337c9fb3fc5f2", "submitter": { "id": 1882, "url": "http://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20231017080928.30454-15-getelson@nvidia.com/mbox/", "series": [ { "id": 29872, "url": "http://patches.dpdk.org/api/series/29872/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29872", "date": "2023-10-17T08:09:12", "name": "net/mlx5: support indirect actions list", "version": 3, "mbox": "http://patches.dpdk.org/series/29872/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/132734/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/132734/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8999D4318A;\n\tTue, 17 Oct 2023 10:11:51 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 2BC7A42DDE;\n\tTue, 17 Oct 2023 10:10:48 +0200 (CEST)", "from NAM12-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam12on2071.outbound.protection.outlook.com [40.107.243.71])\n by mails.dpdk.org (Postfix) with ESMTP id 5EF8A42DCE\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<getelson@nvidia.com>, =?utf-8?b?wqA=?= <mkashani@nvidia.com>,\n <rasland@nvidia.com>, Suanming Mou <suanmingm@nvidia.com>,\n Matan Azrad <matan@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>, Ori Kam <orika@nvidia.com>", "Subject": "[PATCH v3 14/16] net/mlx5: fix mirror redirect action", "Date": "Tue, 17 Oct 2023 11:09:26 +0300", "Message-ID": "<20231017080928.30454-15-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.39.2", "In-Reply-To": "<20231017080928.30454-1-getelson@nvidia.com>", "References": "<20230927191046.405282-1-getelson@nvidia.com>\n <20231017080928.30454-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000E9D9:EE_|SJ0PR12MB6829:EE_", "X-MS-Office365-Filtering-Correlation-Id": "26cc5f96-c0ca-447d-78c4-08dbcee88f55", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n PKhBsxNNGtO+oKN+ovsrhrcaYbOwS/YI49p6CbXp4l2aH9VBCQWg0QcyQyjtC+1SVUuWFXXshHp5CHIEEFkUx02fu6XhTnmDGuHVxPonm2RwHcUev16AoCBtXnLBwtoKP/pDpsq2PxVJB3fT0nTVpC473XRONyyvfno7yYTeyOhHpUkq2dVKsG+IoyCRuZJqXV9y4lWWADJSgZ0RbOVyjXBOwG0KjNIW2Ggt0I7CjKEkZZT9t/wO7Zy+OgOsZdfWC7POsOW4KdakfpQDZyw6e+T6CgeaRtkU6ui+nXoCkNkA2RubthifNiwGOgG0/0T/sAQxJI6aezEc7f7Pr519I48OlxyNhGSAQ1m2BQvvn+EmGRUZQmLnowlgP4L94ZQNQ0oSYnzYUrrl8vfpACkcp234cvS+xA6YXt5SIOEVrMSkAhcoK7Fs8pMiek5bvsWGjoNJC19xXf/yEtHnpDzuGsvjYASu4a3NNIMPvoxeOtCk68aC8pGqKwnLiAzob7Ch6Xg1BpjfrHV7uSJ3SpQeFURcBhljVkvzjuNdPDP1rN1Z0ZnSlTqfN9zkd/nJBQZbWHe5DKZyNGxruNpKBXPReilOOHu446MxyYlWqrG6LnwFzkNnZ/6GOJX9kNThDgfFkGVTIbKFDOEdZ0cbJzSIbBwCQVHyOcWcl2pCDi/EqxVEpVtHIgfJVihrgYElZwTwBM0qLa1XYi8TmBqUNg3xalY4sAxcQmDn4rbBeN+/VtnBI/QGevk44FXVCDlvqwLg", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230031)(4636009)(136003)(346002)(396003)(376002)(39860400002)(230922051799003)(451199024)(1800799009)(64100799003)(82310400011)(186009)(46966006)(40470700004)(36840700001)(41300700001)(70206006)(316002)(54906003)(6916009)(55016003)(36860700001)(40480700001)(40460700003)(2906002)(36756003)(70586007)(86362001)(356005)(82740400003)(7636003)(4326008)(8936002)(5660300002)(8676002)(6666004)(7696005)(336012)(2616005)(107886003)(426003)(6286002)(1076003)(26005)(83380400001)(16526019)(47076005)(478600001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "17 Oct 2023 08:10:43.4285 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 26cc5f96-c0ca-447d-78c4-08dbcee88f55", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000E9D9.namprd05.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SJ0PR12MB6829", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "PMD used a buffer located on expired stack to store\nmirror reformat data.\n\nThe patch moves reformat buffer to the same context as the mirror\naction creation.\n\nFixes: 0284c9b82ee8 (\"net/mlx5: support HWS mirror action\")\nSigned-off-by: Gregory Etelson <getelson@nvidia.com>\nAcked-by: Suanming Mou <suanmingm@nvidia.com>\n---\n drivers/net/mlx5/mlx5_flow_hw.c | 17 +++++++++--------\n 1 file changed, 9 insertions(+), 8 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5_flow_hw.c b/drivers/net/mlx5/mlx5_flow_hw.c\nindex 213b0d5ae8..ae017d2815 100644\n--- a/drivers/net/mlx5/mlx5_flow_hw.c\n+++ b/drivers/net/mlx5/mlx5_flow_hw.c\n@@ -9690,11 +9690,11 @@ mirror_format_port(struct rte_eth_dev *dev,\n \n static int\n hw_mirror_clone_reformat(const struct rte_flow_action *actions,\n- struct mlx5dr_action_dest_attr *dest_attr,\n- enum mlx5dr_action_type *action_type, bool decap)\n+\t\t\t struct mlx5dr_action_dest_attr *dest_attr,\n+\t\t\t enum mlx5dr_action_type *action_type,\n+\t\t\t uint8_t *reformat_buf, bool decap)\n {\n \tint ret;\n-\tuint8_t encap_buf[MLX5_ENCAP_MAX_LEN];\n \tconst struct rte_flow_item *encap_item = NULL;\n \tconst struct rte_flow_action_raw_encap *encap_conf = NULL;\n \ttypeof(dest_attr->reformat) *reformat = &dest_attr->reformat;\n@@ -9718,11 +9718,11 @@ hw_mirror_clone_reformat(const struct rte_flow_action *actions,\n \t\t MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L3 :\n \t\t MLX5DR_ACTION_TYP_REFORMAT_L2_TO_TNL_L2;\n \tif (encap_item) {\n-\t\tret = flow_dv_convert_encap_data(encap_item, encap_buf,\n+\t\tret = flow_dv_convert_encap_data(encap_item, reformat_buf,\n \t\t\t\t\t\t &reformat->reformat_data_sz, NULL);\n \t\tif (ret)\n \t\t\treturn -EINVAL;\n-\t\treformat->reformat_data = (void *)(uintptr_t)encap_buf;\n+\t\treformat->reformat_data = reformat_buf;\n \t} else {\n \t\treformat->reformat_data = (void *)(uintptr_t)encap_conf->data;\n \t\treformat->reformat_data_sz = encap_conf->size;\n@@ -9736,7 +9736,7 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,\n const struct mlx5_flow_template_table_cfg *table_cfg,\n const struct rte_flow_action *actions,\n struct mlx5dr_action_dest_attr *dest_attr,\n- struct rte_flow_error *error)\n+\t\t uint8_t *reformat_buf, struct rte_flow_error *error)\n {\n \tint ret;\n \tuint32_t i;\n@@ -9772,7 +9772,7 @@ hw_mirror_format_clone(struct rte_eth_dev *dev,\n \t\tcase RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:\n \t\t\tret = hw_mirror_clone_reformat(&actions[i], dest_attr,\n \t\t\t\t\t\t &dest_attr->action_type[i],\n-\t\t\t\t\t\t decap_seen);\n+\t\t\t\t\t\t reformat_buf, decap_seen);\n \t\t\tif (ret < 0)\n \t\t\t\treturn rte_flow_error_set(error, EINVAL,\n \t\t\t\t\t\t\t RTE_FLOW_ERROR_TYPE_ACTION,\n@@ -9802,6 +9802,7 @@ mlx5_hw_mirror_handle_create(struct rte_eth_dev *dev,\n \tenum mlx5dr_table_type table_type;\n \tstruct mlx5_priv *priv = dev->data->dev_private;\n \tconst struct rte_flow_attr *flow_attr = &table_cfg->attr.flow_attr;\n+\tuint8_t reformat_buf[MLX5_MIRROR_MAX_CLONES_NUM][MLX5_ENCAP_MAX_LEN];\n \tstruct mlx5dr_action_dest_attr mirror_attr[MLX5_MIRROR_MAX_CLONES_NUM + 1];\n \tenum mlx5dr_action_type array_action_types[MLX5_MIRROR_MAX_CLONES_NUM + 1]\n \t\t\t\t\t\t [MLX5_MIRROR_MAX_SAMPLE_ACTIONS_LEN + 1];\n@@ -9839,7 +9840,7 @@ mlx5_hw_mirror_handle_create(struct rte_eth_dev *dev,\n \t\t}\n \t\tret = hw_mirror_format_clone(dev, &mirror->clone[i], table_cfg,\n \t\t\t\t\t clone_actions, &mirror_attr[i],\n-\t\t\t\t\t error);\n+\t\t\t\t\t reformat_buf[i], error);\n \n \t\tif (ret)\n \t\t\tgoto error;\n", "prefixes": [ "v3", "14/16" ] }