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GET /api/patches/132043/?format=api
{ "id": 132043, "url": "http://patches.dpdk.org/api/patches/132043/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230927183052.17347-13-syalavarthi@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230927183052.17347-13-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230927183052.17347-13-syalavarthi@marvell.com", "date": "2023-09-27T18:30:25", "name": "[v3,12/35] ml/cnxk: update data quantization functions", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "73fa79974628d616c2ec5682f502387200958d2c", "submitter": { "id": 2480, "url": "http://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230927183052.17347-13-syalavarthi@marvell.com/mbox/", "series": [ { "id": 29661, "url": "http://patches.dpdk.org/api/series/29661/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29661", "date": "2023-09-27T18:30:13", "name": "Implemenation of revised ml/cnxk driver", "version": 3, "mbox": "http://patches.dpdk.org/series/29661/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/132043/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/132043/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id DF1B44262B;\n\tWed, 27 Sep 2023 20:32:53 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D61B8410FC;\n\tWed, 27 Sep 2023 20:31:22 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id DC2B240A73\n for <dev@dpdk.org>; Wed, 27 Sep 2023 20:31:09 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 38RCK78s015701 for <dev@dpdk.org>; Wed, 27 Sep 2023 11:31:09 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3tcma5sftc-4\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Wed, 27 Sep 2023 11:31:08 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Wed, 27 Sep 2023 11:31:06 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Wed, 27 Sep 2023 11:31:06 -0700", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id 4B7C83F70A3;\n Wed, 27 Sep 2023 11:31:06 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=pAeR1CgA1+45nSjQ+T3SCGSgoq1dxUTJ1B3qNA6DKp0=;\n b=dEvScdyig9av2SYmuvn0gW95JLKtsRUN4mrpceQiHdReiv7b2iPFDhv2AKxh6wjdce7K\n H/DDg2vvPqfPXgMvwffBiqFovz0mTkzxsci7FYfuGKNvfsEu4mGpytzHcBXusbMLRrCg\n W4nRckZWCvGSygWJ8xJ7Nx8l1ITj+hwQPhivIPf0flhIJ0MYyvonZigVNeoTsQwtDoxY\n d306ACQgAeE6em0tyrfstbqIAmXxWN15BTIVCO/3CY9YGT3+BlRKRujGnwPOiOV33aam\n bYDO3X5yI6JnUfw4u4FVf96Z4tLJvnnHINUfpkPqrn7weK47Jxip4BmeH+a//dbXDyN6 9A==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <aprabhu@marvell.com>,\n <ptakkar@marvell.com>", "Subject": "[PATCH v3 12/35] ml/cnxk: update data quantization functions", "Date": "Wed, 27 Sep 2023 11:30:25 -0700", "Message-ID": "<20230927183052.17347-13-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.41.0", "In-Reply-To": "<20230927183052.17347-1-syalavarthi@marvell.com>", "References": "<20230830155927.3566-1-syalavarthi@marvell.com>\n <20230927183052.17347-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "41ujNvbeFJn3r_u1lgOiRff7h29IPuvz", "X-Proofpoint-ORIG-GUID": "41ujNvbeFJn3r_u1lgOiRff7h29IPuvz", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2023-09-27_12,2023-09-27_01,2023-05-22_02", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added cnxk wrapper functions to quantize input data and\ndequantize output data.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_ops.c | 164 ---------------------------------\n drivers/ml/cnxk/cn10k_ml_ops.h | 7 --\n drivers/ml/cnxk/cnxk_ml_io.c | 95 +++++++++++++++++++\n drivers/ml/cnxk/cnxk_ml_io.h | 3 +\n drivers/ml/cnxk/cnxk_ml_ops.c | 78 +++++++++++++++-\n drivers/ml/cnxk/meson.build | 1 +\n 6 files changed, 175 insertions(+), 173 deletions(-)\n create mode 100644 drivers/ml/cnxk/cnxk_ml_io.c", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex c0d6216485..ff190b7f86 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -1856,170 +1856,6 @@ cn10k_ml_model_params_update(struct cnxk_ml_dev *cnxk_mldev, struct cnxk_ml_mode\n \treturn 0;\n }\n \n-int\n-cn10k_ml_io_quantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_buff_seg **dbuffer,\n-\t\t struct rte_ml_buff_seg **qbuffer)\n-{\n-\tstruct cnxk_ml_model *model;\n-\tuint8_t model_input_type;\n-\tuint8_t *lcl_dbuffer;\n-\tuint8_t *lcl_qbuffer;\n-\tuint8_t input_type;\n-\tfloat qscale;\n-\tuint32_t i;\n-\tuint32_t j;\n-\tint ret;\n-\n-\tmodel = dev->data->models[model_id];\n-\n-\tif (model == NULL) {\n-\t\tplt_err(\"Invalid model_id = %u\", model_id);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tlcl_dbuffer = dbuffer[0]->addr;\n-\tlcl_qbuffer = qbuffer[0]->addr;\n-\n-\tfor (i = 0; i < model->layer[0].glow.metadata.model.num_input; i++) {\n-\t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n-\t\t\tinput_type = model->layer[0].glow.metadata.input1[i].input_type;\n-\t\t\tmodel_input_type = model->layer[0].glow.metadata.input1[i].model_input_type;\n-\t\t\tqscale = model->layer[0].glow.metadata.input1[i].qscale;\n-\t\t} else {\n-\t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n-\t\t\tinput_type = model->layer[0].glow.metadata.input2[j].input_type;\n-\t\t\tmodel_input_type = model->layer[0].glow.metadata.input2[j].model_input_type;\n-\t\t\tqscale = model->layer[0].glow.metadata.input2[j].qscale;\n-\t\t}\n-\n-\t\tif (input_type == model_input_type) {\n-\t\t\trte_memcpy(lcl_qbuffer, lcl_dbuffer, model->layer[0].info.input[i].sz_d);\n-\t\t} else {\n-\t\t\tswitch (model->layer[0].glow.metadata.input1[i].model_input_type) {\n-\t\t\tcase RTE_ML_IO_TYPE_INT8:\n-\t\t\t\tret = rte_ml_io_float32_to_int8(\n-\t\t\t\t\tqscale, model->layer[0].info.input[i].nb_elements,\n-\t\t\t\t\tlcl_dbuffer, lcl_qbuffer);\n-\t\t\t\tbreak;\n-\t\t\tcase RTE_ML_IO_TYPE_UINT8:\n-\t\t\t\tret = rte_ml_io_float32_to_uint8(\n-\t\t\t\t\tqscale, model->layer[0].info.input[i].nb_elements,\n-\t\t\t\t\tlcl_dbuffer, lcl_qbuffer);\n-\t\t\t\tbreak;\n-\t\t\tcase RTE_ML_IO_TYPE_INT16:\n-\t\t\t\tret = rte_ml_io_float32_to_int16(\n-\t\t\t\t\tqscale, model->layer[0].info.input[i].nb_elements,\n-\t\t\t\t\tlcl_dbuffer, lcl_qbuffer);\n-\t\t\t\tbreak;\n-\t\t\tcase RTE_ML_IO_TYPE_UINT16:\n-\t\t\t\tret = rte_ml_io_float32_to_uint16(\n-\t\t\t\t\tqscale, model->layer[0].info.input[i].nb_elements,\n-\t\t\t\t\tlcl_dbuffer, lcl_qbuffer);\n-\t\t\t\tbreak;\n-\t\t\tcase RTE_ML_IO_TYPE_FP16:\n-\t\t\t\tret = rte_ml_io_float32_to_float16(\n-\t\t\t\t\tmodel->layer[0].info.input[i].nb_elements, lcl_dbuffer,\n-\t\t\t\t\tlcl_qbuffer);\n-\t\t\t\tbreak;\n-\t\t\tdefault:\n-\t\t\t\tplt_err(\"Unsupported model_input_type[%u] : %u\", i,\n-\t\t\t\t\tmodel->layer[0].glow.metadata.input1[i].model_input_type);\n-\t\t\t\tret = -ENOTSUP;\n-\t\t\t}\n-\t\t\tif (ret < 0)\n-\t\t\t\treturn ret;\n-\t\t}\n-\n-\t\tlcl_dbuffer += model->layer[0].info.input[i].sz_d;\n-\t\tlcl_qbuffer += model->layer[0].info.input[i].sz_q;\n-\t}\n-\n-\treturn 0;\n-}\n-\n-int\n-cn10k_ml_io_dequantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_buff_seg **qbuffer,\n-\t\t struct rte_ml_buff_seg **dbuffer)\n-{\n-\tstruct cnxk_ml_model *model;\n-\tuint8_t model_output_type;\n-\tuint8_t *lcl_qbuffer;\n-\tuint8_t *lcl_dbuffer;\n-\tuint8_t output_type;\n-\tfloat dscale;\n-\tuint32_t i;\n-\tuint32_t j;\n-\tint ret;\n-\n-\tmodel = dev->data->models[model_id];\n-\n-\tif (model == NULL) {\n-\t\tplt_err(\"Invalid model_id = %u\", model_id);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tlcl_dbuffer = dbuffer[0]->addr;\n-\tlcl_qbuffer = qbuffer[0]->addr;\n-\n-\tfor (i = 0; i < model->layer[0].glow.metadata.model.num_output; i++) {\n-\t\tif (i < MRVL_ML_NUM_INPUT_OUTPUT_1) {\n-\t\t\toutput_type = model->layer[0].glow.metadata.output1[i].output_type;\n-\t\t\tmodel_output_type =\n-\t\t\t\tmodel->layer[0].glow.metadata.output1[i].model_output_type;\n-\t\t\tdscale = model->layer[0].glow.metadata.output1[i].dscale;\n-\t\t} else {\n-\t\t\tj = i - MRVL_ML_NUM_INPUT_OUTPUT_1;\n-\t\t\toutput_type = model->layer[0].glow.metadata.output2[j].output_type;\n-\t\t\tmodel_output_type =\n-\t\t\t\tmodel->layer[0].glow.metadata.output2[j].model_output_type;\n-\t\t\tdscale = model->layer[0].glow.metadata.output2[j].dscale;\n-\t\t}\n-\n-\t\tif (output_type == model_output_type) {\n-\t\t\trte_memcpy(lcl_dbuffer, lcl_qbuffer, model->layer[0].info.output[i].sz_q);\n-\t\t} else {\n-\t\t\tswitch (model->layer[0].glow.metadata.output1[i].model_output_type) {\n-\t\t\tcase RTE_ML_IO_TYPE_INT8:\n-\t\t\t\tret = rte_ml_io_int8_to_float32(\n-\t\t\t\t\tdscale, model->layer[0].info.output[i].nb_elements,\n-\t\t\t\t\tlcl_qbuffer, lcl_dbuffer);\n-\t\t\t\tbreak;\n-\t\t\tcase RTE_ML_IO_TYPE_UINT8:\n-\t\t\t\tret = rte_ml_io_uint8_to_float32(\n-\t\t\t\t\tdscale, model->layer[0].info.output[i].nb_elements,\n-\t\t\t\t\tlcl_qbuffer, lcl_dbuffer);\n-\t\t\t\tbreak;\n-\t\t\tcase RTE_ML_IO_TYPE_INT16:\n-\t\t\t\tret = rte_ml_io_int16_to_float32(\n-\t\t\t\t\tdscale, model->layer[0].info.output[i].nb_elements,\n-\t\t\t\t\tlcl_qbuffer, lcl_dbuffer);\n-\t\t\t\tbreak;\n-\t\t\tcase RTE_ML_IO_TYPE_UINT16:\n-\t\t\t\tret = rte_ml_io_uint16_to_float32(\n-\t\t\t\t\tdscale, model->layer[0].info.output[i].nb_elements,\n-\t\t\t\t\tlcl_qbuffer, lcl_dbuffer);\n-\t\t\t\tbreak;\n-\t\t\tcase RTE_ML_IO_TYPE_FP16:\n-\t\t\t\tret = rte_ml_io_float16_to_float32(\n-\t\t\t\t\tmodel->layer[0].info.output[i].nb_elements, lcl_qbuffer,\n-\t\t\t\t\tlcl_dbuffer);\n-\t\t\t\tbreak;\n-\t\t\tdefault:\n-\t\t\t\tplt_err(\"Unsupported model_output_type[%u] : %u\", i,\n-\t\t\t\t\tmodel->layer[0].glow.metadata.output1[i].model_output_type);\n-\t\t\t\tret = -ENOTSUP;\n-\t\t\t}\n-\t\t\tif (ret < 0)\n-\t\t\t\treturn ret;\n-\t\t}\n-\n-\t\tlcl_qbuffer += model->layer[0].info.output[i].sz_q;\n-\t\tlcl_dbuffer += model->layer[0].info.output[i].sz_d;\n-\t}\n-\n-\treturn 0;\n-}\n-\n static __rte_always_inline void\n queue_index_advance(uint64_t *index, uint64_t nb_desc)\n {\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.h b/drivers/ml/cnxk/cn10k_ml_ops.h\nindex ef12069f0d..780e2a9f9c 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.h\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.h\n@@ -320,13 +320,6 @@ int cn10k_ml_model_stop(struct cnxk_ml_dev *cnxk_mldev, struct cnxk_ml_model *mo\n int cn10k_ml_model_params_update(struct cnxk_ml_dev *cnxk_mldev, struct cnxk_ml_model *model,\n \t\t\t\t void *buffer);\n \n-/* I/O ops */\n-int cn10k_ml_io_quantize(struct rte_ml_dev *dev, uint16_t model_id,\n-\t\t\t struct rte_ml_buff_seg **dbuffer, struct rte_ml_buff_seg **qbuffer);\n-\n-int cn10k_ml_io_dequantize(struct rte_ml_dev *dev, uint16_t model_id,\n-\t\t\t struct rte_ml_buff_seg **qbuffer, struct rte_ml_buff_seg **dbuffer);\n-\n /* Fast-path ops */\n __rte_hot uint16_t cn10k_ml_enqueue_burst(struct rte_ml_dev *dev, uint16_t qp_id,\n \t\t\t\t\t struct rte_ml_op **ops, uint16_t nb_ops);\ndiff --git a/drivers/ml/cnxk/cnxk_ml_io.c b/drivers/ml/cnxk/cnxk_ml_io.c\nnew file mode 100644\nindex 0000000000..c78009ab0c\n--- /dev/null\n+++ b/drivers/ml/cnxk/cnxk_ml_io.c\n@@ -0,0 +1,95 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2023 Marvell.\n+ */\n+\n+#include <rte_mldev.h>\n+\n+#include <mldev_utils.h>\n+\n+#include <roc_api.h>\n+\n+#include \"cnxk_ml_io.h\"\n+\n+inline int\n+cnxk_ml_io_quantize_single(struct cnxk_ml_io *input, uint8_t *dbuffer, uint8_t *qbuffer)\n+{\n+\tenum rte_ml_io_type qtype;\n+\tenum rte_ml_io_type dtype;\n+\tuint32_t nb_elements;\n+\tfloat qscale;\n+\tint ret = 0;\n+\n+\tdtype = input->dtype;\n+\tqtype = input->qtype;\n+\tqscale = input->scale;\n+\tnb_elements = input->nb_elements;\n+\n+\tif (dtype == qtype) {\n+\t\trte_memcpy(qbuffer, dbuffer, input->sz_d);\n+\t} else {\n+\t\tswitch (qtype) {\n+\t\tcase RTE_ML_IO_TYPE_INT8:\n+\t\t\tret = rte_ml_io_float32_to_int8(qscale, nb_elements, dbuffer, qbuffer);\n+\t\t\tbreak;\n+\t\tcase RTE_ML_IO_TYPE_UINT8:\n+\t\t\tret = rte_ml_io_float32_to_uint8(qscale, nb_elements, dbuffer, qbuffer);\n+\t\t\tbreak;\n+\t\tcase RTE_ML_IO_TYPE_INT16:\n+\t\t\tret = rte_ml_io_float32_to_int16(qscale, nb_elements, dbuffer, qbuffer);\n+\t\t\tbreak;\n+\t\tcase RTE_ML_IO_TYPE_UINT16:\n+\t\t\tret = rte_ml_io_float32_to_uint16(qscale, nb_elements, dbuffer, qbuffer);\n+\t\t\tbreak;\n+\t\tcase RTE_ML_IO_TYPE_FP16:\n+\t\t\tret = rte_ml_io_float32_to_float16(nb_elements, dbuffer, qbuffer);\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tplt_err(\"Unsupported qtype : %u\", qtype);\n+\t\t\tret = -ENOTSUP;\n+\t\t}\n+\t}\n+\n+\treturn ret;\n+}\n+\n+inline int\n+cnxk_ml_io_dequantize_single(struct cnxk_ml_io *output, uint8_t *qbuffer, uint8_t *dbuffer)\n+{\n+\tenum rte_ml_io_type qtype;\n+\tenum rte_ml_io_type dtype;\n+\tuint32_t nb_elements;\n+\tfloat dscale;\n+\tint ret = 0;\n+\n+\tdtype = output->dtype;\n+\tqtype = output->qtype;\n+\tdscale = output->scale;\n+\tnb_elements = output->nb_elements;\n+\n+\tif (dtype == qtype) {\n+\t\trte_memcpy(dbuffer, qbuffer, output->sz_q);\n+\t} else {\n+\t\tswitch (qtype) {\n+\t\tcase RTE_ML_IO_TYPE_INT8:\n+\t\t\tret = rte_ml_io_int8_to_float32(dscale, nb_elements, qbuffer, dbuffer);\n+\t\t\tbreak;\n+\t\tcase RTE_ML_IO_TYPE_UINT8:\n+\t\t\tret = rte_ml_io_uint8_to_float32(dscale, nb_elements, qbuffer, dbuffer);\n+\t\t\tbreak;\n+\t\tcase RTE_ML_IO_TYPE_INT16:\n+\t\t\tret = rte_ml_io_int16_to_float32(dscale, nb_elements, qbuffer, dbuffer);\n+\t\t\tbreak;\n+\t\tcase RTE_ML_IO_TYPE_UINT16:\n+\t\t\tret = rte_ml_io_uint16_to_float32(dscale, nb_elements, qbuffer, dbuffer);\n+\t\t\tbreak;\n+\t\tcase RTE_ML_IO_TYPE_FP16:\n+\t\t\tret = rte_ml_io_float16_to_float32(nb_elements, qbuffer, dbuffer);\n+\t\t\tbreak;\n+\t\tdefault:\n+\t\t\tplt_err(\"Unsupported qtype: %u\", qtype);\n+\t\t\tret = -ENOTSUP;\n+\t\t}\n+\t}\n+\n+\treturn ret;\n+}\ndiff --git a/drivers/ml/cnxk/cnxk_ml_io.h b/drivers/ml/cnxk/cnxk_ml_io.h\nindex 29ec7ec511..5de166c252 100644\n--- a/drivers/ml/cnxk/cnxk_ml_io.h\n+++ b/drivers/ml/cnxk/cnxk_ml_io.h\n@@ -76,4 +76,7 @@ struct cnxk_ml_io_info {\n \tuint32_t total_output_sz_d;\n };\n \n+int cnxk_ml_io_quantize_single(struct cnxk_ml_io *input, uint8_t *dbuffer, uint8_t *qbuffer);\n+int cnxk_ml_io_dequantize_single(struct cnxk_ml_io *output, uint8_t *qbuffer, uint8_t *dbuffer);\n+\n #endif /* _CNXK_ML_IO_H_ */\ndiff --git a/drivers/ml/cnxk/cnxk_ml_ops.c b/drivers/ml/cnxk/cnxk_ml_ops.c\nindex 9ce37fcfd1..63842025fc 100644\n--- a/drivers/ml/cnxk/cnxk_ml_ops.c\n+++ b/drivers/ml/cnxk/cnxk_ml_ops.c\n@@ -5,6 +5,8 @@\n #include <rte_mldev.h>\n #include <rte_mldev_pmd.h>\n \n+#include <mldev_utils.h>\n+\n #include \"cnxk_ml_dev.h\"\n #include \"cnxk_ml_io.h\"\n #include \"cnxk_ml_model.h\"\n@@ -648,6 +650,78 @@ cnxk_ml_model_params_update(struct rte_ml_dev *dev, uint16_t model_id, void *buf\n \treturn cn10k_ml_model_params_update(cnxk_mldev, model, buffer);\n }\n \n+static int\n+cnxk_ml_io_quantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_buff_seg **dbuffer,\n+\t\t struct rte_ml_buff_seg **qbuffer)\n+{\n+\tstruct cnxk_ml_io_info *info = NULL;\n+\tstruct cnxk_ml_model *model;\n+\tuint8_t *lcl_dbuffer;\n+\tuint8_t *lcl_qbuffer;\n+\tuint32_t i;\n+\tint ret;\n+\n+\tif ((dev == NULL) || (dbuffer == NULL) || (qbuffer == NULL))\n+\t\treturn -EINVAL;\n+\n+\tmodel = dev->data->models[model_id];\n+\tif (model == NULL) {\n+\t\tplt_err(\"Invalid model_id = %u\", model_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tinfo = &model->layer[0].info;\n+\n+\tlcl_dbuffer = dbuffer[0]->addr;\n+\tlcl_qbuffer = qbuffer[0]->addr;\n+\tfor (i = 0; i < info->nb_inputs; i++) {\n+\t\tret = cnxk_ml_io_quantize_single(&info->input[i], lcl_dbuffer, lcl_qbuffer);\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\n+\t\tlcl_dbuffer += info->input[i].sz_d;\n+\t\tlcl_qbuffer += info->input[i].sz_q;\n+\t}\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_ml_io_dequantize(struct rte_ml_dev *dev, uint16_t model_id, struct rte_ml_buff_seg **qbuffer,\n+\t\t struct rte_ml_buff_seg **dbuffer)\n+{\n+\tstruct cnxk_ml_io_info *info = NULL;\n+\tstruct cnxk_ml_model *model;\n+\tuint8_t *lcl_qbuffer;\n+\tuint8_t *lcl_dbuffer;\n+\tuint32_t i;\n+\tint ret;\n+\n+\tif ((dev == NULL) || (qbuffer == NULL) || (dbuffer == NULL))\n+\t\treturn -EINVAL;\n+\n+\tmodel = dev->data->models[model_id];\n+\tif (model == NULL) {\n+\t\tplt_err(\"Invalid model_id = %u\", model_id);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tinfo = &model->layer[model->nb_layers - 1].info;\n+\n+\tlcl_qbuffer = qbuffer[0]->addr;\n+\tlcl_dbuffer = dbuffer[0]->addr;\n+\tfor (i = 0; i < info->nb_outputs; i++) {\n+\t\tret = cnxk_ml_io_dequantize_single(&info->output[i], lcl_qbuffer, lcl_dbuffer);\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\n+\t\tlcl_qbuffer += info->output[i].sz_q;\n+\t\tlcl_dbuffer += info->output[i].sz_d;\n+\t}\n+\n+\treturn 0;\n+}\n+\n struct rte_ml_dev_ops cnxk_ml_ops = {\n \t/* Device control ops */\n \t.dev_info_get = cnxk_ml_dev_info_get,\n@@ -679,6 +753,6 @@ struct rte_ml_dev_ops cnxk_ml_ops = {\n \t.model_params_update = cnxk_ml_model_params_update,\n \n \t/* I/O ops */\n-\t.io_quantize = cn10k_ml_io_quantize,\n-\t.io_dequantize = cn10k_ml_io_dequantize,\n+\t.io_quantize = cnxk_ml_io_quantize,\n+\t.io_dequantize = cnxk_ml_io_dequantize,\n };\ndiff --git a/drivers/ml/cnxk/meson.build b/drivers/ml/cnxk/meson.build\nindex 6385ac4548..9cc4ddec70 100644\n--- a/drivers/ml/cnxk/meson.build\n+++ b/drivers/ml/cnxk/meson.build\n@@ -25,6 +25,7 @@ sources = files(\n 'cn10k_ml_model.c',\n 'cn10k_ml_ocm.c',\n 'cnxk_ml_dev.c',\n+ 'cnxk_ml_io.c',\n 'cnxk_ml_model.c',\n 'cnxk_ml_ops.c',\n )\n", "prefixes": [ "v3", "12/35" ] }