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{
    "id": 132042,
    "url": "http://patches.dpdk.org/api/patches/132042/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230927183052.17347-8-syalavarthi@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230927183052.17347-8-syalavarthi@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230927183052.17347-8-syalavarthi@marvell.com",
    "date": "2023-09-27T18:30:20",
    "name": "[v3,07/35] ml/cnxk: update device handling functions",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "4d29600047c6d9092a31b56d4b07c54e74d38fd0",
    "submitter": {
        "id": 2480,
        "url": "http://patches.dpdk.org/api/people/2480/?format=api",
        "name": "Srikanth Yalavarthi",
        "email": "syalavarthi@marvell.com"
    },
    "delegate": {
        "id": 310,
        "url": "http://patches.dpdk.org/api/users/310/?format=api",
        "username": "jerin",
        "first_name": "Jerin",
        "last_name": "Jacob",
        "email": "jerinj@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230927183052.17347-8-syalavarthi@marvell.com/mbox/",
    "series": [
        {
            "id": 29661,
            "url": "http://patches.dpdk.org/api/series/29661/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29661",
            "date": "2023-09-27T18:30:13",
            "name": "Implemenation of revised ml/cnxk driver",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/29661/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/132042/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/132042/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
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        ],
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        "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>",
        "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>",
        "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <aprabhu@marvell.com>,\n <ptakkar@marvell.com>",
        "Subject": "[PATCH v3 07/35] ml/cnxk: update device handling functions",
        "Date": "Wed, 27 Sep 2023 11:30:20 -0700",
        "Message-ID": "<20230927183052.17347-8-syalavarthi@marvell.com>",
        "X-Mailer": "git-send-email 2.41.0",
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        "References": "<20230830155927.3566-1-syalavarthi@marvell.com>\n <20230927183052.17347-1-syalavarthi@marvell.com>",
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        "Content-Type": "text/plain",
        "X-Proofpoint-GUID": "RUucqu-1ib_hD3PEXmgTbLo4DG4Eop2K",
        "X-Proofpoint-ORIG-GUID": "RUucqu-1ib_hD3PEXmgTbLo4DG4Eop2K",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.267,Aquarius:18.0.980,Hydra:6.0.619,FMLib:17.11.176.26\n definitions=2023-09-27_12,2023-09-27_01,2023-05-22_02",
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        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Implement CNXK wrapper functions for dev_info_get,\ndev_configure, dev_close, dev_start and dev_stop. The\nwrapper functions allocate / release common resources\nfor the ML driver and invoke device specific functions.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_ops.c | 230 ++------------------------\n drivers/ml/cnxk/cn10k_ml_ops.h |  16 +-\n drivers/ml/cnxk/cnxk_ml_dev.h  |   3 +\n drivers/ml/cnxk/cnxk_ml_ops.c  | 286 ++++++++++++++++++++++++++++++++-\n drivers/ml/cnxk/cnxk_ml_ops.h  |   3 +\n 5 files changed, 314 insertions(+), 224 deletions(-)",
    "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex 66b38fc1eb..6d8f2c8777 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -101,7 +101,7 @@ qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)\n \tsnprintf(name, size, \"cnxk_ml_qp_mem_%u:%u\", dev_id, qp_id);\n }\n \n-static int\n+int\n cnxk_ml_qp_destroy(const struct rte_ml_dev *dev, struct cnxk_ml_qp *qp)\n {\n \tconst struct rte_memzone *qp_mem;\n@@ -861,20 +861,12 @@ cn10k_ml_cache_model_data(struct rte_ml_dev *dev, uint16_t model_id)\n }\n \n int\n-cn10k_ml_dev_info_get(struct rte_ml_dev *dev, struct rte_ml_dev_info *dev_info)\n+cn10k_ml_dev_info_get(struct cnxk_ml_dev *cnxk_mldev, struct rte_ml_dev_info *dev_info)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n-\tstruct cnxk_ml_dev *cnxk_mldev;\n \n-\tif (dev_info == NULL)\n-\t\treturn -EINVAL;\n-\n-\tcnxk_mldev = dev->data->dev_private;\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n \n-\tmemset(dev_info, 0, sizeof(struct rte_ml_dev_info));\n-\tdev_info->driver_name = dev->device->driver->name;\n-\tdev_info->max_models = ML_CNXK_MAX_MODELS;\n \tif (cn10k_mldev->hw_queue_lock)\n \t\tdev_info->max_queue_pairs = ML_CN10K_MAX_QP_PER_DEVICE_SL;\n \telse\n@@ -889,143 +881,17 @@ cn10k_ml_dev_info_get(struct rte_ml_dev *dev, struct rte_ml_dev_info *dev_info)\n }\n \n int\n-cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *conf)\n+cn10k_ml_dev_configure(struct cnxk_ml_dev *cnxk_mldev, const struct rte_ml_dev_config *conf)\n {\n-\tstruct rte_ml_dev_info dev_info;\n \tstruct cn10k_ml_dev *cn10k_mldev;\n-\tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cnxk_ml_model *model;\n \tstruct cn10k_ml_ocm *ocm;\n-\tstruct cnxk_ml_qp *qp;\n-\tuint16_t model_id;\n-\tuint32_t mz_size;\n \tuint16_t tile_id;\n-\tuint16_t qp_id;\n \tint ret;\n \n-\tif (dev == NULL || conf == NULL)\n-\t\treturn -EINVAL;\n+\tRTE_SET_USED(conf);\n \n-\t/* Get CN10K device handle */\n-\tcnxk_mldev = dev->data->dev_private;\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n \n-\tcn10k_ml_dev_info_get(dev, &dev_info);\n-\tif (conf->nb_models > dev_info.max_models) {\n-\t\tplt_err(\"Invalid device config, nb_models > %u\\n\", dev_info.max_models);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (conf->nb_queue_pairs > dev_info.max_queue_pairs) {\n-\t\tplt_err(\"Invalid device config, nb_queue_pairs > %u\\n\", dev_info.max_queue_pairs);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (cnxk_mldev->state == ML_CNXK_DEV_STATE_PROBED) {\n-\t\tplt_ml_dbg(\"Configuring ML device, nb_queue_pairs = %u, nb_models = %u\",\n-\t\t\t   conf->nb_queue_pairs, conf->nb_models);\n-\n-\t\t/* Load firmware */\n-\t\tret = cn10k_ml_fw_load(cnxk_mldev);\n-\t\tif (ret != 0)\n-\t\t\treturn ret;\n-\t} else if (cnxk_mldev->state == ML_CNXK_DEV_STATE_CONFIGURED) {\n-\t\tplt_ml_dbg(\"Re-configuring ML device, nb_queue_pairs = %u, nb_models = %u\",\n-\t\t\t   conf->nb_queue_pairs, conf->nb_models);\n-\t} else if (cnxk_mldev->state == ML_CNXK_DEV_STATE_STARTED) {\n-\t\tplt_err(\"Device can't be reconfigured in started state\\n\");\n-\t\treturn -ENOTSUP;\n-\t} else if (cnxk_mldev->state == ML_CNXK_DEV_STATE_CLOSED) {\n-\t\tplt_err(\"Device can't be reconfigured after close\\n\");\n-\t\treturn -ENOTSUP;\n-\t}\n-\n-\t/* Configure queue-pairs */\n-\tif (dev->data->queue_pairs == NULL) {\n-\t\tmz_size = sizeof(dev->data->queue_pairs[0]) * conf->nb_queue_pairs;\n-\t\tdev->data->queue_pairs =\n-\t\t\trte_zmalloc(\"cn10k_mldev_queue_pairs\", mz_size, RTE_CACHE_LINE_SIZE);\n-\t\tif (dev->data->queue_pairs == NULL) {\n-\t\t\tdev->data->nb_queue_pairs = 0;\n-\t\t\tplt_err(\"Failed to get memory for queue_pairs, nb_queue_pairs %u\",\n-\t\t\t\tconf->nb_queue_pairs);\n-\t\t\treturn -ENOMEM;\n-\t\t}\n-\t} else { /* Re-configure */\n-\t\tvoid **queue_pairs;\n-\n-\t\t/* Release all queue pairs as ML spec doesn't support queue_pair_destroy. */\n-\t\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {\n-\t\t\tqp = dev->data->queue_pairs[qp_id];\n-\t\t\tif (qp != NULL) {\n-\t\t\t\tret = cn10k_ml_dev_queue_pair_release(dev, qp_id);\n-\t\t\t\tif (ret < 0)\n-\t\t\t\t\treturn ret;\n-\t\t\t}\n-\t\t}\n-\n-\t\tqueue_pairs = dev->data->queue_pairs;\n-\t\tqueue_pairs =\n-\t\t\trte_realloc(queue_pairs, sizeof(queue_pairs[0]) * conf->nb_queue_pairs,\n-\t\t\t\t    RTE_CACHE_LINE_SIZE);\n-\t\tif (queue_pairs == NULL) {\n-\t\t\tdev->data->nb_queue_pairs = 0;\n-\t\t\tplt_err(\"Failed to realloc queue_pairs, nb_queue_pairs = %u\",\n-\t\t\t\tconf->nb_queue_pairs);\n-\t\t\tret = -ENOMEM;\n-\t\t\tgoto error;\n-\t\t}\n-\n-\t\tmemset(queue_pairs, 0, sizeof(queue_pairs[0]) * conf->nb_queue_pairs);\n-\t\tdev->data->queue_pairs = queue_pairs;\n-\t}\n-\tdev->data->nb_queue_pairs = conf->nb_queue_pairs;\n-\n-\t/* Allocate ML models */\n-\tif (dev->data->models == NULL) {\n-\t\tmz_size = sizeof(dev->data->models[0]) * conf->nb_models;\n-\t\tdev->data->models = rte_zmalloc(\"cn10k_mldev_models\", mz_size, RTE_CACHE_LINE_SIZE);\n-\t\tif (dev->data->models == NULL) {\n-\t\t\tdev->data->nb_models = 0;\n-\t\t\tplt_err(\"Failed to get memory for ml_models, nb_models %u\",\n-\t\t\t\tconf->nb_models);\n-\t\t\tret = -ENOMEM;\n-\t\t\tgoto error;\n-\t\t}\n-\t} else {\n-\t\t/* Re-configure */\n-\t\tvoid **models;\n-\n-\t\t/* Stop and unload all models */\n-\t\tfor (model_id = 0; model_id < dev->data->nb_models; model_id++) {\n-\t\t\tmodel = dev->data->models[model_id];\n-\t\t\tif (model != NULL) {\n-\t\t\t\tif (model->state == ML_CNXK_MODEL_STATE_STARTED) {\n-\t\t\t\t\tif (cn10k_ml_model_stop(dev, model_id) != 0)\n-\t\t\t\t\t\tplt_err(\"Could not stop model %u\", model_id);\n-\t\t\t\t}\n-\t\t\t\tif (model->state == ML_CNXK_MODEL_STATE_LOADED) {\n-\t\t\t\t\tif (cn10k_ml_model_unload(dev, model_id) != 0)\n-\t\t\t\t\t\tplt_err(\"Could not unload model %u\", model_id);\n-\t\t\t\t}\n-\t\t\t\tdev->data->models[model_id] = NULL;\n-\t\t\t}\n-\t\t}\n-\n-\t\tmodels = dev->data->models;\n-\t\tmodels = rte_realloc(models, sizeof(models[0]) * conf->nb_models,\n-\t\t\t\t     RTE_CACHE_LINE_SIZE);\n-\t\tif (models == NULL) {\n-\t\t\tdev->data->nb_models = 0;\n-\t\t\tplt_err(\"Failed to realloc ml_models, nb_models = %u\", conf->nb_models);\n-\t\t\tret = -ENOMEM;\n-\t\t\tgoto error;\n-\t\t}\n-\t\tmemset(models, 0, sizeof(models[0]) * conf->nb_models);\n-\t\tdev->data->models = models;\n-\t}\n-\tdev->data->nb_models = conf->nb_models;\n-\n \tocm = &cn10k_mldev->ocm;\n \tocm->num_tiles = ML_CN10K_OCM_NUMTILES;\n \tocm->size_per_tile = ML_CN10K_OCM_TILESIZE;\n@@ -1038,8 +904,7 @@ cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *c\n \t\trte_zmalloc(\"ocm_mask\", ocm->mask_words * ocm->num_tiles, RTE_CACHE_LINE_SIZE);\n \tif (ocm->ocm_mask == NULL) {\n \t\tplt_err(\"Unable to allocate memory for OCM mask\");\n-\t\tret = -ENOMEM;\n-\t\tgoto error;\n+\t\treturn -ENOMEM;\n \t}\n \n \tfor (tile_id = 0; tile_id < ocm->num_tiles; tile_id++) {\n@@ -1050,10 +915,10 @@ cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *c\n \trte_spinlock_init(&ocm->lock);\n \n \t/* Initialize xstats */\n-\tret = cn10k_ml_xstats_init(dev);\n+\tret = cn10k_ml_xstats_init(cnxk_mldev->mldev);\n \tif (ret != 0) {\n \t\tplt_err(\"Failed to initialize xstats\");\n-\t\tgoto error;\n+\t\treturn ret;\n \t}\n \n \t/* Set JCMDQ enqueue function */\n@@ -1067,77 +932,25 @@ cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *c\n \tcn10k_mldev->set_poll_ptr = cn10k_ml_set_poll_ptr;\n \tcn10k_mldev->get_poll_ptr = cn10k_ml_get_poll_ptr;\n \n-\tdev->enqueue_burst = cn10k_ml_enqueue_burst;\n-\tdev->dequeue_burst = cn10k_ml_dequeue_burst;\n-\tdev->op_error_get = cn10k_ml_op_error_get;\n-\n-\tcnxk_mldev->nb_models_loaded = 0;\n-\tcnxk_mldev->nb_models_started = 0;\n-\tcnxk_mldev->nb_models_stopped = 0;\n-\tcnxk_mldev->nb_models_unloaded = 0;\n-\tcnxk_mldev->state = ML_CNXK_DEV_STATE_CONFIGURED;\n+\tcnxk_mldev->mldev->enqueue_burst = cn10k_ml_enqueue_burst;\n+\tcnxk_mldev->mldev->dequeue_burst = cn10k_ml_dequeue_burst;\n+\tcnxk_mldev->mldev->op_error_get = cn10k_ml_op_error_get;\n \n \treturn 0;\n-\n-error:\n-\trte_free(dev->data->queue_pairs);\n-\n-\trte_free(dev->data->models);\n-\n-\treturn ret;\n }\n \n int\n-cn10k_ml_dev_close(struct rte_ml_dev *dev)\n+cn10k_ml_dev_close(struct cnxk_ml_dev *cnxk_mldev)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n-\tstruct cnxk_ml_dev *cnxk_mldev;\n-\tstruct cnxk_ml_model *model;\n-\tstruct cnxk_ml_qp *qp;\n-\tuint16_t model_id;\n-\tuint16_t qp_id;\n \n-\tif (dev == NULL)\n-\t\treturn -EINVAL;\n-\n-\tcnxk_mldev = dev->data->dev_private;\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n \n \t/* Release ocm_mask memory */\n \trte_free(cn10k_mldev->ocm.ocm_mask);\n \n-\t/* Stop and unload all models */\n-\tfor (model_id = 0; model_id < dev->data->nb_models; model_id++) {\n-\t\tmodel = dev->data->models[model_id];\n-\t\tif (model != NULL) {\n-\t\t\tif (model->state == ML_CNXK_MODEL_STATE_STARTED) {\n-\t\t\t\tif (cn10k_ml_model_stop(dev, model_id) != 0)\n-\t\t\t\t\tplt_err(\"Could not stop model %u\", model_id);\n-\t\t\t}\n-\t\t\tif (model->state == ML_CNXK_MODEL_STATE_LOADED) {\n-\t\t\t\tif (cn10k_ml_model_unload(dev, model_id) != 0)\n-\t\t\t\t\tplt_err(\"Could not unload model %u\", model_id);\n-\t\t\t}\n-\t\t\tdev->data->models[model_id] = NULL;\n-\t\t}\n-\t}\n-\n-\trte_free(dev->data->models);\n-\n-\t/* Destroy all queue pairs */\n-\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {\n-\t\tqp = dev->data->queue_pairs[qp_id];\n-\t\tif (qp != NULL) {\n-\t\t\tif (cnxk_ml_qp_destroy(dev, qp) != 0)\n-\t\t\t\tplt_err(\"Could not destroy queue pair %u\", qp_id);\n-\t\t\tdev->data->queue_pairs[qp_id] = NULL;\n-\t\t}\n-\t}\n-\n-\trte_free(dev->data->queue_pairs);\n-\n \t/* Un-initialize xstats */\n-\tcn10k_ml_xstats_uninit(dev);\n+\tcn10k_ml_xstats_uninit(cnxk_mldev->mldev);\n \n \t/* Unload firmware */\n \tcn10k_ml_fw_unload(cnxk_mldev);\n@@ -1154,20 +967,15 @@ cn10k_ml_dev_close(struct rte_ml_dev *dev)\n \troc_ml_reg_write64(&cn10k_mldev->roc, 0, ML_MLR_BASE);\n \tplt_ml_dbg(\"ML_MLR_BASE = 0x%016lx\", roc_ml_reg_read64(&cn10k_mldev->roc, ML_MLR_BASE));\n \n-\tcnxk_mldev->state = ML_CNXK_DEV_STATE_CLOSED;\n-\n-\t/* Remove PCI device */\n-\treturn rte_dev_remove(dev->device);\n+\treturn 0;\n }\n \n int\n-cn10k_ml_dev_start(struct rte_ml_dev *dev)\n+cn10k_ml_dev_start(struct cnxk_ml_dev *cnxk_mldev)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n-\tstruct cnxk_ml_dev *cnxk_mldev;\n \tuint64_t reg_val64;\n \n-\tcnxk_mldev = dev->data->dev_private;\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n \n \treg_val64 = roc_ml_reg_read64(&cn10k_mldev->roc, ML_CFG);\n@@ -1175,19 +983,15 @@ cn10k_ml_dev_start(struct rte_ml_dev *dev)\n \troc_ml_reg_write64(&cn10k_mldev->roc, reg_val64, ML_CFG);\n \tplt_ml_dbg(\"ML_CFG => 0x%016lx\", roc_ml_reg_read64(&cn10k_mldev->roc, ML_CFG));\n \n-\tcnxk_mldev->state = ML_CNXK_DEV_STATE_STARTED;\n-\n \treturn 0;\n }\n \n int\n-cn10k_ml_dev_stop(struct rte_ml_dev *dev)\n+cn10k_ml_dev_stop(struct cnxk_ml_dev *cnxk_mldev)\n {\n \tstruct cn10k_ml_dev *cn10k_mldev;\n-\tstruct cnxk_ml_dev *cnxk_mldev;\n \tuint64_t reg_val64;\n \n-\tcnxk_mldev = dev->data->dev_private;\n \tcn10k_mldev = &cnxk_mldev->cn10k_mldev;\n \n \treg_val64 = roc_ml_reg_read64(&cn10k_mldev->roc, ML_CFG);\n@@ -1195,8 +999,6 @@ cn10k_ml_dev_stop(struct rte_ml_dev *dev)\n \troc_ml_reg_write64(&cn10k_mldev->roc, reg_val64, ML_CFG);\n \tplt_ml_dbg(\"ML_CFG => 0x%016lx\", roc_ml_reg_read64(&cn10k_mldev->roc, ML_CFG));\n \n-\tcnxk_mldev->state = ML_CNXK_DEV_STATE_CONFIGURED;\n-\n \treturn 0;\n }\n \n@@ -1217,7 +1019,7 @@ cn10k_ml_dev_queue_pair_setup(struct rte_ml_dev *dev, uint16_t queue_pair_id,\n \tif (dev->data->queue_pairs[queue_pair_id] != NULL)\n \t\tcn10k_ml_dev_queue_pair_release(dev, queue_pair_id);\n \n-\tcn10k_ml_dev_info_get(dev, &dev_info);\n+\tcnxk_ml_dev_info_get(dev, &dev_info);\n \tif ((qp_conf->nb_desc > dev_info.max_desc) || (qp_conf->nb_desc == 0)) {\n \t\tplt_err(\"Could not setup queue pair for %u descriptors\", qp_conf->nb_desc);\n \t\treturn -EINVAL;\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.h b/drivers/ml/cnxk/cn10k_ml_ops.h\nindex 16480b9ad8..d50b5bede7 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.h\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.h\n@@ -10,6 +10,9 @@\n \n #include <roc_api.h>\n \n+struct cnxk_ml_dev;\n+struct cnxk_ml_qp;\n+\n /* Firmware version string length */\n #define MLDEV_FIRMWARE_VERSION_LENGTH 32\n \n@@ -286,11 +289,11 @@ struct cn10k_ml_req {\n };\n \n /* Device ops */\n-int cn10k_ml_dev_info_get(struct rte_ml_dev *dev, struct rte_ml_dev_info *dev_info);\n-int cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *conf);\n-int cn10k_ml_dev_close(struct rte_ml_dev *dev);\n-int cn10k_ml_dev_start(struct rte_ml_dev *dev);\n-int cn10k_ml_dev_stop(struct rte_ml_dev *dev);\n+int cn10k_ml_dev_info_get(struct cnxk_ml_dev *cnxk_mldev, struct rte_ml_dev_info *dev_info);\n+int cn10k_ml_dev_configure(struct cnxk_ml_dev *cnxk_mldev, const struct rte_ml_dev_config *conf);\n+int cn10k_ml_dev_close(struct cnxk_ml_dev *cnxk_mldev);\n+int cn10k_ml_dev_start(struct cnxk_ml_dev *cnxk_mldev);\n+int cn10k_ml_dev_stop(struct cnxk_ml_dev *cnxk_mldev);\n int cn10k_ml_dev_dump(struct rte_ml_dev *dev, FILE *fp);\n int cn10k_ml_dev_selftest(struct rte_ml_dev *dev);\n int cn10k_ml_dev_queue_pair_setup(struct rte_ml_dev *dev, uint16_t queue_pair_id,\n@@ -336,4 +339,7 @@ __rte_hot int cn10k_ml_op_error_get(struct rte_ml_dev *dev, struct rte_ml_op *op\n \t\t\t\t    struct rte_ml_op_error *error);\n __rte_hot int cn10k_ml_inference_sync(struct rte_ml_dev *dev, struct rte_ml_op *op);\n \n+/* Temporarily set below functions as non-static */\n+int cnxk_ml_qp_destroy(const struct rte_ml_dev *dev, struct cnxk_ml_qp *qp);\n+\n #endif /* _CN10K_ML_OPS_H_ */\ndiff --git a/drivers/ml/cnxk/cnxk_ml_dev.h b/drivers/ml/cnxk/cnxk_ml_dev.h\nindex 51315de622..02605fa28f 100644\n--- a/drivers/ml/cnxk/cnxk_ml_dev.h\n+++ b/drivers/ml/cnxk/cnxk_ml_dev.h\n@@ -53,6 +53,9 @@ struct cnxk_ml_dev {\n \n \t/* CN10K device structure */\n \tstruct cn10k_ml_dev cn10k_mldev;\n+\n+\t/* Maximum number of layers */\n+\tuint64_t max_nb_layers;\n };\n \n #endif /* _CNXK_ML_DEV_H_ */\ndiff --git a/drivers/ml/cnxk/cnxk_ml_ops.c b/drivers/ml/cnxk/cnxk_ml_ops.c\nindex 03402681c5..07a4daabc5 100644\n--- a/drivers/ml/cnxk/cnxk_ml_ops.c\n+++ b/drivers/ml/cnxk/cnxk_ml_ops.c\n@@ -5,15 +5,291 @@\n #include <rte_mldev.h>\n #include <rte_mldev_pmd.h>\n \n+#include \"cnxk_ml_dev.h\"\n+#include \"cnxk_ml_io.h\"\n+#include \"cnxk_ml_model.h\"\n #include \"cnxk_ml_ops.h\"\n \n+int\n+cnxk_ml_dev_info_get(struct rte_ml_dev *dev, struct rte_ml_dev_info *dev_info)\n+{\n+\tstruct cnxk_ml_dev *cnxk_mldev;\n+\n+\tif (dev == NULL || dev_info == NULL)\n+\t\treturn -EINVAL;\n+\n+\tcnxk_mldev = dev->data->dev_private;\n+\n+\tmemset(dev_info, 0, sizeof(struct rte_ml_dev_info));\n+\tdev_info->driver_name = dev->device->driver->name;\n+\tdev_info->max_models = ML_CNXK_MAX_MODELS;\n+\n+\treturn cn10k_ml_dev_info_get(cnxk_mldev, dev_info);\n+}\n+\n+static int\n+cnxk_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *conf)\n+{\n+\tstruct rte_ml_dev_info dev_info;\n+\tstruct cnxk_ml_dev *cnxk_mldev;\n+\tstruct cnxk_ml_model *model;\n+\tstruct cnxk_ml_qp *qp;\n+\tuint16_t model_id;\n+\tuint32_t mz_size;\n+\tuint16_t qp_id;\n+\tint ret;\n+\n+\tif (dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\t/* Get CNXK device handle */\n+\tcnxk_mldev = dev->data->dev_private;\n+\n+\tcnxk_ml_dev_info_get(dev, &dev_info);\n+\tif (conf->nb_models > dev_info.max_models) {\n+\t\tplt_err(\"Invalid device config, nb_models > %u\\n\", dev_info.max_models);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (conf->nb_queue_pairs > dev_info.max_queue_pairs) {\n+\t\tplt_err(\"Invalid device config, nb_queue_pairs > %u\\n\", dev_info.max_queue_pairs);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (cnxk_mldev->state == ML_CNXK_DEV_STATE_PROBED) {\n+\t\tplt_ml_dbg(\"Configuring ML device, nb_queue_pairs = %u, nb_models = %u\",\n+\t\t\t   conf->nb_queue_pairs, conf->nb_models);\n+\n+\t\t/* Load firmware */\n+\t\tret = cn10k_ml_fw_load(cnxk_mldev);\n+\t\tif (ret != 0)\n+\t\t\treturn ret;\n+\t} else if (cnxk_mldev->state == ML_CNXK_DEV_STATE_CONFIGURED) {\n+\t\tplt_ml_dbg(\"Re-configuring ML device, nb_queue_pairs = %u, nb_models = %u\",\n+\t\t\t   conf->nb_queue_pairs, conf->nb_models);\n+\t} else if (cnxk_mldev->state == ML_CNXK_DEV_STATE_STARTED) {\n+\t\tplt_err(\"Device can't be reconfigured in started state\\n\");\n+\t\treturn -ENOTSUP;\n+\t} else if (cnxk_mldev->state == ML_CNXK_DEV_STATE_CLOSED) {\n+\t\tplt_err(\"Device can't be reconfigured after close\\n\");\n+\t\treturn -ENOTSUP;\n+\t}\n+\n+\t/* Configure queue-pairs */\n+\tif (dev->data->queue_pairs == NULL) {\n+\t\tmz_size = sizeof(dev->data->queue_pairs[0]) * conf->nb_queue_pairs;\n+\t\tdev->data->queue_pairs =\n+\t\t\trte_zmalloc(\"cnxk_mldev_queue_pairs\", mz_size, RTE_CACHE_LINE_SIZE);\n+\t\tif (dev->data->queue_pairs == NULL) {\n+\t\t\tdev->data->nb_queue_pairs = 0;\n+\t\t\tplt_err(\"Failed to get memory for queue_pairs, nb_queue_pairs %u\",\n+\t\t\t\tconf->nb_queue_pairs);\n+\t\t\treturn -ENOMEM;\n+\t\t}\n+\t} else { /* Re-configure */\n+\t\tvoid **queue_pairs;\n+\n+\t\t/* Release all queue pairs as ML spec doesn't support queue_pair_destroy. */\n+\t\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {\n+\t\t\tqp = dev->data->queue_pairs[qp_id];\n+\t\t\tif (qp != NULL) {\n+\t\t\t\tret = cn10k_ml_dev_queue_pair_release(dev, qp_id);\n+\t\t\t\tif (ret < 0)\n+\t\t\t\t\treturn ret;\n+\t\t\t}\n+\t\t}\n+\n+\t\tqueue_pairs = dev->data->queue_pairs;\n+\t\tqueue_pairs =\n+\t\t\trte_realloc(queue_pairs, sizeof(queue_pairs[0]) * conf->nb_queue_pairs,\n+\t\t\t\t    RTE_CACHE_LINE_SIZE);\n+\t\tif (queue_pairs == NULL) {\n+\t\t\tdev->data->nb_queue_pairs = 0;\n+\t\t\tplt_err(\"Failed to realloc queue_pairs, nb_queue_pairs = %u\",\n+\t\t\t\tconf->nb_queue_pairs);\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto error;\n+\t\t}\n+\n+\t\tmemset(queue_pairs, 0, sizeof(queue_pairs[0]) * conf->nb_queue_pairs);\n+\t\tdev->data->queue_pairs = queue_pairs;\n+\t}\n+\tdev->data->nb_queue_pairs = conf->nb_queue_pairs;\n+\n+\t/* Allocate ML models */\n+\tif (dev->data->models == NULL) {\n+\t\tmz_size = sizeof(dev->data->models[0]) * conf->nb_models;\n+\t\tdev->data->models = rte_zmalloc(\"cnxk_mldev_models\", mz_size, RTE_CACHE_LINE_SIZE);\n+\t\tif (dev->data->models == NULL) {\n+\t\t\tdev->data->nb_models = 0;\n+\t\t\tplt_err(\"Failed to get memory for ml_models, nb_models %u\",\n+\t\t\t\tconf->nb_models);\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto error;\n+\t\t}\n+\t} else {\n+\t\t/* Re-configure */\n+\t\tvoid **models;\n+\n+\t\t/* Stop and unload all models */\n+\t\tfor (model_id = 0; model_id < dev->data->nb_models; model_id++) {\n+\t\t\tmodel = dev->data->models[model_id];\n+\t\t\tif (model != NULL) {\n+\t\t\t\tif (model->state == ML_CNXK_MODEL_STATE_STARTED) {\n+\t\t\t\t\tif (cn10k_ml_model_stop(dev, model_id) != 0)\n+\t\t\t\t\t\tplt_err(\"Could not stop model %u\", model_id);\n+\t\t\t\t}\n+\t\t\t\tif (model->state == ML_CNXK_MODEL_STATE_LOADED) {\n+\t\t\t\t\tif (cn10k_ml_model_unload(dev, model_id) != 0)\n+\t\t\t\t\t\tplt_err(\"Could not unload model %u\", model_id);\n+\t\t\t\t}\n+\t\t\t\tdev->data->models[model_id] = NULL;\n+\t\t\t}\n+\t\t}\n+\n+\t\tmodels = dev->data->models;\n+\t\tmodels = rte_realloc(models, sizeof(models[0]) * conf->nb_models,\n+\t\t\t\t     RTE_CACHE_LINE_SIZE);\n+\t\tif (models == NULL) {\n+\t\t\tdev->data->nb_models = 0;\n+\t\t\tplt_err(\"Failed to realloc ml_models, nb_models = %u\", conf->nb_models);\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto error;\n+\t\t}\n+\t\tmemset(models, 0, sizeof(models[0]) * conf->nb_models);\n+\t\tdev->data->models = models;\n+\t}\n+\tdev->data->nb_models = conf->nb_models;\n+\n+\tret = cn10k_ml_dev_configure(cnxk_mldev, conf);\n+\tif (ret != 0) {\n+\t\tplt_err(\"Failed to configure CN10K ML Device\");\n+\t\tgoto error;\n+\t}\n+\n+\t/* Set device capabilities */\n+\tcnxk_mldev->max_nb_layers =\n+\t\tcnxk_mldev->cn10k_mldev.fw.req->cn10k_req.jd.fw_load.cap.s.max_models;\n+\n+\tcnxk_mldev->nb_models_loaded = 0;\n+\tcnxk_mldev->nb_models_started = 0;\n+\tcnxk_mldev->nb_models_stopped = 0;\n+\tcnxk_mldev->nb_models_unloaded = 0;\n+\tcnxk_mldev->state = ML_CNXK_DEV_STATE_CONFIGURED;\n+\n+\treturn 0;\n+\n+error:\n+\trte_free(dev->data->queue_pairs);\n+\trte_free(dev->data->models);\n+\n+\treturn ret;\n+}\n+\n+static int\n+cnxk_ml_dev_close(struct rte_ml_dev *dev)\n+{\n+\tstruct cnxk_ml_dev *cnxk_mldev;\n+\tstruct cnxk_ml_model *model;\n+\tstruct cnxk_ml_qp *qp;\n+\tuint16_t model_id;\n+\tuint16_t qp_id;\n+\n+\tif (dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tcnxk_mldev = dev->data->dev_private;\n+\n+\tif (cn10k_ml_dev_close(cnxk_mldev) != 0)\n+\t\tplt_err(\"Failed to close CN10K ML Device\");\n+\n+\t/* Stop and unload all models */\n+\tfor (model_id = 0; model_id < dev->data->nb_models; model_id++) {\n+\t\tmodel = dev->data->models[model_id];\n+\t\tif (model != NULL) {\n+\t\t\tif (model->state == ML_CNXK_MODEL_STATE_STARTED) {\n+\t\t\t\tif (cn10k_ml_model_stop(dev, model_id) != 0)\n+\t\t\t\t\tplt_err(\"Could not stop model %u\", model_id);\n+\t\t\t}\n+\t\t\tif (model->state == ML_CNXK_MODEL_STATE_LOADED) {\n+\t\t\t\tif (cn10k_ml_model_unload(dev, model_id) != 0)\n+\t\t\t\t\tplt_err(\"Could not unload model %u\", model_id);\n+\t\t\t}\n+\t\t\tdev->data->models[model_id] = NULL;\n+\t\t}\n+\t}\n+\n+\trte_free(dev->data->models);\n+\n+\t/* Destroy all queue pairs */\n+\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {\n+\t\tqp = dev->data->queue_pairs[qp_id];\n+\t\tif (qp != NULL) {\n+\t\t\tif (cnxk_ml_qp_destroy(dev, qp) != 0)\n+\t\t\t\tplt_err(\"Could not destroy queue pair %u\", qp_id);\n+\t\t\tdev->data->queue_pairs[qp_id] = NULL;\n+\t\t}\n+\t}\n+\n+\trte_free(dev->data->queue_pairs);\n+\n+\tcnxk_mldev->state = ML_CNXK_DEV_STATE_CLOSED;\n+\n+\t/* Remove PCI device */\n+\treturn rte_dev_remove(dev->device);\n+}\n+\n+static int\n+cnxk_ml_dev_start(struct rte_ml_dev *dev)\n+{\n+\tstruct cnxk_ml_dev *cnxk_mldev;\n+\tint ret;\n+\n+\tif (dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tcnxk_mldev = dev->data->dev_private;\n+\n+\tret = cn10k_ml_dev_start(cnxk_mldev);\n+\tif (ret != 0) {\n+\t\tplt_err(\"Failed to start CN10K ML Device\");\n+\t\treturn ret;\n+\t}\n+\n+\tcnxk_mldev->state = ML_CNXK_DEV_STATE_STARTED;\n+\n+\treturn 0;\n+}\n+\n+static int\n+cnxk_ml_dev_stop(struct rte_ml_dev *dev)\n+{\n+\tstruct cnxk_ml_dev *cnxk_mldev;\n+\tint ret;\n+\n+\tif (dev == NULL)\n+\t\treturn -EINVAL;\n+\n+\tcnxk_mldev = dev->data->dev_private;\n+\n+\tret = cn10k_ml_dev_stop(cnxk_mldev);\n+\tif (ret != 0) {\n+\t\tplt_err(\"Failed to stop CN10K ML Device\");\n+\t\treturn ret;\n+\t}\n+\n+\tcnxk_mldev->state = ML_CNXK_DEV_STATE_CONFIGURED;\n+\n+\treturn 0;\n+}\n+\n struct rte_ml_dev_ops cnxk_ml_ops = {\n \t/* Device control ops */\n-\t.dev_info_get = cn10k_ml_dev_info_get,\n-\t.dev_configure = cn10k_ml_dev_configure,\n-\t.dev_close = cn10k_ml_dev_close,\n-\t.dev_start = cn10k_ml_dev_start,\n-\t.dev_stop = cn10k_ml_dev_stop,\n+\t.dev_info_get = cnxk_ml_dev_info_get,\n+\t.dev_configure = cnxk_ml_dev_configure,\n+\t.dev_close = cnxk_ml_dev_close,\n+\t.dev_start = cnxk_ml_dev_start,\n+\t.dev_stop = cnxk_ml_dev_stop,\n \t.dev_dump = cn10k_ml_dev_dump,\n \t.dev_selftest = cn10k_ml_dev_selftest,\n \ndiff --git a/drivers/ml/cnxk/cnxk_ml_ops.h b/drivers/ml/cnxk/cnxk_ml_ops.h\nindex a925c07580..2996928d7d 100644\n--- a/drivers/ml/cnxk/cnxk_ml_ops.h\n+++ b/drivers/ml/cnxk/cnxk_ml_ops.h\n@@ -62,4 +62,7 @@ struct cnxk_ml_qp {\n \n extern struct rte_ml_dev_ops cnxk_ml_ops;\n \n+/* Temporarily set cnxk driver functions as non-static */\n+int cnxk_ml_dev_info_get(struct rte_ml_dev *dev, struct rte_ml_dev_info *dev_info);\n+\n #endif /* _CNXK_ML_OPS_H_ */\n",
    "prefixes": [
        "v3",
        "07/35"
    ]
}