Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/131867/?format=api
{ "id": 131867, "url": "http://patches.dpdk.org/api/patches/131867/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230925103324.4137053-4-qi.z.zhang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230925103324.4137053-4-qi.z.zhang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230925103324.4137053-4-qi.z.zhang@intel.com", "date": "2023-09-25T10:33:22", "name": "[v4,3/5] net/ice: map group to pipeline stage", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "3aab41539b341a9f5c953299db369604b89b7c60", "submitter": { "id": 504, "url": "http://patches.dpdk.org/api/people/504/?format=api", "name": "Qi Zhang", "email": "qi.z.zhang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230925103324.4137053-4-qi.z.zhang@intel.com/mbox/", "series": [ { "id": 29613, "url": "http://patches.dpdk.org/api/series/29613/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29613", "date": "2023-09-25T10:33:19", "name": "net/ice: refactor rte_flow", "version": 4, "mbox": "http://patches.dpdk.org/series/29613/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/131867/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/131867/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id F39FC42630;\n\tMon, 25 Sep 2023 04:13:33 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A7C1240648;\n\tMon, 25 Sep 2023 04:13:24 +0200 (CEST)", "from mgamail.intel.com (mgamail.intel.com [134.134.136.65])\n by mails.dpdk.org (Postfix) with ESMTP id 1EA12402E1\n for <dev@dpdk.org>; Mon, 25 Sep 2023 04:13:21 +0200 (CEST)", "from orsmga008.jf.intel.com ([10.7.209.65])\n by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 24 Sep 2023 19:13:21 -0700", "from dpdk-qzhan15-test02.sh.intel.com ([10.67.115.37])\n by orsmga008.jf.intel.com with ESMTP; 24 Sep 2023 19:13:19 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1695608002; x=1727144002;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=mYA/5Ieyo4HRwA6ZDwt4Xtz3X8rzrugGdN2i9BLImtM=;\n b=EfjdSvEyDp6ZiHsu6ivZfBaZxJR0nCZg3mjo2nXunbMy+EjTYOW7Km7y\n MVq6RdEe8jG1JWNjkG4B0NXbFr/cF4kyxFtx0uXK0Wwhpfpe1OFZUH/Sv\n 3BmV5PfPEbUXRGWPFWVSQA+HxKnWc9ismtfiMjNuLEbCqpXTvkEUiwB0v\n Hb/dbtRxnqrpcQi8rnmWbtqnNU+co2kWEvoJkqWA3eGshXNc+qP2Pib53\n 4GbPQCljpqViFFP/sUQ4zdsj/h4kguaKY5MZxRgmk2AvJ/uyEghyrf8Ac\n eX6iO055hjVS6SjTQa+M44NA/2GTXXeQTcZtbC5SA5fTis+7e5kgulUdk g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10843\"; a=\"384978677\"", "E=Sophos;i=\"6.03,174,1694761200\"; d=\"scan'208\";a=\"384978677\"", "E=McAfee;i=\"6600,9927,10843\"; a=\"777501961\"", "E=Sophos;i=\"6.03,174,1694761200\"; d=\"scan'208\";a=\"777501961\"" ], "X-ExtLoop1": "1", "From": "Qi Zhang <qi.z.zhang@intel.com>", "To": "qiming.yang@intel.com", "Cc": "zhichaox.zeng@intel.com,\n\tdev@dpdk.org,\n\tQi Zhang <qi.z.zhang@intel.com>", "Subject": "[PATCH v4 3/5] net/ice: map group to pipeline stage", "Date": "Mon, 25 Sep 2023 06:33:22 -0400", "Message-Id": "<20230925103324.4137053-4-qi.z.zhang@intel.com>", "X-Mailer": "git-send-email 2.31.1", "In-Reply-To": "<20230925103324.4137053-1-qi.z.zhang@intel.com>", "References": "<20230814202616.3346652-1-qi.z.zhang@intel.com>\n <20230925103324.4137053-1-qi.z.zhang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Mapping rte_flow_attr->group to a specific hardware stage.\n\nGroup 0 -> switch filter\nGroup 1 -> acl filter (dcf mode only)\nGroup 2 -> fdir filter (pf mode only)\n\nFor RSS, it will only be selected if there is a RTE_FLOW_ACTION_RSS\naction target no queue group and the group ID is ignored.\n\nSince each flow parser will be selected based on the group, there is no\nneed to maintain a separate 'parser list' or related APIs for\nregistering/unregistering parsers.\n\nSigned-off-by: Qi Zhang <qi.z.zhang@intel.com>\n---\n drivers/net/ice/ice_acl_filter.c | 13 +-\n drivers/net/ice/ice_ethdev.h | 2 -\n drivers/net/ice/ice_fdir_filter.c | 19 +--\n drivers/net/ice/ice_generic_flow.c | 234 +++++++++-------------------\n drivers/net/ice/ice_generic_flow.h | 9 +-\n drivers/net/ice/ice_hash.c | 16 +-\n drivers/net/ice/ice_switch_filter.c | 13 +-\n 7 files changed, 91 insertions(+), 215 deletions(-)", "diff": "diff --git a/drivers/net/ice/ice_acl_filter.c b/drivers/net/ice/ice_acl_filter.c\nindex 51f4feced4..e507bb927a 100644\n--- a/drivers/net/ice/ice_acl_filter.c\n+++ b/drivers/net/ice/ice_acl_filter.c\n@@ -41,8 +41,6 @@\n \tICE_ACL_INSET_ETH_IPV4 | \\\n \tICE_INSET_SCTP_SRC_PORT | ICE_INSET_SCTP_DST_PORT)\n \n-static struct ice_flow_parser ice_acl_parser;\n-\n struct acl_rule {\n \tenum ice_fltr_ptype flow_type;\n \tuint64_t entry_id[4];\n@@ -993,7 +991,6 @@ ice_acl_init(struct ice_adapter *ad)\n \tint ret = 0;\n \tstruct ice_pf *pf = &ad->pf;\n \tstruct ice_hw *hw = ICE_PF_TO_HW(pf);\n-\tstruct ice_flow_parser *parser = &ice_acl_parser;\n \n \tret = ice_acl_prof_alloc(hw);\n \tif (ret) {\n@@ -1010,11 +1007,7 @@ ice_acl_init(struct ice_adapter *ad)\n \tif (ret)\n \t\treturn ret;\n \n-\tret = ice_acl_prof_init(pf);\n-\tif (ret)\n-\t\treturn ret;\n-\n-\treturn ice_register_parser(parser, ad);\n+\treturn ice_acl_prof_init(pf);\n }\n \n static void\n@@ -1037,10 +1030,8 @@ ice_acl_uninit(struct ice_adapter *ad)\n {\n \tstruct ice_pf *pf = &ad->pf;\n \tstruct ice_hw *hw = ICE_PF_TO_HW(pf);\n-\tstruct ice_flow_parser *parser = &ice_acl_parser;\n \n \tif (ad->hw.dcf_enabled) {\n-\t\tice_unregister_parser(parser, ad);\n \t\tice_deinit_acl(pf);\n \t\tice_acl_prof_free(hw);\n \t}\n@@ -1056,7 +1047,7 @@ ice_flow_engine ice_acl_engine = {\n \t.type = ICE_FLOW_ENGINE_ACL,\n };\n \n-static struct\n+struct\n ice_flow_parser ice_acl_parser = {\n \t.engine = &ice_acl_engine,\n \t.array = ice_acl_pattern,\ndiff --git a/drivers/net/ice/ice_ethdev.h b/drivers/net/ice/ice_ethdev.h\nindex 1f88becd19..abe6dcdc23 100644\n--- a/drivers/net/ice/ice_ethdev.h\n+++ b/drivers/net/ice/ice_ethdev.h\n@@ -541,8 +541,6 @@ struct ice_pf {\n \tbool adapter_stopped;\n \tstruct ice_flow_list flow_list;\n \trte_spinlock_t flow_ops_lock;\n-\tstruct ice_parser_list rss_parser_list;\n-\tstruct ice_parser_list dist_parser_list;\n \tbool init_link_up;\n \tuint64_t old_rx_bytes;\n \tuint64_t old_tx_bytes;\ndiff --git a/drivers/net/ice/ice_fdir_filter.c b/drivers/net/ice/ice_fdir_filter.c\nindex bc43883a92..6afcdf5376 100644\n--- a/drivers/net/ice/ice_fdir_filter.c\n+++ b/drivers/net/ice/ice_fdir_filter.c\n@@ -137,8 +137,6 @@ static struct ice_pattern_match_item ice_fdir_pattern_list[] = {\n \t{pattern_eth_ipv6_gtpu_eh,\t\t\tICE_FDIR_INSET_IPV6_GTPU_EH,\tICE_FDIR_INSET_IPV6_GTPU_EH,\tICE_INSET_NONE},\n };\n \n-static struct ice_flow_parser ice_fdir_parser;\n-\n static int\n ice_fdir_is_tunnel_profile(enum ice_fdir_tunnel_type tunnel_type);\n \n@@ -1147,31 +1145,18 @@ static int\n ice_fdir_init(struct ice_adapter *ad)\n {\n \tstruct ice_pf *pf = &ad->pf;\n-\tstruct ice_flow_parser *parser;\n-\tint ret;\n-\n-\tret = ice_fdir_setup(pf);\n-\tif (ret)\n-\t\treturn ret;\n-\n-\tparser = &ice_fdir_parser;\n \n-\treturn ice_register_parser(parser, ad);\n+\treturn ice_fdir_setup(pf);\n }\n \n static void\n ice_fdir_uninit(struct ice_adapter *ad)\n {\n-\tstruct ice_flow_parser *parser;\n \tstruct ice_pf *pf = &ad->pf;\n \n \tif (ad->hw.dcf_enabled)\n \t\treturn;\n \n-\tparser = &ice_fdir_parser;\n-\n-\tice_unregister_parser(parser, ad);\n-\n \tice_fdir_teardown(pf);\n }\n \n@@ -2507,7 +2492,7 @@ ice_fdir_parse(struct ice_adapter *ad,\n \treturn ret;\n }\n \n-static struct ice_flow_parser ice_fdir_parser = {\n+struct ice_flow_parser ice_fdir_parser = {\n \t.engine = &ice_fdir_engine,\n \t.array = ice_fdir_pattern_list,\n \t.array_len = RTE_DIM(ice_fdir_pattern_list),\ndiff --git a/drivers/net/ice/ice_generic_flow.c b/drivers/net/ice/ice_generic_flow.c\nindex 6695457bbd..e06a1f562a 100644\n--- a/drivers/net/ice/ice_generic_flow.c\n+++ b/drivers/net/ice/ice_generic_flow.c\n@@ -1793,15 +1793,13 @@ enum rte_flow_item_type pattern_eth_ipv6_pfcp[] = {\n \tRTE_FLOW_ITEM_TYPE_END,\n };\n \n-\n-\n-typedef struct ice_flow_engine * (*parse_engine_t)(struct ice_adapter *ad,\n-\t\tstruct rte_flow *flow,\n-\t\tstruct ice_parser_list *parser_list,\n-\t\tuint32_t priority,\n-\t\tconst struct rte_flow_item pattern[],\n-\t\tconst struct rte_flow_action actions[],\n-\t\tstruct rte_flow_error *error);\n+typedef bool (*parse_engine_t)(struct ice_adapter *ad,\n+\t\t\t struct rte_flow *flow,\n+\t\t\t struct ice_flow_parser *parser,\n+\t\t\t uint32_t priority,\n+\t\t\t const struct rte_flow_item pattern[],\n+\t\t\t const struct rte_flow_action actions[],\n+\t\t\t struct rte_flow_error *error);\n \n void\n ice_register_flow_engine(struct ice_flow_engine *engine)\n@@ -1818,8 +1816,6 @@ ice_flow_init(struct ice_adapter *ad)\n \tstruct ice_flow_engine *engine;\n \n \tTAILQ_INIT(&pf->flow_list);\n-\tTAILQ_INIT(&pf->rss_parser_list);\n-\tTAILQ_INIT(&pf->dist_parser_list);\n \trte_spinlock_init(&pf->flow_ops_lock);\n \n \tif (ice_parser_create(&ad->hw, &ad->psr) != ICE_SUCCESS)\n@@ -1860,7 +1856,6 @@ ice_flow_uninit(struct ice_adapter *ad)\n \tstruct ice_pf *pf = &ad->pf;\n \tstruct ice_flow_engine *engine;\n \tstruct rte_flow *p_flow;\n-\tstruct ice_flow_parser_node *p_parser;\n \tvoid *temp;\n \n \tRTE_TAILQ_FOREACH_SAFE(engine, &engine_list, node, temp) {\n@@ -1881,117 +1876,12 @@ ice_flow_uninit(struct ice_adapter *ad)\n \t\trte_free(p_flow);\n \t}\n \n-\t/* Cleanup parser list */\n-\twhile ((p_parser = TAILQ_FIRST(&pf->rss_parser_list))) {\n-\t\tTAILQ_REMOVE(&pf->rss_parser_list, p_parser, node);\n-\t\trte_free(p_parser);\n-\t}\n-\n-\twhile ((p_parser = TAILQ_FIRST(&pf->dist_parser_list))) {\n-\t\tTAILQ_REMOVE(&pf->dist_parser_list, p_parser, node);\n-\t\trte_free(p_parser);\n-\t}\n-\n \tif (ad->psr != NULL) {\n \t\tice_parser_destroy(ad->psr);\n \t\tad->psr = NULL;\n \t}\n }\n \n-static struct ice_parser_list *\n-ice_get_parser_list(struct ice_flow_parser *parser,\n-\t\tstruct ice_adapter *ad)\n-{\n-\tstruct ice_parser_list *list;\n-\tstruct ice_pf *pf = &ad->pf;\n-\n-\tswitch (parser->stage) {\n-\tcase ICE_FLOW_STAGE_RSS:\n-\t\tlist = &pf->rss_parser_list;\n-\t\tbreak;\n-\tcase ICE_FLOW_STAGE_DISTRIBUTOR:\n-\t\tlist = &pf->dist_parser_list;\n-\t\tbreak;\n-\tdefault:\n-\t\treturn NULL;\n-\t}\n-\n-\treturn list;\n-}\n-\n-int\n-ice_register_parser(struct ice_flow_parser *parser,\n-\t\tstruct ice_adapter *ad)\n-{\n-\tstruct ice_parser_list *list;\n-\tstruct ice_flow_parser_node *parser_node;\n-\tstruct ice_flow_parser_node *existing_node;\n-\tvoid *temp;\n-\n-\tparser_node = rte_zmalloc(\"ice_parser\", sizeof(*parser_node), 0);\n-\tif (parser_node == NULL) {\n-\t\tPMD_DRV_LOG(ERR, \"Failed to allocate memory.\");\n-\t\treturn -ENOMEM;\n-\t}\n-\tparser_node->parser = parser;\n-\n-\tlist = ice_get_parser_list(parser, ad);\n-\tif (list == NULL)\n-\t\treturn -EINVAL;\n-\n-\tif (parser->engine->type == ICE_FLOW_ENGINE_SWITCH) {\n-\t\tRTE_TAILQ_FOREACH_SAFE(existing_node, list,\n-\t\t\t\t node, temp) {\n-\t\t\tif (existing_node->parser->engine->type ==\n-\t\t\t ICE_FLOW_ENGINE_ACL) {\n-\t\t\t\tTAILQ_INSERT_AFTER(list, existing_node,\n-\t\t\t\t\t\t parser_node, node);\n-\t\t\t\tgoto DONE;\n-\t\t\t}\n-\t\t}\n-\t\tTAILQ_INSERT_HEAD(list, parser_node, node);\n-\t} else if (parser->engine->type == ICE_FLOW_ENGINE_FDIR) {\n-\t\tRTE_TAILQ_FOREACH_SAFE(existing_node, list,\n-\t\t\t\t node, temp) {\n-\t\t\tif (existing_node->parser->engine->type ==\n-\t\t\t ICE_FLOW_ENGINE_SWITCH) {\n-\t\t\t\tTAILQ_INSERT_AFTER(list, existing_node,\n-\t\t\t\t\t\t parser_node, node);\n-\t\t\t\tgoto DONE;\n-\t\t\t}\n-\t\t}\n-\t\tTAILQ_INSERT_HEAD(list, parser_node, node);\n-\t} else if (parser->engine->type == ICE_FLOW_ENGINE_HASH) {\n-\t\tTAILQ_INSERT_TAIL(list, parser_node, node);\n-\t} else if (parser->engine->type == ICE_FLOW_ENGINE_ACL) {\n-\t\tTAILQ_INSERT_HEAD(list, parser_node, node);\n-\t} else {\n-\t\treturn -EINVAL;\n-\t}\n-DONE:\n-\treturn 0;\n-}\n-\n-void\n-ice_unregister_parser(struct ice_flow_parser *parser,\n-\t\tstruct ice_adapter *ad)\n-{\n-\tstruct ice_parser_list *list;\n-\tstruct ice_flow_parser_node *p_parser;\n-\tvoid *temp;\n-\n-\tlist = ice_get_parser_list(parser, ad);\n-\tif (list == NULL)\n-\t\treturn;\n-\n-\tRTE_TAILQ_FOREACH_SAFE(p_parser, list, node, temp) {\n-\t\tif (p_parser->parser->engine->type == parser->engine->type) {\n-\t\t\tTAILQ_REMOVE(list, p_parser, node);\n-\t\t\trte_free(p_parser);\n-\t\t}\n-\t}\n-}\n-\n static int\n ice_flow_valid_attr(const struct rte_flow_attr *attr,\n \t\t struct rte_flow_error *error)\n@@ -2296,64 +2186,73 @@ ice_search_pattern_match_item(struct ice_adapter *ad,\n \treturn NULL;\n }\n \n-static struct ice_flow_engine *\n+static bool\n ice_parse_engine_create(struct ice_adapter *ad,\n \t\tstruct rte_flow *flow,\n-\t\tstruct ice_parser_list *parser_list,\n+\t\tstruct ice_flow_parser *parser,\n \t\tuint32_t priority,\n \t\tconst struct rte_flow_item pattern[],\n \t\tconst struct rte_flow_action actions[],\n \t\tstruct rte_flow_error *error)\n {\n-\tstruct ice_flow_engine *engine = NULL;\n-\tstruct ice_flow_parser_node *parser_node;\n \tvoid *meta = NULL;\n-\tvoid *temp;\n \n-\tRTE_TAILQ_FOREACH_SAFE(parser_node, parser_list, node, temp) {\n-\t\tint ret;\n+\tif (ICE_FLOW_ENGINE_DISABLED(ad->disabled_engine_mask,\n+\t\t\t\t parser->engine->type)) {\n+\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"engine is not enabled.\");\n+\t\treturn false;\n+\t}\n+\n+\tif (parser->parse_pattern_action(ad,\n+\t\t\t\t\t parser->array,\n+\t\t\t\t\t parser->array_len,\n+\t\t\t\t\t pattern, actions, priority, &meta, error) < 0)\n+\t\treturn false;\n \n-\t\tif (parser_node->parser->parse_pattern_action(ad,\n-\t\t\t\tparser_node->parser->array,\n-\t\t\t\tparser_node->parser->array_len,\n-\t\t\t\tpattern, actions, priority, &meta, error) < 0)\n-\t\t\tcontinue;\n+\tRTE_ASSERT(parser->engine->create != NULL);\n \n-\t\tengine = parser_node->parser->engine;\n-\t\tRTE_ASSERT(engine->create != NULL);\n-\t\tret = engine->create(ad, flow, meta, error);\n-\t\tif (ret == 0)\n-\t\t\treturn engine;\n-\t\telse if (ret == -EEXIST)\n-\t\t\treturn NULL;\n-\t}\n-\treturn NULL;\n+\treturn parser->engine->create(ad, flow, meta, error) == 0;\n }\n \n-static struct ice_flow_engine *\n+static bool\n ice_parse_engine_validate(struct ice_adapter *ad,\n \t\tstruct rte_flow *flow __rte_unused,\n-\t\tstruct ice_parser_list *parser_list,\n+\t\tstruct ice_flow_parser *parser,\n \t\tuint32_t priority,\n \t\tconst struct rte_flow_item pattern[],\n \t\tconst struct rte_flow_action actions[],\n \t\tstruct rte_flow_error *error)\n {\n-\tstruct ice_flow_engine *engine = NULL;\n-\tstruct ice_flow_parser_node *parser_node;\n-\tvoid *temp;\n \n-\tRTE_TAILQ_FOREACH_SAFE(parser_node, parser_list, node, temp) {\n-\t\tif (parser_node->parser->parse_pattern_action(ad,\n-\t\t\t\tparser_node->parser->array,\n-\t\t\t\tparser_node->parser->array_len,\n-\t\t\t\tpattern, actions, priority, NULL, error) < 0)\n-\t\t\tcontinue;\n+\tif (ICE_FLOW_ENGINE_DISABLED(ad->disabled_engine_mask,\n+\t\t\t\t parser->engine->type)) {\n+\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_UNSPECIFIED,\n+\t\t\t\t NULL, \"engine is not enabled.\");\n+\t\treturn false;\n+\t}\n+\n+\treturn parser->parse_pattern_action(ad,\n+\t\t\t\t\t parser->array,\n+\t\t\t\t\t parser->array_len,\n+\t\t\t\t\t pattern, actions, priority,\n+\t\t\t\t\t NULL, error) >= 0;\n+}\n \n-\t\tengine = parser_node->parser->engine;\n-\t\tbreak;\n+static struct ice_flow_parser *get_flow_parser(uint32_t group)\n+{\n+\tswitch (group) {\n+\tcase 0:\n+\t\treturn &ice_switch_parser;\n+\tcase 1:\n+\t\treturn &ice_acl_parser;\n+\tcase 2:\n+\t\treturn &ice_fdir_parser;\n+\tdefault:\n+\t\treturn NULL;\n \t}\n-\treturn engine;\n }\n \n static int\n@@ -2369,7 +2268,7 @@ ice_flow_process_filter(struct rte_eth_dev *dev,\n \tint ret = ICE_ERR_NOT_SUPPORTED;\n \tstruct ice_adapter *ad =\n \t\tICE_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n-\tstruct ice_pf *pf = ICE_DEV_PRIVATE_TO_PF(dev->data->dev_private);\n+\tstruct ice_flow_parser *parser;\n \n \tif (!pattern) {\n \t\trte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ITEM_NUM,\n@@ -2395,17 +2294,30 @@ ice_flow_process_filter(struct rte_eth_dev *dev,\n \tif (ret)\n \t\treturn ret;\n \n-\t*engine = ice_parse_engine(ad, flow, &pf->rss_parser_list,\n-\t\t\tattr->priority, pattern, actions, error);\n-\tif (*engine != NULL)\n+\t*engine = NULL;\n+\t/* always try hash engine first */\n+\tif (ice_parse_engine(ad, flow, &ice_hash_parser,\n+\t\t\t attr->priority, pattern,\n+\t\t\t actions, error)) {\n+\t\t*engine = ice_hash_parser.engine;\n \t\treturn 0;\n+\t}\n \n-\t*engine = ice_parse_engine(ad, flow, &pf->dist_parser_list,\n-\t\t\t\t attr->priority, pattern, actions, error);\n-\tif (*engine == NULL)\n-\t\treturn -EINVAL;\n+\tparser = get_flow_parser(attr->group);\n+\tif (parser == NULL) {\n+\t\trte_flow_error_set(error, EINVAL,\n+\t\t\t\t RTE_FLOW_ERROR_TYPE_ATTR,\n+\t\t\t\t NULL, \"NULL attribute.\");\n+\t\treturn -rte_errno;\n+\t}\n \n-\treturn 0;\n+\tif (ice_parse_engine(ad, flow, parser, attr->priority,\n+\t\t\t pattern, actions, error)) {\n+\t\t*engine = parser->engine;\n+\t\treturn 0;\n+\t} else {\n+\t\treturn -rte_errno;\n+\t}\n }\n \n static int\ndiff --git a/drivers/net/ice/ice_generic_flow.h b/drivers/net/ice/ice_generic_flow.h\nindex 471f255bd6..391d615b9a 100644\n--- a/drivers/net/ice/ice_generic_flow.h\n+++ b/drivers/net/ice/ice_generic_flow.h\n@@ -515,10 +515,6 @@ struct ice_flow_parser_node {\n void ice_register_flow_engine(struct ice_flow_engine *engine);\n int ice_flow_init(struct ice_adapter *ad);\n void ice_flow_uninit(struct ice_adapter *ad);\n-int ice_register_parser(struct ice_flow_parser *parser,\n-\t\tstruct ice_adapter *ad);\n-void ice_unregister_parser(struct ice_flow_parser *parser,\n-\t\tstruct ice_adapter *ad);\n struct ice_pattern_match_item *\n ice_search_pattern_match_item(struct ice_adapter *ad,\n \t\t\t const struct rte_flow_item pattern[],\n@@ -528,4 +524,9 @@ ice_search_pattern_match_item(struct ice_adapter *ad,\n int\n ice_flow_redirect(struct ice_adapter *ad,\n \t\t struct ice_flow_redirect *rd);\n+\n+extern struct ice_flow_parser ice_switch_parser;\n+extern struct ice_flow_parser ice_acl_parser;\n+extern struct ice_flow_parser ice_fdir_parser;\n+extern struct ice_flow_parser ice_hash_parser;\n #endif\ndiff --git a/drivers/net/ice/ice_hash.c b/drivers/net/ice/ice_hash.c\nindex 37bee808c6..f923641533 100644\n--- a/drivers/net/ice/ice_hash.c\n+++ b/drivers/net/ice/ice_hash.c\n@@ -572,7 +572,7 @@ static struct ice_flow_engine ice_hash_engine = {\n };\n \n /* Register parser for os package. */\n-static struct ice_flow_parser ice_hash_parser = {\n+struct ice_flow_parser ice_hash_parser = {\n \t.engine = &ice_hash_engine,\n \t.array = ice_hash_pattern_list,\n \t.array_len = RTE_DIM(ice_hash_pattern_list),\n@@ -587,13 +587,9 @@ RTE_INIT(ice_hash_engine_init)\n }\n \n static int\n-ice_hash_init(struct ice_adapter *ad)\n+ice_hash_init(struct ice_adapter *ad __rte_unused)\n {\n-\tstruct ice_flow_parser *parser = NULL;\n-\n-\tparser = &ice_hash_parser;\n-\n-\treturn ice_register_parser(parser, ad);\n+\treturn 0;\n }\n \n static int\n@@ -1439,12 +1435,8 @@ ice_hash_destroy(struct ice_adapter *ad,\n }\n \n static void\n-ice_hash_uninit(struct ice_adapter *ad)\n+ice_hash_uninit(struct ice_adapter *ad __rte_unused)\n {\n-\tif (ad->hw.dcf_enabled)\n-\t\treturn;\n-\n-\tice_unregister_parser(&ice_hash_parser, ad);\n }\n \n static void\ndiff --git a/drivers/net/ice/ice_switch_filter.c b/drivers/net/ice/ice_switch_filter.c\nindex 88d599068f..8f29326762 100644\n--- a/drivers/net/ice/ice_switch_filter.c\n+++ b/drivers/net/ice/ice_switch_filter.c\n@@ -201,8 +201,6 @@ struct ice_switch_filter_conf {\n \tstruct ice_adv_rule_info rule_info;\n };\n \n-static struct ice_flow_parser ice_switch_dist_parser;\n-\n static struct\n ice_pattern_match_item ice_switch_pattern_dist_list[] = {\n \t{pattern_any,\t\t\t\t\tICE_INSET_NONE,\t\t\t\tICE_INSET_NONE,\t\t\t\tICE_INSET_NONE},\n@@ -2052,15 +2050,14 @@ ice_switch_redirect(struct ice_adapter *ad,\n }\n \n static int\n-ice_switch_init(struct ice_adapter *ad)\n+ice_switch_init(struct ice_adapter *ad __rte_unused)\n {\n-\treturn ice_register_parser(&ice_switch_dist_parser, ad);\n+\treturn 0;\n }\n \n static void\n-ice_switch_uninit(struct ice_adapter *ad)\n+ice_switch_uninit(struct ice_adapter *ad __rte_unused)\n {\n-\tice_unregister_parser(&ice_switch_dist_parser, ad);\n }\n \n static struct\n@@ -2075,8 +2072,8 @@ ice_flow_engine ice_switch_engine = {\n \t.type = ICE_FLOW_ENGINE_SWITCH,\n };\n \n-static struct\n-ice_flow_parser ice_switch_dist_parser = {\n+struct\n+ice_flow_parser ice_switch_parser = {\n \t.engine = &ice_switch_engine,\n \t.array = ice_switch_pattern_dist_list,\n \t.array_len = RTE_DIM(ice_switch_pattern_dist_list),\n", "prefixes": [ "v4", "3/5" ] }