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GET /api/patches/131494/?format=api
{ "id": 131494, "url": "http://patches.dpdk.org/api/patches/131494/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230915091551.1459606-20-chaoyong.he@corigine.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230915091551.1459606-20-chaoyong.he@corigine.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230915091551.1459606-20-chaoyong.he@corigine.com", "date": "2023-09-15T09:15:43", "name": "[v3,19/27] net/nfp: refact the nsp module", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "275669509dc027277a68156a3084c18315522bd4", "submitter": { "id": 2554, "url": "http://patches.dpdk.org/api/people/2554/?format=api", "name": "Chaoyong He", "email": "chaoyong.he@corigine.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230915091551.1459606-20-chaoyong.he@corigine.com/mbox/", "series": [ { "id": 29520, "url": "http://patches.dpdk.org/api/series/29520/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29520", "date": "2023-09-15T09:15:24", "name": "refact the nfpcore module", "version": 3, "mbox": "http://patches.dpdk.org/series/29520/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/131494/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/131494/checks/", "tags": {}, "related": [], "headers": { "Return-Path": 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"Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;", "From": "Chaoyong He <chaoyong.he@corigine.com>", "To": "dev@dpdk.org", "Cc": "oss-drivers@corigine.com, Chaoyong He <chaoyong.he@corigine.com>,\n\t=?utf-8?q?Niklas_S=C3=B6derlund?= <niklas.soderlund@corigine.com>", "Subject": "[PATCH v3 19/27] net/nfp: refact the nsp module", "Date": "Fri, 15 Sep 2023 17:15:43 +0800", "Message-Id": "<20230915091551.1459606-20-chaoyong.he@corigine.com>", "X-Mailer": "git-send-email 2.39.1", "In-Reply-To": "<20230915091551.1459606-1-chaoyong.he@corigine.com>", "References": "<20230830021457.2064750-1-chaoyong.he@corigine.com>\n <20230915091551.1459606-1-chaoyong.he@corigine.com>", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-ClientProxiedBy": "PH7PR10CA0017.namprd10.prod.outlook.com\n (2603:10b6:510:23d::10) To SJ0PR13MB5545.namprd13.prod.outlook.com\n (2603:10b6:a03:424::5)", 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"=?utf-8?q?L0WeC+kcRV6daDGgT3nNYShNPTuz?=\n\t=?utf-8?q?wRbaapncEfCf6Br1oWWfbUtat43Cey44X52kStERJqtk062V9O+2/flGgKVAOdN9h?=\n\t=?utf-8?q?/ISX32M2Nzx1Vgd0OZv8pEoFoDieqxAq8UO4n/LER4G1Ak2qjdoj8pRjRWnIxiwPv?=\n\t=?utf-8?q?jAlTri9S37HzhiTRUKS6dC/G+9Q+ERBqjYiqxWXerp4IO1WW+aCKp/cCW32zfj6w0?=\n\t=?utf-8?q?pBsyMHKM/nkUaolhYt/40dLAxlDK40TifaIds8Cfj3z+lL6XA1fG+D6qqcaYsA4T3?=\n\t=?utf-8?q?0+Kb8Wwn+Aa+zjd+6d8dY/niAbwTme83nRottY28AVS+7ISFuxT9w7PlhGjJrM760?=\n\t=?utf-8?q?tlGanPJ0gP1NN11xctNbjEdQEKhn2/M75oBusVjedHMsq2DDn1L8vQ8ObtAKQv6rs?=\n\t=?utf-8?q?5egEoQbGGH8MAvVPztq++xhz2n1pEBaumlTM0DLelM++ACEMAZxBxKAIP7w5f98Ft?=\n\t=?utf-8?q?Ig23ggKsXAqMtE069fRDjjfcUmyCbs31WDEL+/WGRV5xFSiRq0hQFQVAw+ameci51?=\n\t=?utf-8?q?VVWc8Vrxfdj0T9fkVjKtAGvkDWp9DHnjKwPYSR8W9/hE6Y9FR3S/+mT5ROkS5fw+4?=\n\t=?utf-8?q?ZkxXswJmSSvtUGtfz1A6spS3F041vwhhTiFF5pTI8eHCYvTL7mtw9iM+UwrtLbN89?=\n\t=?utf-8?q?zOkdOUMg71zwTXBeBSwpu1h0vpr+ula3lb733J2P+1e86nly8z8TP7azDScD2FI7s?=\n\t=?utf-8?q?6uuQ0a3+6vZ9uOmYgmTXdx4sZTITLqzYZAkJOe9ebk35EzDNEUPghifhlXouXMg8N?=\n\t=?utf-8?q?d72u5HN1u4vNB+n2L1FZNmtKtZddqbR4VoLLJ77vI/NMfTcP6cAlA1kdiGZ/PtRKY?=\n\t=?utf-8?q?dde7T6+2di4RzIwx4PeBpzD4Qi4X353FyZo7sT8ZOJxh7rDcOjErTtIbdnBsLgJJx?=\n\t=?utf-8?q?UCfR2w7TQqGROCOd/tAxWD69gdBcWhkO4r7drEM+pLvcqy0Zti+JfvljzgJUKYbjA?=\n\t=?utf-8?q?MMjXtNKfU3m49L4M+YvbxvtG4AT/dvPqv0MYHgUq0P+s0+gvcV8yGypjSdYBboVA0?=\n\t=?utf-8?q?vbsLB5hDDpkD4GV57ay4CfHpZ2aMnUVLgU54LCIloXOda4To3DqHURBha9W5irULp?=\n\t=?utf-8?q?P9UrpEIVPu2T7ZDHnfuAgc7Lh/Zg9YzLzOw4j334zIxksCNjKxLizd0QHupSKeUM5?=\n\t=?utf-8?q?L8V1h7c1hnGv7PdK3e5MwrRoSPTC90vBhpEy2w1/yiGsX13NqF1s1q9RHOy0yTPFV?=\n\t=?utf-8?q?URUc5z0fodSF3GqHiexLR38jSR5845Wq+FkJcs6S8157AGMyrZPTALNyIBo5Ytc6s?=\n\t=?utf-8?q?haiRFhLMz5vCMMRPKHaKWkR/J7GcN/k3yTST4DgfcStWCiUzPJxfixdP5jdX+VqYW?=\n\t=?utf-8?q?yOPPOIkunEtcWwhqPXUtn5/fQfPiaHEy9LB8aO1o0Kb6y5ivVBBZKvipwwG0kdAHe?=\n\t=?utf-8?q?MBVNClHDgLncgauB0ZxuQRjhAVix+amylQgXpkm8DSVwumvk3HVCIjSsR1LMzpJ42?=\n\t=?utf-8?q?l4w4OiWTQ1S4hNUCb/wstQxuM2KNxVB/ONxBtjrltIUMG36tzfMNdg7vIy4lB8aos?=\n\t=?utf-8?q?lmmPe+O618GL+V1+GrJpH64MdO4BOEyJzA=3D=3D?=", "X-OriginatorOrg": "corigine.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 146b6456-5132-4ec7-5d8f-08dbb5cc8055", "X-MS-Exchange-CrossTenant-AuthSource": "SJ0PR13MB5545.namprd13.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "15 Sep 2023 09:16:56.6860 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "fe128f2c-073b-4c20-818e-7246a585940c", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n dQZ7BjsP2oYhkEbmcF/i1qK+MuNyKDZ9KhwsBETP4vQghgY+yCdyfrRD57YttFTIlkql/4lpei+a8KuRFEZl5m1BHENagZZhqqnUSCKPTZc=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CO1PR13MB4773", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Move the definition of data structure into the implement file.\nAlso sync the logic from kernel driver and remove the unneeded header\nfile include statements.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nReviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>\n---\n drivers/net/nfp/nfp_ethdev.c | 2 +-\n drivers/net/nfp/nfpcore/nfp_nsp.c | 390 +++++++++++++++++++------\n drivers/net/nfp/nfpcore/nfp_nsp.h | 140 ++++-----\n drivers/net/nfp/nfpcore/nfp_nsp_cmds.c | 4 -\n drivers/net/nfp/nfpcore/nfp_nsp_eth.c | 79 ++---\n 5 files changed, 398 insertions(+), 217 deletions(-)", "diff": "diff --git a/drivers/net/nfp/nfp_ethdev.c b/drivers/net/nfp/nfp_ethdev.c\nindex 2e43055fd5..9243191de3 100644\n--- a/drivers/net/nfp/nfp_ethdev.c\n+++ b/drivers/net/nfp/nfp_ethdev.c\n@@ -661,7 +661,7 @@ nfp_net_init(struct rte_eth_dev *eth_dev)\n static int\n nfp_fw_upload(struct rte_pci_device *dev, struct nfp_nsp *nsp, char *card)\n {\n-\tstruct nfp_cpp *cpp = nsp->cpp;\n+\tstruct nfp_cpp *cpp = nfp_nsp_cpp(nsp);\n \tvoid *fw_buf;\n \tchar fw_name[125];\n \tchar serial[40];\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nsp.c b/drivers/net/nfp/nfpcore/nfp_nsp.c\nindex 8e65064b10..75d13cb84f 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nsp.c\n+++ b/drivers/net/nfp/nfpcore/nfp_nsp.c\n@@ -3,20 +3,127 @@\n * All rights reserved.\n */\n \n-#define NFP_SUBSYS \"nfp_nsp\"\n-\n-#include <stdio.h>\n-#include <time.h>\n+#include \"nfp_nsp.h\"\n \n #include <rte_common.h>\n \n-#include \"nfp_cpp.h\"\n #include \"nfp_logs.h\"\n-#include \"nfp_nsp.h\"\n #include \"nfp_platform.h\"\n #include \"nfp_resource.h\"\n \n-int\n+/* Offsets relative to the CSR base */\n+#define NSP_STATUS 0x00\n+#define NSP_STATUS_MAGIC GENMASK_ULL(63, 48)\n+#define NSP_STATUS_MAJOR GENMASK_ULL(47, 44)\n+#define NSP_STATUS_MINOR GENMASK_ULL(43, 32)\n+#define NSP_STATUS_CODE GENMASK_ULL(31, 16)\n+#define NSP_STATUS_RESULT GENMASK_ULL(15, 8)\n+#define NSP_STATUS_BUSY RTE_BIT64(0)\n+\n+#define NSP_COMMAND 0x08\n+#define NSP_COMMAND_OPTION GENMASK_ULL(63, 32)\n+#define NSP_COMMAND_CODE GENMASK_ULL(31, 16)\n+#define NSP_COMMAND_DMA_BUF RTE_BIT64(1)\n+#define NSP_COMMAND_START RTE_BIT64(0)\n+\n+/* CPP address to retrieve the data from */\n+#define NSP_BUFFER 0x10\n+#define NSP_BUFFER_CPP GENMASK_ULL(63, 40)\n+#define NSP_BUFFER_ADDRESS GENMASK_ULL(39, 0)\n+\n+#define NSP_DFLT_BUFFER 0x18\n+#define NSP_DFLT_BUFFER_CPP GENMASK_ULL(63, 40)\n+#define NSP_DFLT_BUFFER_ADDRESS GENMASK_ULL(39, 0)\n+\n+#define NSP_DFLT_BUFFER_CONFIG 0x20\n+#define NSP_DFLT_BUFFER_SIZE_4KB GENMASK_ULL(15, 8)\n+#define NSP_DFLT_BUFFER_SIZE_MB GENMASK_ULL(7, 0)\n+\n+#define NSP_MAGIC 0xab10\n+#define NSP_MAJOR 0\n+#define NSP_MINOR 8\n+\n+#define NSP_CODE_MAJOR GENMASK_ULL(15, 12)\n+#define NSP_CODE_MINOR GENMASK_ULL(11, 0)\n+\n+#define NFP_FW_LOAD_RET_MAJOR GENMASK_ULL(15, 8)\n+#define NFP_FW_LOAD_RET_MINOR GENMASK_ULL(23, 16)\n+\n+enum nfp_nsp_cmd {\n+\tSPCODE_NOOP = 0, /* No operation */\n+\tSPCODE_SOFT_RESET = 1, /* Soft reset the NFP */\n+\tSPCODE_FW_DEFAULT = 2, /* Load default (UNDI) FW */\n+\tSPCODE_PHY_INIT = 3, /* Initialize the PHY */\n+\tSPCODE_MAC_INIT = 4, /* Initialize the MAC */\n+\tSPCODE_PHY_RXADAPT = 5, /* Re-run PHY RX Adaptation */\n+\tSPCODE_FW_LOAD = 6, /* Load fw from buffer, len in option */\n+\tSPCODE_ETH_RESCAN = 7, /* Rescan ETHs, write ETH_TABLE to buf */\n+\tSPCODE_ETH_CONTROL = 8, /* Update media config from buffer */\n+\tSPCODE_NSP_WRITE_FLASH = 11, /* Load and flash image from buffer */\n+\tSPCODE_NSP_SENSORS = 12, /* Read NSP sensor(s) */\n+\tSPCODE_NSP_IDENTIFY = 13, /* Read NSP version */\n+\tSPCODE_FW_STORED = 16, /* If no FW loaded, load flash app FW */\n+\tSPCODE_HWINFO_LOOKUP = 17, /* Lookup HWinfo with overwrites etc. */\n+\tSPCODE_HWINFO_SET = 18, /* Set HWinfo entry */\n+\tSPCODE_FW_LOADED = 19, /* Is application firmware loaded */\n+\tSPCODE_VERSIONS = 21, /* Report FW versions */\n+\tSPCODE_READ_SFF_EEPROM = 22, /* Read module EEPROM */\n+\tSPCODE_READ_MEDIA = 23, /* Get the supported/advertised media for a port */\n+};\n+\n+static const struct {\n+\tuint32_t code;\n+\tconst char *msg;\n+} nsp_errors[] = {\n+\t{ 6010, \"could not map to phy for port\" },\n+\t{ 6011, \"not an allowed rate/lanes for port\" },\n+\t{ 6012, \"not an allowed rate/lanes for port\" },\n+\t{ 6013, \"high/low error, change other port first\" },\n+\t{ 6014, \"config not found in flash\" },\n+};\n+\n+struct nfp_nsp {\n+\tstruct nfp_cpp *cpp;\n+\tstruct nfp_resource *res;\n+\tstruct {\n+\t\tuint16_t major;\n+\t\tuint16_t minor;\n+\t} ver;\n+\n+\t/** Eth table config state */\n+\tbool modified;\n+\tuint32_t idx;\n+\tvoid *entries;\n+};\n+\n+/* NFP command argument structure */\n+struct nfp_nsp_command_arg {\n+\tuint16_t code; /**< NFP SP Command Code */\n+\tbool dma; /**< @buf points to a host buffer, not NSP buffer */\n+\tbool error_quiet; /**< Don't print command error/warning */\n+\tuint32_t timeout_sec; /**< Timeout value to wait for completion in seconds */\n+\tuint32_t option; /**< NSP Command Argument */\n+\tuint64_t buf; /**< NSP Buffer Address */\n+\t/** Callback for interpreting option if error occurred */\n+\tvoid (*error_cb)(struct nfp_nsp *state, uint32_t ret_val);\n+};\n+\n+/* NFP command with buffer argument structure */\n+struct nfp_nsp_command_buf_arg {\n+\tstruct nfp_nsp_command_arg arg; /**< NFP command argument structure */\n+\tconst void *in_buf; /**< Buffer with data for input */\n+\tvoid *out_buf; /**< Buffer for output data */\n+\tuint32_t in_size; /**< Size of @in_buf */\n+\tuint32_t out_size; /**< Size of @out_buf */\n+};\n+\n+struct nfp_cpp *\n+nfp_nsp_cpp(struct nfp_nsp *state)\n+{\n+\treturn state->cpp;\n+}\n+\n+bool\n nfp_nsp_config_modified(struct nfp_nsp *state)\n {\n \treturn state->modified;\n@@ -24,7 +131,7 @@ nfp_nsp_config_modified(struct nfp_nsp *state)\n \n void\n nfp_nsp_config_set_modified(struct nfp_nsp *state,\n-\t\tint modified)\n+\t\tbool modified)\n {\n \tstate->modified = modified;\n }\n@@ -66,7 +173,7 @@ nfp_nsp_print_extended_error(uint32_t ret_val)\n \t\treturn;\n \n \tfor (i = 0; i < RTE_DIM(nsp_errors); i++)\n-\t\tif (ret_val == (uint32_t)nsp_errors[i].code)\n+\t\tif (ret_val == nsp_errors[i].code)\n \t\t\tPMD_DRV_LOG(ERR, \"err msg: %s\", nsp_errors[i].msg);\n }\n \n@@ -222,11 +329,8 @@ nfp_nsp_wait_reg(struct nfp_cpp *cpp,\n * - -ETIMEDOUT if the NSP took longer than @timeout_sec seconds to complete\n */\n static int\n-nfp_nsp_command(struct nfp_nsp *state,\n-\t\tuint16_t code,\n-\t\tuint32_t option,\n-\t\tuint32_t buff_cpp,\n-\t\tuint64_t buff_addr)\n+nfp_nsp_command_real(struct nfp_nsp *state,\n+\t\tconst struct nfp_nsp_command_arg *arg)\n {\n \tint err;\n \tuint64_t reg;\n@@ -250,22 +354,14 @@ nfp_nsp_command(struct nfp_nsp *state,\n \t\treturn err;\n \t}\n \n-\tif (!FIELD_FIT(NSP_BUFFER_CPP, buff_cpp >> 8) ||\n-\t\t\t!FIELD_FIT(NSP_BUFFER_ADDRESS, buff_addr)) {\n-\t\tPMD_DRV_LOG(ERR, \"Host buffer out of reach %08x %\" PRIx64,\n-\t\t\t\tbuff_cpp, buff_addr);\n-\t\treturn -EINVAL;\n-\t}\n-\n-\terr = nfp_cpp_writeq(cpp, nsp_cpp, nsp_buffer,\n-\t\t\tFIELD_PREP(NSP_BUFFER_CPP, buff_cpp >> 8) |\n-\t\t\tFIELD_PREP(NSP_BUFFER_ADDRESS, buff_addr));\n+\terr = nfp_cpp_writeq(cpp, nsp_cpp, nsp_buffer, arg->buf);\n \tif (err < 0)\n \t\treturn err;\n \n \terr = nfp_cpp_writeq(cpp, nsp_cpp, nsp_command,\n-\t\t\tFIELD_PREP(NSP_COMMAND_OPTION, option) |\n-\t\t\tFIELD_PREP(NSP_COMMAND_CODE, code) |\n+\t\t\tFIELD_PREP(NSP_COMMAND_OPTION, arg->option) |\n+\t\t\tFIELD_PREP(NSP_COMMAND_CODE, arg->code) |\n+\t\t\tFIELD_PREP(NSP_COMMAND_DMA_BUF, arg->dma) |\n \t\t\tFIELD_PREP(NSP_COMMAND_START, 1));\n \tif (err < 0)\n \t\treturn err;\n@@ -275,7 +371,7 @@ nfp_nsp_command(struct nfp_nsp *state,\n \t\t\tNSP_COMMAND_START, 0);\n \tif (err != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Error %d waiting for code %#04x to start\",\n-\t\t\t\terr, code);\n+\t\t\t\terr, arg->code);\n \t\treturn err;\n \t}\n \n@@ -284,7 +380,7 @@ nfp_nsp_command(struct nfp_nsp *state,\n \t\t\tNSP_STATUS_BUSY, 0);\n \tif (err != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Error %d waiting for code %#04x to complete\",\n-\t\t\t\terr, code);\n+\t\t\t\terr, arg->code);\n \t\treturn err;\n \t}\n \n@@ -296,84 +392,85 @@ nfp_nsp_command(struct nfp_nsp *state,\n \n \terr = FIELD_GET(NSP_STATUS_RESULT, reg);\n \tif (err != 0) {\n-\t\tPMD_DRV_LOG(ERR, \"Result (error) code set: %d (%d) command: %d\",\n-\t\t\t\t-err, (int)ret_val, code);\n-\t\tnfp_nsp_print_extended_error(ret_val);\n+\t\tif (!arg->error_quiet)\n+\t\t\tPMD_DRV_LOG(WARNING, \"Result (error) code set: %d (%d) command: %d\",\n+\t\t\t\t\t-err, (int)ret_val, arg->code);\n+\n+\t\tif (arg->error_cb != 0)\n+\t\t\targ->error_cb(state, ret_val);\n+\t\telse\n+\t\t\tnfp_nsp_print_extended_error(ret_val);\n+\n \t\treturn -err;\n \t}\n \n \treturn ret_val;\n }\n \n-#define SZ_1M 0x00100000\n+static int\n+nfp_nsp_command(struct nfp_nsp *state,\n+\t\tuint16_t code)\n+{\n+\tconst struct nfp_nsp_command_arg arg = {\n+\t\t.code = code,\n+\t};\n+\n+\treturn nfp_nsp_command_real(state, &arg);\n+}\n \n static int\n-nfp_nsp_command_buf(struct nfp_nsp *nsp,\n-\t\tuint16_t code, uint32_t option,\n-\t\tconst void *in_buf,\n-\t\tunsigned int in_size,\n-\t\tvoid *out_buf,\n-\t\tunsigned int out_size)\n+nfp_nsp_command_buf_def(struct nfp_nsp *nsp,\n+\t\tstruct nfp_nsp_command_buf_arg *arg)\n {\n \tint err;\n \tint ret;\n \tuint64_t reg;\n-\tsize_t max_size;\n \tuint32_t cpp_id;\n \tuint64_t cpp_buf;\n \tstruct nfp_cpp *cpp = nsp->cpp;\n \n-\tif (nsp->ver.minor < 13) {\n-\t\tPMD_DRV_LOG(ERR, \"NSP: Code 0x%04x with buffer not supported ABI %hu.%hu)\",\n-\t\t\t\tcode, nsp->ver.major, nsp->ver.minor);\n-\t\treturn -EOPNOTSUPP;\n-\t}\n-\n-\terr = nfp_cpp_readq(cpp, nfp_resource_cpp_id(nsp->res),\n-\t\t\tnfp_resource_address(nsp->res) + NSP_DFLT_BUFFER_CONFIG,\n-\t\t\t®);\n-\tif (err < 0)\n-\t\treturn err;\n-\n-\tmax_size = RTE_MAX(in_size, out_size);\n-\tif (FIELD_GET(NSP_DFLT_BUFFER_SIZE_MB, reg) * SZ_1M < max_size) {\n-\t\tPMD_DRV_LOG(ERR, \"NSP: default buffer too small for command 0x%04x (%llu < %lu)\",\n-\t\t\t\tcode, FIELD_GET(NSP_DFLT_BUFFER_SIZE_MB, reg) * SZ_1M, max_size);\n-\t\treturn -EINVAL;\n-\t}\n-\n \terr = nfp_cpp_readq(cpp, nfp_resource_cpp_id(nsp->res),\n \t\t\tnfp_resource_address(nsp->res) + NSP_DFLT_BUFFER,\n \t\t\t®);\n \tif (err < 0)\n \t\treturn err;\n \n-\tcpp_id = FIELD_GET(NSP_BUFFER_CPP, reg) << 8;\n-\tcpp_buf = FIELD_GET(NSP_BUFFER_ADDRESS, reg);\n+\tcpp_id = FIELD_GET(NSP_DFLT_BUFFER_CPP, reg) << 8;\n+\tcpp_buf = FIELD_GET(NSP_DFLT_BUFFER_ADDRESS, reg);\n \n-\tif (in_buf != NULL && in_size > 0) {\n-\t\terr = nfp_cpp_write(cpp, cpp_id, cpp_buf, in_buf, in_size);\n+\tif (arg->in_buf != NULL && arg->in_size > 0) {\n+\t\terr = nfp_cpp_write(cpp, cpp_id, cpp_buf,\n+\t\t\t\targ->in_buf, arg->in_size);\n \t\tif (err < 0)\n \t\t\treturn err;\n \t}\n \n \t/* Zero out remaining part of the buffer */\n-\tif (out_buf != NULL && out_size > 0 && out_size > in_size) {\n-\t\tmemset(out_buf, 0, out_size - in_size);\n-\t\terr = nfp_cpp_write(cpp, cpp_id, cpp_buf + in_size, out_buf,\n-\t\t\t\tout_size - in_size);\n+\tif (arg->out_buf != NULL && arg->out_size > arg->in_size) {\n+\t\terr = nfp_cpp_write(cpp, cpp_id, cpp_buf + arg->in_size,\n+\t\t\t\targ->out_buf, arg->out_size - arg->in_size);\n \t\tif (err < 0)\n \t\t\treturn err;\n \t}\n \n-\tret = nfp_nsp_command(nsp, code, option, cpp_id, cpp_buf);\n+\tif (!FIELD_FIT(NSP_BUFFER_CPP, cpp_id >> 8) ||\n+\t\t\t!FIELD_FIT(NSP_BUFFER_ADDRESS, cpp_buf)) {\n+\t\tPMD_DRV_LOG(ERR, \"Buffer out of reach %#08x %#016lx\",\n+\t\t\t\tcpp_id, cpp_buf);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\targ->arg.buf = FIELD_PREP(NSP_BUFFER_CPP, cpp_id >> 8) |\n+\t\t\tFIELD_PREP(NSP_BUFFER_ADDRESS, cpp_buf);\n+\tret = nfp_nsp_command_real(nsp, &arg->arg);\n \tif (ret < 0) {\n \t\tPMD_DRV_LOG(ERR, \"NSP command failed\");\n \t\treturn ret;\n \t}\n \n-\tif (out_buf != NULL && out_size > 0) {\n-\t\terr = nfp_cpp_read(cpp, cpp_id, cpp_buf, out_buf, out_size);\n+\tif (arg->out_buf != NULL && arg->out_size > 0) {\n+\t\terr = nfp_cpp_read(cpp, cpp_id, cpp_buf,\n+\t\t\t\targ->out_buf, arg->out_size);\n \t\tif (err < 0)\n \t\t\treturn err;\n \t}\n@@ -381,6 +478,43 @@ nfp_nsp_command_buf(struct nfp_nsp *nsp,\n \treturn ret;\n }\n \n+#define SZ_1M 0x00100000\n+#define SZ_4K 0x00001000\n+\n+static int\n+nfp_nsp_command_buf(struct nfp_nsp *nsp,\n+\t\tstruct nfp_nsp_command_buf_arg *arg)\n+{\n+\tint err;\n+\tuint64_t reg;\n+\tuint32_t size;\n+\tuint32_t max_size;\n+\tstruct nfp_cpp *cpp = nsp->cpp;\n+\n+\tif (nsp->ver.minor < 13) {\n+\t\tPMD_DRV_LOG(ERR, \"NSP: Code %#04x with buffer not supported ABI %hu.%hu)\",\n+\t\t\t\targ->arg.code, nsp->ver.major, nsp->ver.minor);\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\terr = nfp_cpp_readq(cpp, nfp_resource_cpp_id(nsp->res),\n+\t\t\tnfp_resource_address(nsp->res) + NSP_DFLT_BUFFER_CONFIG,\n+\t\t\t®);\n+\tif (err < 0)\n+\t\treturn err;\n+\n+\tmax_size = RTE_MAX(arg->in_size, arg->out_size);\n+\tsize = FIELD_GET(NSP_DFLT_BUFFER_SIZE_MB, reg) * SZ_1M +\n+\t\t\tFIELD_GET(NSP_DFLT_BUFFER_SIZE_4KB, reg) * SZ_4K;\n+\tif (size < max_size) {\n+\t\tPMD_DRV_LOG(ERR, \"NSP: default buffer too small for command %#04x (%u < %u)\",\n+\t\t\t\targ->arg.code, size, max_size);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn nfp_nsp_command_buf_def(nsp, arg);\n+}\n+\n int\n nfp_nsp_wait(struct nfp_nsp *state)\n {\n@@ -392,7 +526,7 @@ nfp_nsp_wait(struct nfp_nsp *state)\n \twait.tv_nsec = 25000000; /* 25ms */\n \n \tfor (;;) {\n-\t\terr = nfp_nsp_command(state, SPCODE_NOOP, 0, 0, 0);\n+\t\terr = nfp_nsp_command(state, SPCODE_NOOP);\n \t\tif (err != -EAGAIN)\n \t\t\tbreak;\n \n@@ -413,13 +547,57 @@ nfp_nsp_wait(struct nfp_nsp *state)\n int\n nfp_nsp_device_soft_reset(struct nfp_nsp *state)\n {\n-\treturn nfp_nsp_command(state, SPCODE_SOFT_RESET, 0, 0, 0);\n+\treturn nfp_nsp_command(state, SPCODE_SOFT_RESET);\n }\n \n int\n nfp_nsp_mac_reinit(struct nfp_nsp *state)\n {\n-\treturn nfp_nsp_command(state, SPCODE_MAC_INIT, 0, 0, 0);\n+\treturn nfp_nsp_command(state, SPCODE_MAC_INIT);\n+}\n+\n+static void\n+nfp_nsp_load_fw_extended_msg(struct nfp_nsp *state,\n+\t\tuint32_t ret_val)\n+{\n+\tuint32_t minor;\n+\tuint32_t major;\n+\tstatic const char * const major_msg[] = {\n+\t\t/* 0 */ \"Firmware from driver loaded\",\n+\t\t/* 1 */ \"Firmware from flash loaded\",\n+\t\t/* 2 */ \"Firmware loading failure\",\n+\t};\n+\tstatic const char * const minor_msg[] = {\n+\t\t/* 0 */ \"\",\n+\t\t/* 1 */ \"no named partition on flash\",\n+\t\t/* 2 */ \"error reading from flash\",\n+\t\t/* 3 */ \"can not deflate\",\n+\t\t/* 4 */ \"not a trusted file\",\n+\t\t/* 5 */ \"can not parse FW file\",\n+\t\t/* 6 */ \"MIP not found in FW file\",\n+\t\t/* 7 */ \"null firmware name in MIP\",\n+\t\t/* 8 */ \"FW version none\",\n+\t\t/* 9 */ \"FW build number none\",\n+\t\t/* 10 */ \"no FW selection policy HWInfo key found\",\n+\t\t/* 11 */ \"static FW selection policy\",\n+\t\t/* 12 */ \"FW version has precedence\",\n+\t\t/* 13 */ \"different FW application load requested\",\n+\t\t/* 14 */ \"development build\",\n+\t};\n+\n+\tmajor = FIELD_GET(NFP_FW_LOAD_RET_MAJOR, ret_val);\n+\tminor = FIELD_GET(NFP_FW_LOAD_RET_MINOR, ret_val);\n+\n+\tif (!nfp_nsp_has_stored_fw_load(state))\n+\t\treturn;\n+\n+\tif (major >= RTE_DIM(major_msg))\n+\t\tPMD_DRV_LOG(INFO, \"FW loading status: %x\", ret_val);\n+\telse if (minor >= RTE_DIM(minor_msg))\n+\t\tPMD_DRV_LOG(INFO, \"%s, reason code: %d\", major_msg[major], minor);\n+\telse\n+\t\tPMD_DRV_LOG(INFO, \"%s%c %s\", major_msg[major],\n+\t\t\t\tminor != 0 ? ',' : '.', minor_msg[minor]);\n }\n \n int\n@@ -427,8 +605,24 @@ nfp_nsp_load_fw(struct nfp_nsp *state,\n \t\tvoid *buf,\n \t\tsize_t size)\n {\n-\treturn nfp_nsp_command_buf(state, SPCODE_FW_LOAD, size, buf, size,\n-\t\t\tNULL, 0);\n+\tint ret;\n+\tstruct nfp_nsp_command_buf_arg load_fw = {\n+\t\t{\n+\t\t\t.code = SPCODE_FW_LOAD,\n+\t\t\t.option = size,\n+\t\t\t.error_cb = nfp_nsp_load_fw_extended_msg,\n+\t\t},\n+\t\t.in_buf = buf,\n+\t\t.in_size = size,\n+\t};\n+\n+\tret = nfp_nsp_command_buf(state, &load_fw);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\tnfp_nsp_load_fw_extended_msg(state, ret);\n+\n+\treturn 0;\n }\n \n int\n@@ -436,8 +630,16 @@ nfp_nsp_read_eth_table(struct nfp_nsp *state,\n \t\tvoid *buf,\n \t\tsize_t size)\n {\n-\treturn nfp_nsp_command_buf(state, SPCODE_ETH_RESCAN, size, NULL, 0,\n-\t\t\tbuf, size);\n+\tstruct nfp_nsp_command_buf_arg eth_rescan = {\n+\t\t{\n+\t\t\t.code = SPCODE_ETH_RESCAN,\n+\t\t\t.option = size,\n+\t\t},\n+\t\t.out_buf = buf,\n+\t\t.out_size = size,\n+\t};\n+\n+\treturn nfp_nsp_command_buf(state, ð_rescan);\n }\n \n int\n@@ -445,8 +647,16 @@ nfp_nsp_write_eth_table(struct nfp_nsp *state,\n \t\tconst void *buf,\n \t\tsize_t size)\n {\n-\treturn nfp_nsp_command_buf(state, SPCODE_ETH_CONTROL, size, buf, size,\n-\t\t\tNULL, 0);\n+\tstruct nfp_nsp_command_buf_arg eth_ctrl = {\n+\t\t{\n+\t\t\t.code = SPCODE_ETH_CONTROL,\n+\t\t\t.option = size,\n+\t\t},\n+\t\t.in_buf = buf,\n+\t\t.in_size = size,\n+\t};\n+\n+\treturn nfp_nsp_command_buf(state, ð_ctrl);\n }\n \n int\n@@ -454,8 +664,16 @@ nfp_nsp_read_identify(struct nfp_nsp *state,\n \t\tvoid *buf,\n \t\tsize_t size)\n {\n-\treturn nfp_nsp_command_buf(state, SPCODE_NSP_IDENTIFY, size, NULL, 0,\n-\t\t\tbuf, size);\n+\tstruct nfp_nsp_command_buf_arg identify = {\n+\t\t{\n+\t\t\t.code = SPCODE_NSP_IDENTIFY,\n+\t\t\t.option = size,\n+\t\t},\n+\t\t.out_buf = buf,\n+\t\t.out_size = size,\n+\t};\n+\n+\treturn nfp_nsp_command_buf(state, &identify);\n }\n \n int\n@@ -464,6 +682,14 @@ nfp_nsp_read_sensors(struct nfp_nsp *state,\n \t\tvoid *buf,\n \t\tsize_t size)\n {\n-\treturn nfp_nsp_command_buf(state, SPCODE_NSP_SENSORS, sensor_mask, NULL,\n-\t\t\t0, buf, size);\n+\tstruct nfp_nsp_command_buf_arg sensors = {\n+\t\t{\n+\t\t\t.code = SPCODE_NSP_SENSORS,\n+\t\t\t.option = sensor_mask,\n+\t\t},\n+\t\t.out_buf = buf,\n+\t\t.out_size = size,\n+\t};\n+\n+\treturn nfp_nsp_command_buf(state, &sensors);\n }\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nsp.h b/drivers/net/nfp/nfpcore/nfp_nsp.h\nindex 14986a9130..fe52dffeb7 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nsp.h\n+++ b/drivers/net/nfp/nfpcore/nfp_nsp.h\n@@ -7,78 +7,8 @@\n #define __NSP_NSP_H__\n \n #include \"nfp_cpp.h\"\n-#include \"nfp_nsp.h\"\n-\n-/* Offsets relative to the CSR base */\n-#define NSP_STATUS 0x00\n-#define NSP_STATUS_MAGIC GENMASK_ULL(63, 48)\n-#define NSP_STATUS_MAJOR GENMASK_ULL(47, 44)\n-#define NSP_STATUS_MINOR GENMASK_ULL(43, 32)\n-#define NSP_STATUS_CODE GENMASK_ULL(31, 16)\n-#define NSP_STATUS_RESULT GENMASK_ULL(15, 8)\n-#define NSP_STATUS_BUSY RTE_BIT64(0)\n-\n-#define NSP_COMMAND 0x08\n-#define NSP_COMMAND_OPTION GENMASK_ULL(63, 32)\n-#define NSP_COMMAND_CODE GENMASK_ULL(31, 16)\n-#define NSP_COMMAND_START RTE_BIT64(0)\n-\n-/* CPP address to retrieve the data from */\n-#define NSP_BUFFER 0x10\n-#define NSP_BUFFER_CPP GENMASK_ULL(63, 40)\n-#define NSP_BUFFER_PCIE GENMASK_ULL(39, 38)\n-#define NSP_BUFFER_ADDRESS GENMASK_ULL(37, 0)\n-\n-#define NSP_DFLT_BUFFER 0x18\n-\n-#define NSP_DFLT_BUFFER_CONFIG 0x20\n-#define NSP_DFLT_BUFFER_SIZE_MB GENMASK_ULL(7, 0)\n-\n-#define NSP_MAGIC 0xab10\n-#define NSP_MAJOR 0\n-#define NSP_MINOR 8\n-\n-#define NSP_CODE_MAJOR GENMASK(15, 12)\n-#define NSP_CODE_MINOR GENMASK(11, 0)\n-\n-enum nfp_nsp_cmd {\n-\tSPCODE_NOOP = 0, /* No operation */\n-\tSPCODE_SOFT_RESET = 1, /* Soft reset the NFP */\n-\tSPCODE_FW_DEFAULT = 2, /* Load default (UNDI) FW */\n-\tSPCODE_PHY_INIT = 3, /* Initialize the PHY */\n-\tSPCODE_MAC_INIT = 4, /* Initialize the MAC */\n-\tSPCODE_PHY_RXADAPT = 5, /* Re-run PHY RX Adaptation */\n-\tSPCODE_FW_LOAD = 6, /* Load fw from buffer, len in option */\n-\tSPCODE_ETH_RESCAN = 7, /* Rescan ETHs, write ETH_TABLE to buf */\n-\tSPCODE_ETH_CONTROL = 8, /* Update media config from buffer */\n-\tSPCODE_NSP_SENSORS = 12, /* Read NSP sensor(s) */\n-\tSPCODE_NSP_IDENTIFY = 13, /* Read NSP version */\n-};\n-\n-static const struct {\n-\tint code;\n-\tconst char *msg;\n-} nsp_errors[] = {\n-\t{ 6010, \"could not map to phy for port\" },\n-\t{ 6011, \"not an allowed rate/lanes for port\" },\n-\t{ 6012, \"not an allowed rate/lanes for port\" },\n-\t{ 6013, \"high/low error, change other port first\" },\n-\t{ 6014, \"config not found in flash\" },\n-};\n \n-struct nfp_nsp {\n-\tstruct nfp_cpp *cpp;\n-\tstruct nfp_resource *res;\n-\tstruct {\n-\t\tuint16_t major;\n-\t\tuint16_t minor;\n-\t} ver;\n-\n-\t/* Eth table config state */\n-\tint modified;\n-\tunsigned int idx;\n-\tvoid *entries;\n-};\n+struct nfp_nsp;\n \n struct nfp_nsp *nfp_nsp_open(struct nfp_cpp *cpp);\n void nfp_nsp_close(struct nfp_nsp *state);\n@@ -92,18 +22,61 @@ int nfp_nsp_read_identify(struct nfp_nsp *state, void *buf, size_t size);\n int nfp_nsp_read_sensors(struct nfp_nsp *state, uint32_t sensor_mask,\n \t\tvoid *buf, size_t size);\n \n-static inline int\n+static inline bool\n nfp_nsp_has_mac_reinit(struct nfp_nsp *state)\n {\n \treturn nfp_nsp_get_abi_ver_minor(state) > 20;\n }\n \n+static inline bool\n+nfp_nsp_has_stored_fw_load(struct nfp_nsp *state)\n+{\n+\treturn nfp_nsp_get_abi_ver_minor(state) > 23;\n+}\n+\n+static inline bool\n+nfp_nsp_has_hwinfo_lookup(struct nfp_nsp *state)\n+{\n+\treturn nfp_nsp_get_abi_ver_minor(state) > 24;\n+}\n+\n+static inline bool\n+nfp_nsp_has_hwinfo_set(struct nfp_nsp *state)\n+{\n+\treturn nfp_nsp_get_abi_ver_minor(state) > 25;\n+}\n+\n+static inline bool\n+nfp_nsp_has_fw_loaded(struct nfp_nsp *state)\n+{\n+\treturn nfp_nsp_get_abi_ver_minor(state) > 25;\n+}\n+\n+static inline bool\n+nfp_nsp_has_versions(struct nfp_nsp *state)\n+{\n+\treturn nfp_nsp_get_abi_ver_minor(state) > 27;\n+}\n+\n+static inline bool\n+nfp_nsp_has_read_module_eeprom(struct nfp_nsp *state)\n+{\n+\treturn nfp_nsp_get_abi_ver_minor(state) > 28;\n+}\n+\n+static inline bool\n+nfp_nsp_has_read_media(struct nfp_nsp *state)\n+{\n+\treturn nfp_nsp_get_abi_ver_minor(state) > 33;\n+}\n+\n enum nfp_eth_interface {\n \tNFP_INTERFACE_NONE = 0,\n \tNFP_INTERFACE_SFP = 1,\n \tNFP_INTERFACE_SFPP = 10,\n \tNFP_INTERFACE_SFP28 = 28,\n \tNFP_INTERFACE_QSFP = 40,\n+\tNFP_INTERFACE_RJ45 = 45,\n \tNFP_INTERFACE_CXP = 100,\n \tNFP_INTERFACE_QSFP28 = 112,\n };\n@@ -151,6 +124,7 @@ struct nfp_eth_table {\n \t\tenum nfp_eth_media media; /**< Media type of the @interface */\n \n \t\tenum nfp_eth_fec fec; /**< Forward Error Correction mode */\n+\t\tenum nfp_eth_fec act_fec; /**< Active Forward Error Correction mode */\n \t\tenum nfp_eth_aneg aneg; /**< Auto negotiation mode */\n \n \t\tstruct rte_ether_addr mac_addr; /**< Interface MAC address */\n@@ -159,17 +133,18 @@ struct nfp_eth_table {\n \t\t/** Id of interface within port (for split ports) */\n \t\tuint8_t label_subport;\n \n-\t\tint enabled; /**< Enable port */\n-\t\tint tx_enabled; /**< Enable TX */\n-\t\tint rx_enabled; /**< Enable RX */\n+\t\tbool enabled; /**< Enable port */\n+\t\tbool tx_enabled; /**< Enable TX */\n+\t\tbool rx_enabled; /**< Enable RX */\n+\t\tbool supp_aneg; /**< Support auto negotiation */\n \n-\t\tint override_changed; /**< Media reconfig pending */\n+\t\tbool override_changed; /**< Media reconfig pending */\n \n \t\tuint8_t port_type; /**< One of %PORT_* */\n \t\t/** Sum of lanes of all subports of this port */\n \t\tuint32_t port_lanes;\n \n-\t\tint is_split; /**< Split port */\n+\t\tbool is_split; /**< Split port */\n \n \t\tuint32_t fec_modes_supported; /**< Bitmap of FEC modes supported */\n \t} ports[]; /**< Table of ports */\n@@ -177,8 +152,8 @@ struct nfp_eth_table {\n \n struct nfp_eth_table *nfp_eth_read_ports(struct nfp_cpp *cpp);\n \n-int nfp_eth_set_mod_enable(struct nfp_cpp *cpp, uint32_t idx, int enable);\n-int nfp_eth_set_configured(struct nfp_cpp *cpp, uint32_t idx, int configed);\n+int nfp_eth_set_mod_enable(struct nfp_cpp *cpp, uint32_t idx, bool enable);\n+int nfp_eth_set_configured(struct nfp_cpp *cpp, uint32_t idx, bool configured);\n int nfp_eth_set_fec(struct nfp_cpp *cpp, uint32_t idx, enum nfp_eth_fec mode);\n \n int nfp_nsp_read_eth_table(struct nfp_nsp *state, void *buf, size_t size);\n@@ -187,12 +162,13 @@ int nfp_nsp_write_eth_table(struct nfp_nsp *state, const void *buf,\n void nfp_nsp_config_set_state(struct nfp_nsp *state, void *entries,\n \t\tuint32_t idx);\n void nfp_nsp_config_clear_state(struct nfp_nsp *state);\n-void nfp_nsp_config_set_modified(struct nfp_nsp *state, int modified);\n+void nfp_nsp_config_set_modified(struct nfp_nsp *state, bool modified);\n void *nfp_nsp_config_entries(struct nfp_nsp *state);\n-int nfp_nsp_config_modified(struct nfp_nsp *state);\n+struct nfp_cpp *nfp_nsp_cpp(struct nfp_nsp *state);\n+bool nfp_nsp_config_modified(struct nfp_nsp *state);\n uint32_t nfp_nsp_config_idx(struct nfp_nsp *state);\n \n-static inline int\n+static inline bool\n nfp_eth_can_support_fec(struct nfp_eth_table_port *eth_port)\n {\n \treturn eth_port->fec_modes_supported != 0;\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c\nindex 429f639fa2..86956f4330 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c\n+++ b/drivers/net/nfp/nfpcore/nfp_nsp_cmds.c\n@@ -3,12 +3,8 @@\n * All rights reserved.\n */\n \n-#include <stdio.h>\n-#include <rte_byteorder.h>\n-#include \"nfp_cpp.h\"\n #include \"nfp_logs.h\"\n #include \"nfp_nsp.h\"\n-#include \"nfp_nffw.h\"\n \n struct nsp_identify {\n \tuint8_t version[40];\ndiff --git a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c\nindex dd17d0f5f6..90ecdaaa52 100644\n--- a/drivers/net/nfp/nfpcore/nfp_nsp_eth.c\n+++ b/drivers/net/nfp/nfpcore/nfp_nsp_eth.c\n@@ -3,10 +3,6 @@\n * All rights reserved.\n */\n \n-#include <stdio.h>\n-#include <rte_common.h>\n-#include <rte_byteorder.h>\n-#include \"nfp_cpp.h\"\n #include \"nfp_logs.h\"\n #include \"nfp_nsp.h\"\n #include \"nfp_platform.h\"\n@@ -21,6 +17,7 @@\n #define NSP_ETH_PORT_PHYLABEL GENMASK_ULL(59, 54)\n #define NSP_ETH_PORT_FEC_SUPP_BASER RTE_BIT64(60)\n #define NSP_ETH_PORT_FEC_SUPP_RS RTE_BIT64(61)\n+#define NSP_ETH_PORT_SUPP_ANEG RTE_BIT64(63)\n \n #define NSP_ETH_PORT_LANES_MASK rte_cpu_to_le_64(NSP_ETH_PORT_LANES)\n \n@@ -34,6 +31,7 @@\n #define NSP_ETH_STATE_OVRD_CHNG RTE_BIT64(22)\n #define NSP_ETH_STATE_ANEG GENMASK_ULL(25, 23)\n #define NSP_ETH_STATE_FEC GENMASK_ULL(27, 26)\n+#define NSP_ETH_STATE_ACT_FEC GENMASK_ULL(29, 28)\n \n #define NSP_ETH_CTRL_CONFIGURED RTE_BIT64(0)\n #define NSP_ETH_CTRL_ENABLED RTE_BIT64(1)\n@@ -54,26 +52,12 @@\n #define PORT_NONE 0xef\n #define PORT_OTHER 0xff\n \n-#define SPEED_10 10\n-#define SPEED_100 100\n-#define SPEED_1000 1000\n-#define SPEED_2500 2500\n-#define SPEED_5000 5000\n-#define SPEED_10000 10000\n-#define SPEED_14000 14000\n-#define SPEED_20000 20000\n-#define SPEED_25000 25000\n-#define SPEED_40000 40000\n-#define SPEED_50000 50000\n-#define SPEED_56000 56000\n-#define SPEED_100000 100000\n-\n enum nfp_eth_raw {\n \tNSP_ETH_RAW_PORT = 0,\n \tNSP_ETH_RAW_STATE,\n \tNSP_ETH_RAW_MAC,\n \tNSP_ETH_RAW_CONTROL,\n-\tNSP_ETH_NUM_RAW\n+\tNSP_ETH_NUM_RAW,\n };\n \n enum nfp_eth_rate {\n@@ -100,12 +84,12 @@ static const struct {\n \tenum nfp_eth_rate rate;\n \tuint32_t speed;\n } nsp_eth_rate_tbl[] = {\n-\t{ RATE_INVALID, 0, },\n-\t{ RATE_10M, SPEED_10, },\n-\t{ RATE_100M, SPEED_100, },\n-\t{ RATE_1G, SPEED_1000, },\n-\t{ RATE_10G, SPEED_10000, },\n-\t{ RATE_25G, SPEED_25000, },\n+\t{ RATE_INVALID, RTE_ETH_SPEED_NUM_NONE, },\n+\t{ RATE_10M, RTE_ETH_SPEED_NUM_10M, },\n+\t{ RATE_100M, RTE_ETH_SPEED_NUM_100M, },\n+\t{ RATE_1G, RTE_ETH_SPEED_NUM_1G, },\n+\t{ RATE_10G, RTE_ETH_SPEED_NUM_10G, },\n+\t{ RATE_25G, RTE_ETH_SPEED_NUM_25G, },\n };\n \n static uint32_t\n@@ -193,7 +177,14 @@ nfp_eth_port_translate(struct nfp_nsp *nsp,\n \tif (dst->fec_modes_supported != 0)\n \t\tdst->fec_modes_supported |= NFP_FEC_AUTO | NFP_FEC_DISABLED;\n \n-\tdst->fec = 1 << FIELD_GET(NSP_ETH_STATE_FEC, state);\n+\tdst->fec = FIELD_GET(NSP_ETH_STATE_FEC, state);\n+\tdst->act_fec = dst->fec;\n+\n+\tif (nfp_nsp_get_abi_ver_minor(nsp) < 33)\n+\t\treturn;\n+\n+\tdst->act_fec = FIELD_GET(NSP_ETH_STATE_ACT_FEC, state);\n+\tdst->supp_aneg = FIELD_GET(NSP_ETH_PORT_SUPP_ANEG, port);\n }\n \n static void\n@@ -222,7 +213,7 @@ nfp_eth_calc_port_geometry(struct nfp_eth_table *table)\n \t\t\t\t\t\ttable->ports[i].label_port,\n \t\t\t\t\t\ttable->ports[i].label_subport);\n \n-\t\t\ttable->ports[i].is_split = 1;\n+\t\t\ttable->ports[i].is_split = true;\n \t\t}\n \t}\n }\n@@ -233,6 +224,9 @@ nfp_eth_calc_port_type(struct nfp_eth_table_port *entry)\n \tif (entry->interface == NFP_INTERFACE_NONE) {\n \t\tentry->port_type = PORT_NONE;\n \t\treturn;\n+\t} else if (entry->interface == NFP_INTERFACE_RJ45) {\n+\t\tentry->port_type = PORT_TP;\n+\t\treturn;\n \t}\n \n \tif (entry->media == NFP_MEDIA_FIBRE)\n@@ -251,7 +245,6 @@ nfp_eth_read_ports_real(struct nfp_nsp *nsp)\n \tuint32_t table_sz;\n \tstruct nfp_eth_table *table;\n \tunion eth_table_entry *entries;\n-\tconst struct rte_ether_addr *mac;\n \n \tentries = rte_zmalloc(NULL, NSP_ETH_TABLE_SIZE, 0);\n \tif (entries == NULL)\n@@ -263,16 +256,9 @@ nfp_eth_read_ports_real(struct nfp_nsp *nsp)\n \t\tgoto err;\n \t}\n \n-\t/*\n-\t * The NFP3800 NIC support 8 ports, but only 2 ports are valid,\n-\t * the rest 6 ports mac are all 0, ensure we don't use these port\n-\t */\n-\tfor (i = 0; i < NSP_ETH_MAX_COUNT; i++) {\n-\t\tmac = (const struct rte_ether_addr *)entries[i].mac_addr;\n-\t\tif ((entries[i].port & NSP_ETH_PORT_LANES_MASK) != 0 &&\n-\t\t\t\t!rte_is_zero_ether_addr(mac))\n+\tfor (i = 0; i < NSP_ETH_MAX_COUNT; i++)\n+\t\tif ((entries[i].port & NSP_ETH_PORT_LANES_MASK) != 0)\n \t\t\tcnt++;\n-\t}\n \n \t/*\n \t * Some versions of flash will give us 0 instead of port count. For\n@@ -292,11 +278,8 @@ nfp_eth_read_ports_real(struct nfp_nsp *nsp)\n \n \ttable->count = cnt;\n \tfor (i = 0, j = 0; i < NSP_ETH_MAX_COUNT; i++) {\n-\t\tmac = (const struct rte_ether_addr *)entries[i].mac_addr;\n-\t\tif ((entries[i].port & NSP_ETH_PORT_LANES_MASK) != 0 &&\n-\t\t\t\t!rte_is_zero_ether_addr(mac))\n-\t\t\tnfp_eth_port_translate(nsp, &entries[i], i,\n-\t\t\t\t\t&table->ports[j++]);\n+\t\tif ((entries[i].port & NSP_ETH_PORT_LANES_MASK) != 0)\n+\t\t\tnfp_eth_port_translate(nsp, &entries[i], i, &table->ports[j++]);\n \t}\n \n \tnfp_eth_calc_port_geometry(table);\n@@ -437,7 +420,7 @@ nfp_eth_config_commit_end(struct nfp_nsp *nsp)\n int\n nfp_eth_set_mod_enable(struct nfp_cpp *cpp,\n \t\tuint32_t idx,\n-\t\tint enable)\n+\t\tbool enable)\n {\n \tuint64_t reg;\n \tstruct nfp_nsp *nsp;\n@@ -445,7 +428,7 @@ nfp_eth_set_mod_enable(struct nfp_cpp *cpp,\n \n \tnsp = nfp_eth_config_start(cpp, idx);\n \tif (nsp == NULL)\n-\t\treturn -1;\n+\t\treturn -EIO;\n \n \tentries = nfp_nsp_config_entries(nsp);\n \n@@ -457,7 +440,7 @@ nfp_eth_set_mod_enable(struct nfp_cpp *cpp,\n \t\treg |= FIELD_PREP(NSP_ETH_CTRL_ENABLED, enable);\n \t\tentries[idx].control = rte_cpu_to_le_64(reg);\n \n-\t\tnfp_nsp_config_set_modified(nsp, 1);\n+\t\tnfp_nsp_config_set_modified(nsp, true);\n \t}\n \n \treturn nfp_eth_config_commit_end(nsp);\n@@ -481,7 +464,7 @@ nfp_eth_set_mod_enable(struct nfp_cpp *cpp,\n int\n nfp_eth_set_configured(struct nfp_cpp *cpp,\n \t\tuint32_t idx,\n-\t\tint configured)\n+\t\tbool configured)\n {\n \tuint64_t reg;\n \tstruct nfp_nsp *nsp;\n@@ -510,7 +493,7 @@ nfp_eth_set_configured(struct nfp_cpp *cpp,\n \t\treg |= FIELD_PREP(NSP_ETH_CTRL_CONFIGURED, configured);\n \t\tentries[idx].control = rte_cpu_to_le_64(reg);\n \n-\t\tnfp_nsp_config_set_modified(nsp, 1);\n+\t\tnfp_nsp_config_set_modified(nsp, true);\n \t}\n \n \treturn nfp_eth_config_commit_end(nsp);\n@@ -548,7 +531,7 @@ nfp_eth_set_bit_config(struct nfp_nsp *nsp,\n \n \tentries[idx].control |= rte_cpu_to_le_64(ctrl_bit);\n \n-\tnfp_nsp_config_set_modified(nsp, 1);\n+\tnfp_nsp_config_set_modified(nsp, true);\n \n \treturn 0;\n }\n", "prefixes": [ "v3", "19/27" ] }