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GET /api/patches/131316/?format=api
{ "id": 131316, "url": "http://patches.dpdk.org/api/patches/131316/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230909122347.2043969-1-weh@microsoft.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230909122347.2043969-1-weh@microsoft.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230909122347.2043969-1-weh@microsoft.com", "date": "2023-09-09T12:23:47", "name": "[1/1] net/mana: add 32 bit short doorbell", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "5b9d9b9be886f40c43f2a171fa42da3955087618", "submitter": { "id": 3179, "url": "http://patches.dpdk.org/api/people/3179/?format=api", "name": "Wei Hu", "email": "weh@microsoft.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230909122347.2043969-1-weh@microsoft.com/mbox/", "series": [ { "id": 29466, "url": "http://patches.dpdk.org/api/series/29466/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=29466", "date": "2023-09-09T12:23:47", "name": "[1/1] net/mana: add 32 bit short doorbell", "version": 1, "mbox": "http://patches.dpdk.org/series/29466/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/131316/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/131316/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id C266C42554;\n\tSat, 9 Sep 2023 14:24:22 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 405494029E;\n\tSat, 9 Sep 2023 14:24:22 +0200 (CEST)", "from DM6FTOPR00CU001.outbound.protection.outlook.com\n (mail-centralusazon11020014.outbound.protection.outlook.com [52.101.61.14])\n by mails.dpdk.org (Postfix) with ESMTP id CA7D140295;\n Sat, 9 Sep 2023 14:24:20 +0200 (CEST)", "from MN2PR21MB1454.namprd21.prod.outlook.com (2603:10b6:208:208::11)\n by DM4PR21MB3731.namprd21.prod.outlook.com (2603:10b6:8:a0::5) with\n Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.6792.10; 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Ring short doorbell when running\nin 32 bit applicactions.\n\nCc: stable@dpdk.org\n\nSigned-off-by: Wei Hu <weh@microsoft.com>\n---\n drivers/net/mana/gdma.c | 95 +++++++++++++++++++++++++++++++++++++++++\n drivers/net/mana/mana.h | 25 +++++++++++\n drivers/net/mana/rx.c | 52 ++++++++++++++++++++++\n drivers/net/mana/tx.c | 28 ++++++++++++\n 4 files changed, 200 insertions(+)", "diff": "diff --git a/drivers/net/mana/gdma.c b/drivers/net/mana/gdma.c\nindex 65685fe236..d1da025d1b 100644\n--- a/drivers/net/mana/gdma.c\n+++ b/drivers/net/mana/gdma.c\n@@ -166,6 +166,97 @@ gdma_post_work_request(struct mana_gdma_queue *queue,\n \treturn 0;\n }\n \n+#ifdef RTE_ARCH_32\n+union gdma_short_doorbell_entry {\n+\tuint32_t as_uint32;\n+\n+\tstruct {\n+\t\tuint32_t tail_ptr_incr\t: 16; /* Number of CQEs */\n+\t\tuint32_t id\t\t: 12;\n+\t\tuint32_t reserved\t: 3;\n+\t\tuint32_t arm\t\t: 1;\n+\t} cq;\n+\n+\tstruct {\n+\t\tuint32_t tail_ptr_incr\t: 16; /* In number of bytes */\n+\t\tuint32_t id\t\t: 12;\n+\t\tuint32_t reserved\t: 4;\n+\t} rq;\n+\n+\tstruct {\n+\t\tuint32_t tail_ptr_incr\t: 16; /* In number of bytes */\n+\t\tuint32_t id\t\t: 12;\n+\t\tuint32_t reserved\t: 4;\n+\t} sq;\n+\n+\tstruct {\n+\t\tuint32_t tail_ptr_incr\t: 16; /* Number of EQEs */\n+\t\tuint32_t id\t\t: 12;\n+\t\tuint32_t reserved\t: 3;\n+\t\tuint32_t arm\t\t: 1;\n+\t} eq;\n+}; /* HW DATA */\n+\n+enum {\n+\tDOORBELL_SHORT_OFFSET_SQ = 0x10,\n+\tDOORBELL_SHORT_OFFSET_RQ = 0x410,\n+\tDOORBELL_SHORT_OFFSET_CQ = 0x810,\n+\tDOORBELL_SHORT_OFFSET_EQ = 0xFF0,\n+};\n+\n+/*\n+ * Write to hardware doorbell to notify new activity.\n+ */\n+int\n+mana_ring_short_doorbell(void *db_page, enum gdma_queue_types queue_type,\n+\t\t\t uint32_t queue_id, uint32_t tail_incr, uint8_t arm)\n+{\n+\tuint8_t *addr = db_page;\n+\tunion gdma_short_doorbell_entry e = {};\n+\n+\tif ((queue_id & ~GDMA_SHORT_DB_QID_MASK) ||\n+\t (tail_incr & ~GDMA_SHORT_DB_INC_MASK)) {\n+\t\tDP_LOG(ERR, \"%s: queue_id %u or \"\n+\t\t \"tail_incr %u overflowed, queue type %d\",\n+\t\t __func__, queue_id, tail_incr, queue_type);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tswitch (queue_type) {\n+\tcase GDMA_QUEUE_SEND:\n+\t\te.sq.id = queue_id;\n+\t\te.sq.tail_ptr_incr = tail_incr;\n+\t\taddr += DOORBELL_SHORT_OFFSET_SQ;\n+\t\tbreak;\n+\n+\tcase GDMA_QUEUE_RECEIVE:\n+\t\te.rq.id = queue_id;\n+\t\te.rq.tail_ptr_incr = tail_incr;\n+\t\taddr += DOORBELL_SHORT_OFFSET_RQ;\n+\t\tbreak;\n+\n+\tcase GDMA_QUEUE_COMPLETION:\n+\t\te.cq.id = queue_id;\n+\t\te.cq.tail_ptr_incr = tail_incr;\n+\t\te.cq.arm = arm;\n+\t\taddr += DOORBELL_SHORT_OFFSET_CQ;\n+\t\tbreak;\n+\n+\tdefault:\n+\t\tDP_LOG(ERR, \"Unsupported queue type %d\", queue_type);\n+\t\treturn -1;\n+\t}\n+\n+\t/* Ensure all writes are done before ringing doorbell */\n+\trte_wmb();\n+\n+\tDP_LOG(DEBUG, \"db_page %p addr %p queue_id %u type %u tail %u arm %u\",\n+\t db_page, addr, queue_id, queue_type, tail_incr, arm);\n+\n+\trte_write32(e.as_uint32, addr);\n+\treturn 0;\n+}\n+#else\n union gdma_doorbell_entry {\n \tuint64_t as_uint64;\n \n@@ -248,6 +339,7 @@ mana_ring_doorbell(void *db_page, enum gdma_queue_types queue_type,\n \trte_write64(e.as_uint64, addr);\n \treturn 0;\n }\n+#endif\n \n /*\n * Poll completion queue for completions.\n@@ -287,6 +379,9 @@ gdma_poll_completion_queue(struct mana_gdma_queue *cq,\n \t\tnum_comp++;\n \n \t\tcq->head++;\n+#ifdef RTE_ARCH_32\n+\t\tcq->head_incr_to_short_db++;\n+#endif\n \n \t\tDP_LOG(DEBUG, \"comp new 0x%x old 0x%x cqe 0x%x wq %u sq %u head %u\",\n \t\t new_owner_bits, old_owner_bits, cqe_owner_bits,\ndiff --git a/drivers/net/mana/mana.h b/drivers/net/mana/mana.h\nindex 5801491d75..848d87c096 100644\n--- a/drivers/net/mana/mana.h\n+++ b/drivers/net/mana/mana.h\n@@ -50,6 +50,19 @@ struct mana_shared_data {\n #define MAX_TX_WQE_SIZE 512\n #define MAX_RX_WQE_SIZE 256\n \n+/* For 32 bit only */\n+#ifdef RTE_ARCH_32\n+#define\tGDMA_SHORT_DB_INC_MASK 0xffff\n+#define\tGDMA_SHORT_DB_QID_MASK 0xfff\n+\n+#define GDMA_SHORT_DB_MAX_WQE\t(0x10000 / GDMA_WQE_ALIGNMENT_UNIT_SIZE)\n+\n+#define TX_WQE_SHORT_DB_THRESHOLD \\\n+\t(GDMA_SHORT_DB_MAX_WQE - (2 * MAX_TX_WQE_SIZE))\n+#define RX_WQE_SHORT_DB_THRESHOLD \\\n+\t(GDMA_SHORT_DB_MAX_WQE - (2 * MAX_RX_WQE_SIZE))\n+#endif\n+\n /* Values from the GDMA specification document, WQE format description */\n #define INLINE_OOB_SMALL_SIZE_IN_BYTES 8\n #define INLINE_OOB_LARGE_SIZE_IN_BYTES 24\n@@ -375,6 +388,9 @@ struct mana_gdma_queue {\n \tuint32_t id;\n \tuint32_t head;\n \tuint32_t tail;\n+#ifdef RTE_ARCH_32\n+\tuint32_t head_incr_to_short_db;\n+#endif\n };\n \n #define MANA_MR_BTREE_PER_QUEUE_N\t64\n@@ -425,6 +441,9 @@ struct mana_rxq {\n \t */\n \tuint32_t desc_ring_head, desc_ring_tail;\n \n+\t/* For storing wqe increment count btw each short doorbell ring */\n+\tuint32_t wqe_cnt_to_short_db;\n+\n \tstruct mana_gdma_queue gdma_rq;\n \tstruct mana_gdma_queue gdma_cq;\n \tstruct gdma_comp *gdma_comp_buf;\n@@ -455,8 +474,14 @@ extern int mana_logtype_init;\n \n #define PMD_INIT_FUNC_TRACE() PMD_INIT_LOG(DEBUG, \" >>\")\n \n+#ifdef RTE_ARCH_32\n+int mana_ring_short_doorbell(void *db_page, enum gdma_queue_types queue_type,\n+\t\t\t uint32_t queue_id, uint32_t tail_incr,\n+\t\t\t uint8_t arm);\n+#else\n int mana_ring_doorbell(void *db_page, enum gdma_queue_types queue_type,\n \t\t uint32_t queue_id, uint32_t tail, uint8_t arm);\n+#endif\n int mana_rq_ring_doorbell(struct mana_rxq *rxq);\n \n int gdma_post_work_request(struct mana_gdma_queue *queue,\ndiff --git a/drivers/net/mana/rx.c b/drivers/net/mana/rx.c\nindex 14d9085801..303d129e5b 100644\n--- a/drivers/net/mana/rx.c\n+++ b/drivers/net/mana/rx.c\n@@ -39,10 +39,23 @@ mana_rq_ring_doorbell(struct mana_rxq *rxq)\n \t/* Hardware Spec specifies that software client should set 0 for\n \t * wqe_cnt for Receive Queues.\n \t */\n+#ifdef RTE_ARCH_32\n+\tif (rxq->wqe_cnt_to_short_db) {\n+\t\tret = mana_ring_short_doorbell(db_page, GDMA_QUEUE_RECEIVE,\n+\t\t\t\t rxq->gdma_rq.id,\n+\t\t\t\t rxq->wqe_cnt_to_short_db *\n+\t\t\t\t\tGDMA_WQE_ALIGNMENT_UNIT_SIZE,\n+\t\t\t\t 0);\n+\t} else {\n+\t\t/* No need to ring, just return */\n+\t\tret = 0;\n+\t}\n+#else\n \tret = mana_ring_doorbell(db_page, GDMA_QUEUE_RECEIVE,\n \t\t\t rxq->gdma_rq.id,\n \t\t\t rxq->gdma_rq.head * GDMA_WQE_ALIGNMENT_UNIT_SIZE,\n \t\t\t 0);\n+#endif\n \n \tif (ret)\n \t\tDP_LOG(ERR, \"failed to ring RX doorbell ret %d\", ret);\n@@ -97,6 +110,7 @@ mana_alloc_and_post_rx_wqe(struct mana_rxq *rxq)\n \t\t/* update queue for tracking pending packets */\n \t\tdesc->pkt = mbuf;\n \t\tdesc->wqe_size_in_bu = wqe_size_in_bu;\n+\t\trxq->wqe_cnt_to_short_db += wqe_size_in_bu;\n \t\trxq->desc_ring_head = (rxq->desc_ring_head + 1) % rxq->num_desc;\n \t} else {\n \t\tDP_LOG(DEBUG, \"failed to post recv ret %d\", ret);\n@@ -115,12 +129,22 @@ mana_alloc_and_post_rx_wqes(struct mana_rxq *rxq)\n \tint ret;\n \tuint32_t i;\n \n+#ifdef RTE_ARCH_32\n+\trxq->wqe_cnt_to_short_db = 0;\n+#endif\n \tfor (i = 0; i < rxq->num_desc; i++) {\n \t\tret = mana_alloc_and_post_rx_wqe(rxq);\n \t\tif (ret) {\n \t\t\tDP_LOG(ERR, \"failed to post RX ret = %d\", ret);\n \t\t\treturn ret;\n \t\t}\n+\n+#ifdef RTE_ARCH_32\n+\t\tif (rxq->wqe_cnt_to_short_db > RX_WQE_SHORT_DB_THRESHOLD) {\n+\t\t\tmana_rq_ring_doorbell(rxq);\n+\t\t\trxq->wqe_cnt_to_short_db = 0;\n+\t\t}\n+#endif\n \t}\n \n \tmana_rq_ring_doorbell(rxq);\n@@ -349,6 +373,9 @@ mana_start_rx_queues(struct rte_eth_dev *dev)\n \n \t\t/* CQ head starts with count */\n \t\trxq->gdma_cq.head = rxq->gdma_cq.count;\n+#ifdef RTE_ARCH_32\n+\t\trxq->gdma_cq.head_incr_to_short_db = 0;\n+#endif\n \n \t\tDRV_LOG(INFO, \"rxq cq id %u buf %p count %u size %u\",\n \t\t\trxq->gdma_cq.id, rxq->gdma_cq.buffer,\n@@ -397,6 +424,10 @@ mana_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \tuint32_t i;\n \tint polled = 0;\n \n+#ifdef RTE_ARCH_32\n+\trxq->wqe_cnt_to_short_db = 0;\n+#endif\n+\n repoll:\n \t/* Polling on new completions if we have no backlog */\n \tif (rxq->comp_buf_idx == rxq->comp_buf_len) {\n@@ -505,6 +536,16 @@ mana_rx_burst(void *dpdk_rxq, struct rte_mbuf **pkts, uint16_t pkts_n)\n \t\twqe_posted++;\n \t\tif (pkt_received == pkts_n)\n \t\t\tbreak;\n+\n+#ifdef RTE_ARCH_32\n+\t\t/* Ring short doorbell if approaching the wqe increment\n+\t\t * limit.\n+\t\t */\n+\t\tif (rxq->wqe_cnt_to_short_db > RX_WQE_SHORT_DB_THRESHOLD) {\n+\t\t\tmana_rq_ring_doorbell(rxq);\n+\t\t\trxq->wqe_cnt_to_short_db = 0;\n+\t\t}\n+#endif\n \t}\n \n \trxq->backlog_idx = pkt_idx;\n@@ -529,6 +570,16 @@ static int\n mana_arm_cq(struct mana_rxq *rxq, uint8_t arm)\n {\n \tstruct mana_priv *priv = rxq->priv;\n+#ifdef RTE_ARCH_32\n+\tuint16_t cqe_incr = (uint16_t)rxq->gdma_cq.head_incr_to_short_db;\n+\n+\trxq->gdma_cq.head_incr_to_short_db = 0;\n+\tDP_LOG(DEBUG, \"Ringing completion queue ID %u incr %u arm %d\",\n+\t rxq->gdma_cq.id, cqe_incr, arm);\n+\n+\treturn mana_ring_short_doorbell(priv->db_page, GDMA_QUEUE_COMPLETION,\n+\t\t\t\t rxq->gdma_cq.id, cqe_incr, arm);\n+#else\n \tuint32_t head = rxq->gdma_cq.head %\n \t\t(rxq->gdma_cq.count << COMPLETION_QUEUE_ENTRY_OWNER_BITS_SIZE);\n \n@@ -537,6 +588,7 @@ mana_arm_cq(struct mana_rxq *rxq, uint8_t arm)\n \n \treturn mana_ring_doorbell(priv->db_page, GDMA_QUEUE_COMPLETION,\n \t\t\t\t rxq->gdma_cq.id, head, arm);\n+#endif\n }\n \n int\ndiff --git a/drivers/net/mana/tx.c b/drivers/net/mana/tx.c\nindex 11ba2ee1ac..8ff81bde09 100644\n--- a/drivers/net/mana/tx.c\n+++ b/drivers/net/mana/tx.c\n@@ -137,6 +137,9 @@ mana_start_tx_queues(struct rte_eth_dev *dev)\n \n \t\t/* CQ head starts with count (not 0) */\n \t\ttxq->gdma_cq.head = txq->gdma_cq.count;\n+#ifdef RTE_ARCH_32\n+\t\ttxq->gdma_cq.head_incr_to_short_db = 0;\n+#endif\n \n \t\tDRV_LOG(INFO, \"txq cq id %u buf %p count %u size %u head %u\",\n \t\t\ttxq->gdma_cq.id, txq->gdma_cq.buffer,\n@@ -176,6 +179,9 @@ mana_tx_burst(void *dpdk_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \tvoid *db_page;\n \tuint16_t pkt_sent = 0;\n \tuint32_t num_comp, i;\n+#ifdef RTE_ARCH_32\n+\tuint32_t wqe_count = 0;\n+#endif\n \n \t/* Process send completions from GDMA */\n \tnum_comp = gdma_poll_completion_queue(&txq->gdma_cq,\n@@ -418,6 +424,20 @@ mana_tx_burst(void *dpdk_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \n \t\t\tDP_LOG(DEBUG, \"nb_pkts %u pkt[%d] sent\",\n \t\t\t nb_pkts, pkt_idx);\n+#ifdef RTE_ARCH_32\n+\t\t\twqe_count += wqe_size_in_bu;\n+\t\t\tif (wqe_count > TX_WQE_SHORT_DB_THRESHOLD) {\n+\t\t\t\t/* wqe_count approaching to short doorbell\n+\t\t\t\t * increment limit. Stop processing further\n+\t\t\t\t * more packets and just ring short\n+\t\t\t\t * doorbell.\n+\t\t\t\t */\n+\t\t\t\tDP_LOG(DEBUG, \"wqe_count %u reaching limit, \"\n+\t\t\t\t \"pkt_sent %d\",\n+\t\t\t\t wqe_count, pkt_sent);\n+\t\t\t\tbreak;\n+\t\t\t}\n+#endif\n \t\t} else {\n \t\t\tDP_LOG(DEBUG, \"pkt[%d] failed to post send ret %d\",\n \t\t\t pkt_idx, ret);\n@@ -436,11 +456,19 @@ mana_tx_burst(void *dpdk_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)\n \t}\n \n \tif (pkt_sent) {\n+#ifdef RTE_ARCH_32\n+\t\tret = mana_ring_short_doorbell(db_page, GDMA_QUEUE_SEND,\n+\t\t\t\t\t txq->gdma_sq.id,\n+\t\t\t\t\t wqe_count *\n+\t\t\t\t\t\tGDMA_WQE_ALIGNMENT_UNIT_SIZE,\n+\t\t\t\t\t 0);\n+#else\n \t\tret = mana_ring_doorbell(db_page, GDMA_QUEUE_SEND,\n \t\t\t\t\t txq->gdma_sq.id,\n \t\t\t\t\t txq->gdma_sq.head *\n \t\t\t\t\t\tGDMA_WQE_ALIGNMENT_UNIT_SIZE,\n \t\t\t\t\t 0);\n+#endif\n \t\tif (ret)\n \t\t\tDP_LOG(ERR, \"mana_ring_doorbell failed ret %d\", ret);\n \t}\n", "prefixes": [ "1/1" ] }