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GET /api/patches/129022/?format=api
{ "id": 129022, "url": "http://patches.dpdk.org/api/patches/129022/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230627132421.1946338-1-abdullah.sevincer@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230627132421.1946338-1-abdullah.sevincer@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230627132421.1946338-1-abdullah.sevincer@intel.com", "date": "2023-06-27T13:24:21", "name": "[v1] event/dlb2: revise QE Weight Feature", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "b6dd89429a472e4c9ada0cf461807a8bf7bbf33d", "submitter": { "id": 2843, "url": "http://patches.dpdk.org/api/people/2843/?format=api", "name": "Sevincer, Abdullah", "email": "abdullah.sevincer@intel.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230627132421.1946338-1-abdullah.sevincer@intel.com/mbox/", "series": [ { "id": 28665, "url": "http://patches.dpdk.org/api/series/28665/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28665", "date": "2023-06-27T13:24:21", "name": "[v1] event/dlb2: revise QE Weight Feature", "version": 1, "mbox": "http://patches.dpdk.org/series/28665/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/129022/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/129022/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 65E0342D72;\n\tTue, 27 Jun 2023 15:24:29 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E922940F18;\n\tTue, 27 Jun 2023 15:24:28 +0200 (CEST)", "from mga06.intel.com (mga06b.intel.com [134.134.136.31])\n by mails.dpdk.org (Postfix) with ESMTP id 3F8B140EE1\n for <dev@dpdk.org>; Tue, 27 Jun 2023 15:24:26 +0200 (CEST)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 27 Jun 2023 06:24:24 -0700", "from txanpdk02.an.intel.com ([10.123.117.76])\n by fmsmga002.fm.intel.com with ESMTP; 27 Jun 2023 06:24:24 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1687872266; x=1719408266;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=RwsNBUzs/cYbKB5eKGIuOKutwwRMpAveVNn/m6KKmks=;\n b=LQqiHkiwksBJ9ti1f84gxajIz6UdzQi2fZJmllKYZ1TsYGlrKKHqGW4u\n RsCEIUyKCdkyn0mQ2QsFz0zcDt1V0qu6BfmReeAcQFXoPRvGRnAZyFhb5\n PRNIl2eq1W5AnZkmQo4VZAq3mnxJ40Xk1jy+8jesp54QfWjQCx4pGuh8z\n n79l+au3I3bvZSz40YDGfnRER2E2LVF5PVYSbh4A9hb89JSNI86vsxt45\n HrQ6hM5Wy1srQqZhs/xX24zOwT5Z13xClheJC0Mwkw7VtCTeOsmHpf0Tx\n 3wznjVWMqOtzA9k/vzM05L29IBDxe7y8jxHBcIIiwspb6DLWrerOhZI4L g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10754\"; a=\"425239617\"", "E=Sophos;i=\"6.01,162,1684825200\"; d=\"scan'208\";a=\"425239617\"", "E=McAfee;i=\"6600,9927,10754\"; a=\"829653397\"", "E=Sophos;i=\"6.01,162,1684825200\"; d=\"scan'208\";a=\"829653397\"" ], "X-ExtLoop1": "1", "From": "Abdullah Sevincer <abdullah.sevincer@intel.com>", "To": "dev@dpdk.org", "Cc": "jerinj@marvell.com,\n\tAbdullah Sevincer <abdullah.sevincer@intel.com>", "Subject": "[PATCH v1] event/dlb2: revise QE Weight Feature", "Date": "Tue, 27 Jun 2023 08:24:21 -0500", "Message-Id": "<20230627132421.1946338-1-abdullah.sevincer@intel.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Revise QE weight feature to enable from command line\njust passing a flag. If QE weight feature is enabled\nsimply port cq weight will be same as dequeue depth.\n\nAlso, update DLB documentation for revised QE weight feature and\nusage of eventdev application with DLB hardware.\n\nSigned-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>\n---\n doc/guides/eventdevs/dlb2.rst | 107 ++++++++++++++++++++------\n drivers/event/dlb2/dlb2.c | 132 +++++++++++----------------------\n drivers/event/dlb2/dlb2_priv.h | 4 +-\n 3 files changed, 131 insertions(+), 112 deletions(-)", "diff": "diff --git a/doc/guides/eventdevs/dlb2.rst b/doc/guides/eventdevs/dlb2.rst\nindex f5bf5757c6..c84d153a56 100644\n--- a/doc/guides/eventdevs/dlb2.rst\n+++ b/doc/guides/eventdevs/dlb2.rst\n@@ -17,8 +17,8 @@ Configuration\n -------------\n \n The DLB PF PMD is a user-space PMD that uses VFIO to gain direct\n-device access. To use this operation mode, the PCIe PF device must be bound\n-to a DPDK-compatible VFIO driver, such as vfio-pci.\n+device access. To use this operation mode, the PCIe PF device must\n+be bound to a DPDK-compatible VFIO driver, such as vfio-pci.\n \n Eventdev API Notes\n ------------------\n@@ -395,26 +395,6 @@ The depth must be between 32 and 1024, and must be a power of 2.\n \n --allow ea:00.0,max_enqueue_depth=<depth>\n \n-QE Weight\n-~~~~~~~~~\n-\n-DLB supports advanced scheduling mechanisms, such as CQ weight.\n-Each load balanced CQ has a configurable work capacity (max 256)\n-which corresponds to the total QE weight DLB will allow to be enqueued\n-to that consumer. Every load balanced event/QE carries a weight of 0, 2, 4,\n-or 8 and DLB will increment a (per CQ) load indicator when it schedules a\n-QE to that CQ. The weight is also stored in the history list. When a\n-completion arrives, the weight is popped from the history list and used to\n-decrement the load indicator. This creates a new scheduling condition - a CQ\n-whose load is equal to or in excess of capacity is not available for traffic.\n-Note that the weight may not exceed the maximum CQ depth.\n-\n- .. code-block:: console\n-\n- --allow ea:00.0,cq_weight=all:<weight>\n- --allow ea:00.0,cq_weight=qidA-qidB:<weight>\n- --allow ea:00.0,cq_weight=qid:<weight>\n-\n Producer Coremask\n ~~~~~~~~~~~~~~~~~\n \n@@ -450,3 +430,86 @@ won't be used.\n .. code-block:: console\n \n --allow ea:00.0,default_port_allocation=<y/Y>\n+\n+QE Weight\n+~~~~~~~~~\n+\n+DLB supports advanced scheduling mechanisms, such as CQ weight.\n+Each load balanced CQ has a configurable work capacity (max 256)\n+which corresponds to the total QE weight DLB will allow to be enqueued\n+to that consumer. Every load balanced event/QE carries a weight of 0, 2, 4,\n+or 8 and DLB will increment a (per CQ) load indicator when it schedules a\n+QE to that CQ. The weight is also stored in the history list. When a\n+completion arrives, the weight is popped from the history list and used to\n+decrement the load indicator. This creates a new scheduling condition - a CQ\n+whose load is equal to or in excess of capacity is not available for traffic.\n+Note that the weight may not exceed the maximum CQ depth.\n+\n+Example command to enable QE Weight feature:\n+\n+ .. code-block:: console\n+\n+ --allow ea:00.0,enable_cq_weight=<y/Y>\n+\n+Running Eventdev Applications with DLB Device\n+---------------------------------------------\n+This section explains how to run eventdev applications\n+with DLB hardware as well as difference in command line parameter\n+to switch between a DLB hardware and a virtual eventdev device such as SW0, hence\n+users can run applications with or without DLB device to compare performance of\n+a DLB device.\n+\n+In order to run eventdev applications, DLB device must be bound\n+to a DPDK-compatible VFIO driver, such as vfio-pci.\n+\n+Example command to bind DLB device to vfio-pci driver:\n+\n+ .. code-block:: console\n+\n+ ../usertools/dpdk-devbind.py -b vfio-pci ea:00.0\n+\n+Eventdev applications can be run with or without a DLB device.\n+Below examples give details of running eventdev application without DLB device\n+and with DLB device. Notice that the primary difference between two examples are\n+passing the parameter ``--vdev <driver><id>``. The first example run uses a virtual\n+eventdev device SW0 while second example run directly and picks DLB device from\n+VFIO driver.\n+\n+Example command to run eventdev application without a DLB device:\n+\n+\t.. code-block:: console\n+\n+\t sudo <build_dir>/app/dpdk-test-eventdev --vdev=event_sw0 -- \\\n+\t\t\t\t\t--test=order_queue --plcores 1 --wlcores 2,3\n+\n+After binding DLB device to a supported pci driver such as vfio-pci,\n+eventdev applications can be run on the DLB device.\n+\n+Example command to run eventdev application with a DLB device:\n+\n+\t.. code-block:: console\n+\n+\t\tsudo build/app/dpdk-test-eventdev -- --test=order_queue\\\n+\t\t\t--plcores=1 --wlcores=2-7 --stlist=o --worker_deq_depth=128\\\n+\t\t\t--prod_enq_burst_sz=64 --nb_flows=64 --nb_pkts=1000000\n+\n+A particular DLB device can also be picked from command line by passing\n+\t``--a`` or ``--allow`` option:\n+\n+\t.. code-block:: console\n+\n+\t\tsudo build/app/dpdk-test-eventdev --allow ea:00.0 -- --test=order_queue\\\n+\t\t\t--plcores=1 --wlcores=2-7 --stlist=o --worker_deq_depth=128\\\n+\t\t\t--prod_enq_burst_sz=64 --nb_flows=64 --nb_pkts=1000000\n+\n+Debugging options\n+~~~~~~~~~~~~~~~~~\n+\n+To specify log level for a DLB device use ``--log-level=dlb,8``.\n+Example command to run eventdev application with a DLB device log level enabled:\n+\n+\t.. code-block:: console\n+\n+\t\tsudo build/app/dpdk-test-eventdev --allow ea:00.0 --log-level=dlb,8 -- --test=order_queue\\\n+\t\t\t--plcores=1 --wlcores=2-7 --stlist=o --worker_deq_depth=128\\\n+\t\t\t--prod_enq_burst_sz=64 --nb_flows=64 --nb_pkts=1000000\n\\ No newline at end of file\ndiff --git a/drivers/event/dlb2/dlb2.c b/drivers/event/dlb2/dlb2.c\nindex 60c5cd4804..07c9384950 100644\n--- a/drivers/event/dlb2/dlb2.c\n+++ b/drivers/event/dlb2/dlb2.c\n@@ -117,63 +117,6 @@ dlb2_init_queue_depth_thresholds(struct dlb2_eventdev *dlb2,\n \t}\n }\n \n-/* override defaults with value(s) provided on command line */\n-static void\n-dlb2_init_cq_weight(struct dlb2_eventdev *dlb2, int *cq_weight)\n-{\n-\tint q;\n-\n-\tfor (q = 0; q < DLB2_MAX_NUM_PORTS_ALL; q++)\n-\t\tdlb2->ev_ports[q].cq_weight = cq_weight[q];\n-}\n-\n-static int\n-set_cq_weight(const char *key __rte_unused,\n-\t const char *value,\n-\t void *opaque)\n-{\n-\tstruct dlb2_cq_weight *cq_weight = opaque;\n-\tint first, last, weight, i;\n-\n-\tif (value == NULL || opaque == NULL) {\n-\t\tDLB2_LOG_ERR(\"NULL pointer\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\t/* command line override may take one of the following 3 forms:\n-\t * qid_depth_thresh=all:<threshold_value> ... all queues\n-\t * qid_depth_thresh=qidA-qidB:<threshold_value> ... a range of queues\n-\t * qid_depth_thresh=qid:<threshold_value> ... just one queue\n-\t */\n-\tif (sscanf(value, \"all:%d\", &weight) == 1) {\n-\t\tfirst = 0;\n-\t\tlast = DLB2_MAX_NUM_PORTS_ALL - 1;\n-\t} else if (sscanf(value, \"%d-%d:%d\", &first, &last, &weight) == 3) {\n-\t\t/* we have everything we need */\n-\t} else if (sscanf(value, \"%d:%d\", &first, &weight) == 2) {\n-\t\tlast = first;\n-\t} else {\n-\t\tDLB2_LOG_ERR(\"Error parsing ldb port qe weight devarg. Should be all:val, qid-qid:val, or qid:val\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (first > last || first < 0 ||\n-\t\tlast >= DLB2_MAX_NUM_PORTS_ALL) {\n-\t\tDLB2_LOG_ERR(\"Error parsing ldb port qe weight arg, invalid port value\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tif (weight < 0 || weight > DLB2_MAX_CQ_DEPTH_OVERRIDE) {\n-\t\tDLB2_LOG_ERR(\"Error parsing ldb port qe weight devarg, must be < cq depth\\n\");\n-\t\treturn -EINVAL;\n-\t}\n-\n-\tfor (i = first; i <= last; i++)\n-\t\tcq_weight->limit[i] = weight; /* indexed by qid */\n-\n-\treturn 0;\n-}\n-\n /* override defaults with value(s) provided on command line */\n static void\n dlb2_init_port_cos(struct dlb2_eventdev *dlb2, int *port_cos)\n@@ -397,7 +340,6 @@ set_max_enq_depth(const char *key __rte_unused,\n \treturn 0;\n }\n \n-\n static int\n set_max_num_events(const char *key __rte_unused,\n \t\t const char *value,\n@@ -667,6 +609,26 @@ set_default_ldb_port_allocation(const char *key __rte_unused,\n \treturn 0;\n }\n \n+static int\n+set_enable_cq_weight(const char *key __rte_unused,\n+\t\t const char *value,\n+\t\t void *opaque)\n+{\n+\tbool *enable_cq_weight = opaque;\n+\n+\tif (value == NULL || opaque == NULL) {\n+\t\tDLB2_LOG_ERR(\"NULL pointer\\n\");\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif ((*value == 'y') || (*value == 'Y'))\n+\t\t*enable_cq_weight = true;\n+\telse\n+\t\t*enable_cq_weight = false;\n+\n+\treturn 0;\n+}\n+\n static int\n set_qid_depth_thresh(const char *key __rte_unused,\n \t\t const char *value,\n@@ -1644,26 +1606,20 @@ dlb2_hw_create_ldb_port(struct dlb2_eventdev *dlb2,\n \n \tqm_port->id = qm_port_id;\n \n-\tif (dlb2->version == DLB2_HW_V2) {\n-\t\tqm_port->cached_ldb_credits = 0;\n-\t\tqm_port->cached_dir_credits = 0;\n-\t\tif (ev_port->cq_weight) {\n-\t\t\tstruct dlb2_enable_cq_weight_args\n-\t\t\t\tcq_weight_args = { {0} };\n-\n-\t\t\tcq_weight_args.port_id = qm_port->id;\n-\t\t\tcq_weight_args.limit = ev_port->cq_weight;\n-\t\t\tret = dlb2_iface_enable_cq_weight(handle, &cq_weight_args);\n-\t\t\tif (ret < 0) {\n-\t\t\t\tDLB2_LOG_ERR(\"dlb2: dlb2_dir_port_create error, ret=%d (driver status: %s)\\n\",\n+\tif (dlb2->version == DLB2_HW_V2_5 && (dlb2->enable_cq_weight == true)) {\n+\t\tstruct dlb2_enable_cq_weight_args cq_weight_args = { {0} };\n+\t\tcq_weight_args.port_id = qm_port->id;\n+\t\tcq_weight_args.limit = dequeue_depth;\n+\t\tret = dlb2_iface_enable_cq_weight(handle, &cq_weight_args);\n+\n+\t\tif (ret < 0) {\n+\t\t\tDLB2_LOG_ERR(\"dlb2: dlb2_dir_port_create error, ret=%d (driver status: %s)\\n\",\n \t\t\t\t\tret,\n \t\t\t\t\tdlb2_error_strings[cfg.response. status]);\n-\t\t\t\tgoto error_exit;\n-\t\t\t}\n+\t\t\tgoto error_exit;\n \t\t}\n-\t\tqm_port->cq_weight = ev_port->cq_weight;\n+\t\tqm_port->cq_weight = dequeue_depth;\n \t} else {\n-\t\tqm_port->cached_credits = 0;\n \t\tqm_port->cq_weight = 0;\n \t}\n \n@@ -4621,6 +4577,7 @@ dlb2_primary_eventdev_probe(struct rte_eventdev *dev,\n \tdlb2->hw_credit_quanta = dlb2_args->hw_credit_quanta;\n \tdlb2->default_depth_thresh = dlb2_args->default_depth_thresh;\n \tdlb2->vector_opts_enabled = dlb2_args->vector_opts_enabled;\n+\tdlb2->enable_cq_weight = dlb2_args->enable_cq_weight;\n \n \n \tif (dlb2_args->max_cq_depth != 0)\n@@ -4641,9 +4598,6 @@ dlb2_primary_eventdev_probe(struct rte_eventdev *dev,\n \tdlb2_init_queue_depth_thresholds(dlb2,\n \t\t\t\t\t dlb2_args->qid_depth_thresholds.val);\n \n-\tdlb2_init_cq_weight(dlb2,\n-\t\t\t dlb2_args->cq_weight.limit);\n-\n \tdlb2_init_port_cos(dlb2,\n \t\t\t dlb2_args->port_cos.cos_id);\n \n@@ -4774,11 +4728,11 @@ dlb2_parse_params(const char *params,\n \t\t\t\t\t DLB2_VECTOR_OPTS_ENAB_ARG,\n \t\t\t\t\t DLB2_MAX_CQ_DEPTH,\n \t\t\t\t\t DLB2_MAX_ENQ_DEPTH,\n-\t\t\t\t\t DLB2_CQ_WEIGHT,\n \t\t\t\t\t DLB2_PORT_COS,\n \t\t\t\t\t DLB2_COS_BW,\n \t\t\t\t\t DLB2_PRODUCER_COREMASK,\n \t\t\t\t\t DLB2_DEFAULT_LDB_PORT_ALLOCATION_ARG,\n+\t\t\t\t\t\t DLB2_ENABLE_CQ_WEIGHT_ARG,\n \t\t\t\t\t NULL };\n \n \tif (params != NULL && params[0] != '\\0') {\n@@ -4926,17 +4880,6 @@ dlb2_parse_params(const char *params,\n \t\t\t\treturn ret;\n \t\t\t}\n \n-\t\t\tret = rte_kvargs_process(kvlist,\n-\t\t\t\t\tDLB2_CQ_WEIGHT,\n-\t\t\t\t\tset_cq_weight,\n-\t\t\t\t\t&dlb2_args->cq_weight);\n-\t\t\tif (ret != 0) {\n-\t\t\t\tDLB2_LOG_ERR(\"%s: Error parsing cq weight on\",\n-\t\t\t\t\t name);\n-\t\t\t\trte_kvargs_free(kvlist);\n-\t\t\t\treturn ret;\n-\t\t\t}\n-\n \t\t\tret = rte_kvargs_process(kvlist,\n \t\t\t\t\tDLB2_PORT_COS,\n \t\t\t\t\tset_port_cos,\n@@ -4983,6 +4926,17 @@ dlb2_parse_params(const char *params,\n \t\t\t\treturn ret;\n \t\t\t}\n \n+\t\t\tret = rte_kvargs_process(kvlist,\n+\t\t\t\t\t\t DLB2_ENABLE_CQ_WEIGHT_ARG,\n+\t\t\t\t\t\t set_enable_cq_weight,\n+\t\t\t\t\t\t &dlb2_args->enable_cq_weight);\n+\t\t\tif (ret != 0) {\n+\t\t\t\tDLB2_LOG_ERR(\"%s: Error parsing enable_cq_weight arg\",\n+\t\t\t\t\t name);\n+\t\t\t\trte_kvargs_free(kvlist);\n+\t\t\t\treturn ret;\n+\t\t\t}\n+\n \t\t\trte_kvargs_free(kvlist);\n \t\t}\n \t}\ndiff --git a/drivers/event/dlb2/dlb2_priv.h b/drivers/event/dlb2/dlb2_priv.h\nindex f4b9e7f9ff..31a3beeb6c 100644\n--- a/drivers/event/dlb2/dlb2_priv.h\n+++ b/drivers/event/dlb2/dlb2_priv.h\n@@ -47,11 +47,11 @@\n #define DLB2_VECTOR_OPTS_ENAB_ARG \"vector_opts_enable\"\n #define DLB2_MAX_CQ_DEPTH \"max_cq_depth\"\n #define DLB2_MAX_ENQ_DEPTH \"max_enqueue_depth\"\n-#define DLB2_CQ_WEIGHT \"cq_weight\"\n #define DLB2_PORT_COS \"port_cos\"\n #define DLB2_COS_BW \"cos_bw\"\n #define DLB2_PRODUCER_COREMASK \"producer_coremask\"\n #define DLB2_DEFAULT_LDB_PORT_ALLOCATION_ARG \"default_port_allocation\"\n+#define DLB2_ENABLE_CQ_WEIGHT_ARG \"enable_cq_weight\"\n \n /* Begin HW related defines and structs */\n \n@@ -637,6 +637,7 @@ struct dlb2_eventdev {\n \tuint32_t cos_ports[DLB2_COS_NUM_VALS]; /* total ldb ports in each class */\n \tuint32_t cos_bw[DLB2_COS_NUM_VALS]; /* bandwidth per cos domain */\n \tuint8_t max_cos_port; /* Max LDB port from any cos */\n+\tbool enable_cq_weight;\n };\n \n /* used for collecting and passing around the dev args */\n@@ -674,6 +675,7 @@ struct dlb2_devargs {\n \tstruct dlb2_cos_bw cos_bw;\n \tconst char *producer_coremask;\n \tbool default_ldb_port_allocation;\n+\tbool enable_cq_weight;\n };\n \n /* End Eventdev related defines and structs */\n", "prefixes": [ "v1" ] }