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GET /api/patches/127961/?format=api
{ "id": 127961, "url": "http://patches.dpdk.org/api/patches/127961/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230602114205.29589-5-liudongdong3@huawei.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230602114205.29589-5-liudongdong3@huawei.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230602114205.29589-5-liudongdong3@huawei.com", "date": "2023-06-02T11:41:58", "name": "[v2,04/11] net/hns3: extract a PTP header file", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "7bba3dd908b2b45614d831f180bdcccb7bf7729d", "submitter": { "id": 2718, "url": "http://patches.dpdk.org/api/people/2718/?format=api", "name": "Dongdong Liu", "email": "liudongdong3@huawei.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230602114205.29589-5-liudongdong3@huawei.com/mbox/", "series": [ { "id": 28325, "url": "http://patches.dpdk.org/api/series/28325/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28325", "date": "2023-06-02T11:41:55", "name": "net/hns3: add some bugfixes for hns3", "version": 2, "mbox": "http://patches.dpdk.org/series/28325/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/127961/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/127961/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 7EA2142BF2;\n\tFri, 2 Jun 2023 13:45:02 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id DBD3342D40;\n\tFri, 2 Jun 2023 13:44:40 +0200 (CEST)", "from szxga03-in.huawei.com (szxga03-in.huawei.com [45.249.212.189])\n by mails.dpdk.org (Postfix) with ESMTP id 3AF9B427E9;\n Fri, 2 Jun 2023 13:44:36 +0200 (CEST)", "from kwepemi500017.china.huawei.com (unknown [172.30.72.54])\n by szxga03-in.huawei.com (SkyGuard) with ESMTP id 4QXh2T03MPzLmbD;\n Fri, 2 Jun 2023 19:42:56 +0800 (CST)", "from localhost.localdomain (10.28.79.22) by\n kwepemi500017.china.huawei.com (7.221.188.110) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id\n 15.1.2507.23; Fri, 2 Jun 2023 19:44:34 +0800" ], "From": "Dongdong Liu <liudongdong3@huawei.com>", "To": "<dev@dpdk.org>, <ferruh.yigit@amd.com>, <thomas@monjalon.net>,\n <andrew.rybchenko@oktetlabs.ru>, <fengchengwen@huawei.com>", "CC": "<stable@dpdk.org>, <lihuisong@huawei.com>, <liudongdong3@huawei.com>,\n <yisen.zhuang@huawei.com>, <huangdengdui@huawei.com>", "Subject": "[PATCH v2 04/11] net/hns3: extract a PTP header file", "Date": "Fri, 2 Jun 2023 19:41:58 +0800", "Message-ID": "<20230602114205.29589-5-liudongdong3@huawei.com>", "X-Mailer": "git-send-email 2.22.0", "In-Reply-To": "<20230602114205.29589-1-liudongdong3@huawei.com>", "References": "<20230529130940.1501-1-liudongdong3@huawei.com>\n <20230602114205.29589-1-liudongdong3@huawei.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.28.79.22]", "X-ClientProxiedBy": "dggems702-chm.china.huawei.com (10.3.19.179) To\n kwepemi500017.china.huawei.com (7.221.188.110)", "X-CFilter-Loop": "Reflected", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Huisong Li <lihuisong@huawei.com>\n\nThis patch extracts a PTP header file to contain PTP registers\nand external API in order to make PTP code structure more clear.\n\nFixes: 38b539d96eb6 (\"net/hns3: support IEEE 1588 PTP\")\nCc: stable@dpdk.org\n\nSigned-off-by: Huisong Li <lihuisong@huawei.com>\nSigned-off-by: Dongdong Liu <liudongdong3@huawei.com>\n---\n drivers/net/hns3/hns3_ethdev.c | 1 +\n drivers/net/hns3/hns3_ethdev.h | 17 ------------\n drivers/net/hns3/hns3_ptp.c | 2 +-\n drivers/net/hns3/hns3_ptp.h | 48 ++++++++++++++++++++++++++++++++++\n drivers/net/hns3/hns3_regs.h | 23 ----------------\n 5 files changed, 50 insertions(+), 41 deletions(-)\n create mode 100644 drivers/net/hns3/hns3_ptp.h", "diff": "diff --git a/drivers/net/hns3/hns3_ethdev.c b/drivers/net/hns3/hns3_ethdev.c\nindex 70463fe177..64028778d0 100644\n--- a/drivers/net/hns3/hns3_ethdev.c\n+++ b/drivers/net/hns3/hns3_ethdev.c\n@@ -15,6 +15,7 @@\n #include \"hns3_dcb.h\"\n #include \"hns3_mp.h\"\n #include \"hns3_flow.h\"\n+#include \"hns3_ptp.h\"\n #include \"hns3_ethdev.h\"\n \n #define HNS3_SERVICE_INTERVAL\t\t1000000 /* us */\ndiff --git a/drivers/net/hns3/hns3_ethdev.h b/drivers/net/hns3/hns3_ethdev.h\nindex 9456204422..c58094d87b 100644\n--- a/drivers/net/hns3/hns3_ethdev.h\n+++ b/drivers/net/hns3/hns3_ethdev.h\n@@ -1041,23 +1041,6 @@ void hns3vf_update_link_status(struct hns3_hw *hw, uint8_t link_status,\n \t\t\t uint32_t link_speed, uint8_t link_duplex);\n void hns3vf_update_push_lsc_cap(struct hns3_hw *hw, bool supported);\n \n-int hns3_restore_ptp(struct hns3_adapter *hns);\n-int hns3_mbuf_dyn_rx_timestamp_register(struct rte_eth_dev *dev,\n-\t\t\t\t struct rte_eth_conf *conf);\n-int hns3_ptp_init(struct hns3_hw *hw);\n-void hns3_ptp_uninit(struct hns3_hw *hw);\n-int hns3_timesync_enable(struct rte_eth_dev *dev);\n-int hns3_timesync_disable(struct rte_eth_dev *dev);\n-int hns3_timesync_read_rx_timestamp(struct rte_eth_dev *dev,\n-\t\t\t\tstruct timespec *timestamp,\n-\t\t\t\tuint32_t flags __rte_unused);\n-int hns3_timesync_read_tx_timestamp(struct rte_eth_dev *dev,\n-\t\t\t\tstruct timespec *timestamp);\n-int hns3_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts);\n-int hns3_timesync_write_time(struct rte_eth_dev *dev,\n-\t\t\tconst struct timespec *ts);\n-int hns3_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta);\n-\n const char *hns3_get_media_type_name(uint8_t media_type);\n \n static inline bool\ndiff --git a/drivers/net/hns3/hns3_ptp.c b/drivers/net/hns3/hns3_ptp.c\nindex 0e17a17034..894ac6dd71 100644\n--- a/drivers/net/hns3/hns3_ptp.c\n+++ b/drivers/net/hns3/hns3_ptp.c\n@@ -7,7 +7,7 @@\n #include <rte_time.h>\n \n #include \"hns3_ethdev.h\"\n-#include \"hns3_regs.h\"\n+#include \"hns3_ptp.h\"\n #include \"hns3_logs.h\"\n \n uint64_t hns3_timestamp_rx_dynflag;\ndiff --git a/drivers/net/hns3/hns3_ptp.h b/drivers/net/hns3/hns3_ptp.h\nnew file mode 100644\nindex 0000000000..2b8717fa3c\n--- /dev/null\n+++ b/drivers/net/hns3/hns3_ptp.h\n@@ -0,0 +1,48 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2023 HiSilicon Limited.\n+ */\n+\n+#ifndef HNS3_PTP_H\n+#define HNS3_PTP_H\n+\n+/* Register bit for 1588 event */\n+#define HNS3_VECTOR0_1588_INT_B\t\t\t0\n+\n+#define HNS3_PTP_BASE_ADDRESS\t\t\t0x29000\n+\n+#define HNS3_TX_1588_SEQID_BACK\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x0)\n+#define HNS3_TX_1588_TSP_BACK_0\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x4)\n+#define HNS3_TX_1588_TSP_BACK_1\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x8)\n+#define HNS3_TX_1588_TSP_BACK_2\t\t\t(HNS3_PTP_BASE_ADDRESS + 0xc)\n+\n+#define HNS3_TX_1588_BACK_TSP_CNT\t\t(HNS3_PTP_BASE_ADDRESS + 0x30)\n+\n+#define HNS3_CFG_TIME_SYNC_H\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x50)\n+#define HNS3_CFG_TIME_SYNC_M\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x54)\n+#define HNS3_CFG_TIME_SYNC_L\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x58)\n+#define HNS3_CFG_TIME_SYNC_RDY\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x5c)\n+\n+#define HNS3_CFG_TIME_CYC_EN\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x70)\n+\n+#define HNS3_CURR_TIME_OUT_H\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x74)\n+#define HNS3_CURR_TIME_OUT_L\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x78)\n+#define HNS3_CURR_TIME_OUT_NS\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x7c)\n+\n+int hns3_restore_ptp(struct hns3_adapter *hns);\n+int hns3_mbuf_dyn_rx_timestamp_register(struct rte_eth_dev *dev,\n+\t\t\t\t struct rte_eth_conf *conf);\n+int hns3_ptp_init(struct hns3_hw *hw);\n+void hns3_ptp_uninit(struct hns3_hw *hw);\n+int hns3_timesync_enable(struct rte_eth_dev *dev);\n+int hns3_timesync_disable(struct rte_eth_dev *dev);\n+int hns3_timesync_read_rx_timestamp(struct rte_eth_dev *dev,\n+\t\t\t\tstruct timespec *timestamp,\n+\t\t\t\tuint32_t flags __rte_unused);\n+int hns3_timesync_read_tx_timestamp(struct rte_eth_dev *dev,\n+\t\t\t\tstruct timespec *timestamp);\n+int hns3_timesync_read_time(struct rte_eth_dev *dev, struct timespec *ts);\n+int hns3_timesync_write_time(struct rte_eth_dev *dev,\n+\t\t\tconst struct timespec *ts);\n+int hns3_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta);\n+\n+#endif /* HNS3_PTP_H */\ndiff --git a/drivers/net/hns3/hns3_regs.h b/drivers/net/hns3/hns3_regs.h\nindex 459bbaf773..6b037f81c1 100644\n--- a/drivers/net/hns3/hns3_regs.h\n+++ b/drivers/net/hns3/hns3_regs.h\n@@ -124,29 +124,6 @@\n #define HNS3_TQP_INTR_RL_DEFAULT\t\t0\n #define HNS3_TQP_INTR_QL_DEFAULT\t\t0\n \n-/* Register bit for 1588 event */\n-#define HNS3_VECTOR0_1588_INT_B\t 0\n-\n-#define HNS3_PTP_BASE_ADDRESS\t\t\t0x29000\n-\n-#define HNS3_TX_1588_SEQID_BACK\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x0)\n-#define HNS3_TX_1588_TSP_BACK_0\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x4)\n-#define HNS3_TX_1588_TSP_BACK_1\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x8)\n-#define HNS3_TX_1588_TSP_BACK_2\t\t\t(HNS3_PTP_BASE_ADDRESS + 0xc)\n-\n-#define HNS3_TX_1588_BACK_TSP_CNT\t\t(HNS3_PTP_BASE_ADDRESS + 0x30)\n-\n-#define HNS3_CFG_TIME_SYNC_H\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x50)\n-#define HNS3_CFG_TIME_SYNC_M\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x54)\n-#define HNS3_CFG_TIME_SYNC_L\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x58)\n-#define HNS3_CFG_TIME_SYNC_RDY\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x5c)\n-\n-#define HNS3_CFG_TIME_CYC_EN\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x70)\n-\n-#define HNS3_CURR_TIME_OUT_H\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x74)\n-#define HNS3_CURR_TIME_OUT_L\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x78)\n-#define HNS3_CURR_TIME_OUT_NS\t\t\t(HNS3_PTP_BASE_ADDRESS + 0x7c)\n-\n /* gl_usec convert to hardware count, as writing each 1 represents 2us */\n #define HNS3_GL_USEC_TO_REG(gl_usec)\t\t((gl_usec) >> 1)\n /* rl_usec convert to hardware count, as writing each 1 represents 4us */\n", "prefixes": [ "v2", "04/11" ] }