Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/127742/?format=api
{ "id": 127742, "url": "http://patches.dpdk.org/api/patches/127742/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230531053743.129442-5-miao.li@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230531053743.129442-5-miao.li@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230531053743.129442-5-miao.li@intel.com", "date": "2023-05-31T05:37:42", "name": "[v4,4/4] bus/pci: add VFIO sparse mmap support", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "63131599241dcde7bd86fe0bc40def346c46ad60", "submitter": { "id": 2220, "url": "http://patches.dpdk.org/api/people/2220/?format=api", "name": "Li, Miao", "email": "miao.li@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230531053743.129442-5-miao.li@intel.com/mbox/", "series": [ { "id": 28263, "url": "http://patches.dpdk.org/api/series/28263/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28263", "date": "2023-05-31T05:37:38", "name": "Support VFIO sparse mmap in PCI bus", "version": 4, "mbox": "http://patches.dpdk.org/series/28263/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/127742/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/127742/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0148A42BEB;\n\tWed, 31 May 2023 07:38:24 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id C44FC42D39;\n\tWed, 31 May 2023 07:38:09 +0200 (CEST)", "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by mails.dpdk.org (Postfix) with ESMTP id 5644142C76\n for <dev@dpdk.org>; Wed, 31 May 2023 07:38:07 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 30 May 2023 22:38:06 -0700", "from dpdk-limiao-icelake.sh.intel.com ([10.67.111.26])\n by orsmga006.jf.intel.com with ESMTP; 30 May 2023 22:38:04 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1685511487; x=1717047487;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=75qQgyEffNjGvP82AdA75FyhNPOdFo6o/PO2aB4YVxk=;\n b=jFsFS5HXH2cGk4uwSZjheDvzYEWmmHQ45S9no2ysfosIg0YXpF50dAYW\n nbDAYjiESE+iHCV/tEgsiJnXEDAlEDh35jOaLNdvmElUCkt45Y5wYQC1y\n ET5jzQKcQN724+n1AlluW9o7O3dVQJCpJ/yCiT6nHNU9eLvALbhglchZP\n wxRQmE9YMDQ1ZCxXOa6XOB1DtpdVd/l0y/hvfF7KHvF7ULX+P/6yiOS7v\n vzCAJ9xARhO1zjHL7KjxetjrM3Vt5w25tVyUhhm3VRW9wSpzmtd/3Frjo\n +5BfkeR+oTG872JKNCBg3pdnVacFhdspvgw77/YoPRgfEyS/79XGCW4ym g==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10726\"; a=\"335489303\"", "E=Sophos;i=\"6.00,205,1681196400\"; d=\"scan'208\";a=\"335489303\"", "E=McAfee;i=\"6600,9927,10726\"; a=\"684273536\"", "E=Sophos;i=\"6.00,205,1681196400\"; d=\"scan'208\";a=\"684273536\"" ], "X-ExtLoop1": "1", "From": "Miao Li <miao.li@intel.com>", "To": "dev@dpdk.org", "Cc": "skori@marvell.com, thomas@monjalon.net, david.marchand@redhat.com,\n ferruh.yigit@amd.com, chenbo.xia@intel.com, yahui.cao@intel.com,\n Anatoly Burakov <anatoly.burakov@intel.com>", "Subject": "[PATCH v4 4/4] bus/pci: add VFIO sparse mmap support", "Date": "Wed, 31 May 2023 05:37:42 +0000", "Message-Id": "<20230531053743.129442-5-miao.li@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230531053743.129442-1-miao.li@intel.com>", "References": "<20230525163116.682000-1-miao.li@intel.com>\n <20230531053743.129442-1-miao.li@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch adds sparse mmap support in PCI bus. Sparse mmap is a\ncapability defined in VFIO which allows multiple mmap areas in one\nVFIO region.\n\nIn this patch, the sparse mmap regions are mapped to one continuous\nvirtual address region that follows device-specific BAR layout. So,\ndriver can still access all mapped sparse mmap regions by using\n'bar_base_address + bar_offset'.\n\nSigned-off-by: Miao Li <miao.li@intel.com>\nSigned-off-by: Chenbo Xia <chenbo.xia@intel.com>\nAcked-by: Sunil Kumar Kori <skori@marvell.com>\nAcked-by: Yahui Cao <yahui.cao@intel.com>\n---\n drivers/bus/pci/linux/pci_vfio.c | 138 +++++++++++++++++++++++++++----\n drivers/bus/pci/private.h | 2 +\n 2 files changed, 122 insertions(+), 18 deletions(-)", "diff": "diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c\nindex 24b0795fbd..e6db30d36a 100644\n--- a/drivers/bus/pci/linux/pci_vfio.c\n+++ b/drivers/bus/pci/linux/pci_vfio.c\n@@ -673,6 +673,54 @@ pci_vfio_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res,\n \treturn 0;\n }\n \n+static int\n+pci_vfio_sparse_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res,\n+\t\tint bar_index, int additional_flags)\n+{\n+\tstruct pci_map *bar = &vfio_res->maps[bar_index];\n+\tstruct vfio_region_sparse_mmap_area *sparse;\n+\tvoid *bar_addr;\n+\tuint32_t i;\n+\n+\tif (bar->size == 0) {\n+\t\tRTE_LOG(DEBUG, EAL, \"Bar size is 0, skip BAR%d\\n\", bar_index);\n+\t\treturn 0;\n+\t}\n+\n+\t/* reserve the address using an inaccessible mapping */\n+\tbar_addr = mmap(bar->addr, bar->size, 0, MAP_PRIVATE |\n+\t\t\tMAP_ANONYMOUS | additional_flags, -1, 0);\n+\tif (bar_addr != MAP_FAILED) {\n+\t\tvoid *map_addr = NULL;\n+\t\tfor (i = 0; i < bar->nr_areas; i++) {\n+\t\t\tsparse = &bar->areas[i];\n+\t\t\tif (sparse->size) {\n+\t\t\t\tvoid *addr = RTE_PTR_ADD(bar_addr, (uintptr_t)sparse->offset);\n+\t\t\t\tmap_addr = pci_map_resource(addr, vfio_dev_fd,\n+\t\t\t\t\tbar->offset + sparse->offset, sparse->size,\n+\t\t\t\t\tRTE_MAP_FORCE_ADDRESS);\n+\t\t\t\tif (map_addr == NULL) {\n+\t\t\t\t\tmunmap(bar_addr, bar->size);\n+\t\t\t\t\tRTE_LOG(ERR, EAL, \"Failed to map pci BAR%d\\n\",\n+\t\t\t\t\t\tbar_index);\n+\t\t\t\t\tgoto err_map;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t} else {\n+\t\tRTE_LOG(ERR, EAL, \"Failed to create inaccessible mapping for BAR%d\\n\",\n+\t\t\tbar_index);\n+\t\tgoto err_map;\n+\t}\n+\n+\tbar->addr = bar_addr;\n+\treturn 0;\n+\n+err_map:\n+\tbar->nr_areas = 0;\n+\treturn -1;\n+}\n+\n /*\n * region info may contain capability headers, so we need to keep reallocating\n * the memory until we match allocated memory size with argsz.\n@@ -798,7 +846,7 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)\n \tchar pci_addr[PATH_MAX] = {0};\n \tint vfio_dev_fd;\n \tstruct rte_pci_addr *loc = &dev->addr;\n-\tint i, ret;\n+\tint i, j, ret;\n \tstruct mapped_pci_resource *vfio_res = NULL;\n \tstruct mapped_pci_res_list *vfio_res_list =\n \t\tRTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);\n@@ -875,13 +923,15 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)\n \n \tfor (i = 0; i < vfio_res->nb_maps; i++) {\n \t\tvoid *bar_addr;\n+\t\tstruct vfio_info_cap_header *hdr;\n+\t\tstruct vfio_region_info_cap_sparse_mmap *sparse;\n \n \t\tret = pci_vfio_get_region_info(vfio_dev_fd, ®, i);\n \t\tif (ret < 0) {\n \t\t\tRTE_LOG(ERR, EAL,\n \t\t\t\t\"%s cannot get device region info error \"\n \t\t\t\t\"%i (%s)\\n\", pci_addr, errno, strerror(errno));\n-\t\t\tgoto err_vfio_res;\n+\t\t\tgoto err_map;\n \t\t}\n \n \t\tpdev->region[i].size = reg->size;\n@@ -891,7 +941,7 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)\n \t\tret = pci_vfio_is_ioport_bar(dev, vfio_dev_fd, i);\n \t\tif (ret < 0) {\n \t\t\tfree(reg);\n-\t\t\tgoto err_vfio_res;\n+\t\t\tgoto err_map;\n \t\t} else if (ret) {\n \t\t\tRTE_LOG(INFO, EAL, \"Ignore mapping IO port bar(%d)\\n\",\n \t\t\t\t\ti);\n@@ -920,12 +970,41 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)\n \t\tmaps[i].size = reg->size;\n \t\tmaps[i].path = NULL; /* vfio doesn't have per-resource paths */\n \n-\t\tret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0);\n-\t\tif (ret < 0) {\n-\t\t\tRTE_LOG(ERR, EAL, \"%s mapping BAR%i failed: %s\\n\",\n-\t\t\t\t\tpci_addr, i, strerror(errno));\n-\t\t\tfree(reg);\n-\t\t\tgoto err_vfio_res;\n+\t\thdr = pci_vfio_info_cap(reg, VFIO_REGION_INFO_CAP_SPARSE_MMAP);\n+\n+\t\tif (hdr != NULL) {\n+\t\t\tsparse = container_of(hdr,\n+\t\t\t\tstruct vfio_region_info_cap_sparse_mmap, header);\n+\t\t\tif (sparse->nr_areas > 0) {\n+\t\t\t\tmaps[i].nr_areas = sparse->nr_areas;\n+\t\t\t\tmaps[i].areas = rte_zmalloc(NULL,\n+\t\t\t\t\tsizeof(*maps[i].areas) * maps[i].nr_areas, 0);\n+\t\t\t\tif (maps[i].areas == NULL) {\n+\t\t\t\t\tRTE_LOG(ERR, EAL,\n+\t\t\t\t\t\t\"Cannot alloc memory for sparse map areas\\n\");\n+\t\t\t\t\tgoto err_map;\n+\t\t\t\t}\n+\t\t\t\tmemcpy(maps[i].areas, sparse->areas,\n+\t\t\t\t\tsizeof(*maps[i].areas) * maps[i].nr_areas);\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (maps[i].nr_areas > 0) {\n+\t\t\tret = pci_vfio_sparse_mmap_bar(vfio_dev_fd, vfio_res, i, 0);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tRTE_LOG(ERR, EAL, \"%s sparse mapping BAR%i failed: %s\\n\",\n+\t\t\t\t\t\tpci_addr, i, strerror(errno));\n+\t\t\t\tfree(reg);\n+\t\t\t\tgoto err_map;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tRTE_LOG(ERR, EAL, \"%s mapping BAR%i failed: %s\\n\",\n+\t\t\t\t\t\tpci_addr, i, strerror(errno));\n+\t\t\t\tfree(reg);\n+\t\t\t\tgoto err_map;\n+\t\t\t}\n \t\t}\n \n \t\tdev->mem_resource[i].addr = maps[i].addr;\n@@ -935,19 +1014,26 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)\n \n \tif (pci_rte_vfio_setup_device(dev, vfio_dev_fd) < 0) {\n \t\tRTE_LOG(ERR, EAL, \"%s setup device failed\\n\", pci_addr);\n-\t\tgoto err_vfio_res;\n+\t\tgoto err_map;\n \t}\n \n #ifdef HAVE_VFIO_DEV_REQ_INTERFACE\n \tif (pci_vfio_enable_notifier(dev, vfio_dev_fd) != 0) {\n \t\tRTE_LOG(ERR, EAL, \"Error setting up notifier!\\n\");\n-\t\tgoto err_vfio_res;\n+\t\tgoto err_map;\n \t}\n \n #endif\n \tTAILQ_INSERT_TAIL(vfio_res_list, vfio_res, next);\n \n \treturn 0;\n+err_map:\n+\tfor (j = 0; j < i; j++) {\n+\t\tif (maps[j].addr)\n+\t\t\tpci_unmap_resource(maps[j].addr, maps[j].size);\n+\t\tif (maps[j].nr_areas > 0)\n+\t\t\trte_free(maps[j].areas);\n+\t}\n err_vfio_res:\n \trte_free(vfio_res);\n err_vfio_dev_fd:\n@@ -963,7 +1049,7 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev)\n \tchar pci_addr[PATH_MAX] = {0};\n \tint vfio_dev_fd;\n \tstruct rte_pci_addr *loc = &dev->addr;\n-\tint i, ret;\n+\tint i, j, ret;\n \tstruct mapped_pci_resource *vfio_res = NULL;\n \tstruct mapped_pci_res_list *vfio_res_list =\n \t\tRTE_TAILQ_CAST(rte_vfio_tailq.head, mapped_pci_res_list);\n@@ -1008,11 +1094,20 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev)\n \tmaps = vfio_res->maps;\n \n \tfor (i = 0; i < vfio_res->nb_maps; i++) {\n-\t\tret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, MAP_FIXED);\n-\t\tif (ret < 0) {\n-\t\t\tRTE_LOG(ERR, EAL, \"%s mapping BAR%i failed: %s\\n\",\n-\t\t\t\t\tpci_addr, i, strerror(errno));\n-\t\t\tgoto err_vfio_dev_fd;\n+\t\tif (maps[i].nr_areas > 0) {\n+\t\t\tret = pci_vfio_sparse_mmap_bar(vfio_dev_fd, vfio_res, i, MAP_FIXED);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tRTE_LOG(ERR, EAL, \"%s sparse mapping BAR%i failed: %s\\n\",\n+\t\t\t\t\t\tpci_addr, i, strerror(errno));\n+\t\t\t\tgoto err_vfio_dev_fd;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, MAP_FIXED);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tRTE_LOG(ERR, EAL, \"%s mapping BAR%i failed: %s\\n\",\n+\t\t\t\t\t\tpci_addr, i, strerror(errno));\n+\t\t\t\tgoto err_vfio_dev_fd;\n+\t\t\t}\n \t\t}\n \n \t\tdev->mem_resource[i].addr = maps[i].addr;\n@@ -1028,6 +1123,10 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev)\n \n \treturn 0;\n err_vfio_dev_fd:\n+\tfor (j = 0; j < i; j++) {\n+\t\tif (maps[j].addr)\n+\t\t\tpci_unmap_resource(maps[j].addr, maps[j].size);\n+\t}\n \trte_vfio_release_device(rte_pci_get_sysfs_path(),\n \t\t\tpci_addr, vfio_dev_fd);\n \treturn -1;\n@@ -1062,7 +1161,7 @@ find_and_unmap_vfio_resource(struct mapped_pci_res_list *vfio_res_list,\n \t\tbreak;\n \t}\n \n-\tif (vfio_res == NULL)\n+\tif (vfio_res == NULL)\n \t\treturn vfio_res;\n \n \tRTE_LOG(INFO, EAL, \"Releasing PCI mapped resource for %s\\n\",\n@@ -1080,6 +1179,9 @@ find_and_unmap_vfio_resource(struct mapped_pci_res_list *vfio_res_list,\n \t\t\t\tpci_addr, maps[i].addr);\n \t\t\tpci_unmap_resource(maps[i].addr, maps[i].size);\n \t\t}\n+\n+\t\tif (maps[i].nr_areas > 0)\n+\t\t\trte_free(maps[i].areas);\n \t}\n \n \treturn vfio_res;\ndiff --git a/drivers/bus/pci/private.h b/drivers/bus/pci/private.h\nindex 2d6991ccb7..8b0ce73533 100644\n--- a/drivers/bus/pci/private.h\n+++ b/drivers/bus/pci/private.h\n@@ -121,6 +121,8 @@ struct pci_map {\n \tuint64_t offset;\n \tuint64_t size;\n \tuint64_t phaddr;\n+\tuint32_t nr_areas;\n+\tstruct vfio_region_sparse_mmap_area *areas;\n };\n \n struct pci_msix_table {\n", "prefixes": [ "v4", "4/4" ] }