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GET /api/patches/127386/?format=api
{ "id": 127386, "url": "http://patches.dpdk.org/api/patches/127386/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230525094541.331338-3-feifei.wang2@arm.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230525094541.331338-3-feifei.wang2@arm.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230525094541.331338-3-feifei.wang2@arm.com", "date": "2023-05-25T09:45:39", "name": "[v6,2/4] net/i40e: implement mbufs recycle mode", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "d16368c90110f569e95fee97be93eaaa961cb4fc", "submitter": { "id": 1771, "url": "http://patches.dpdk.org/api/people/1771/?format=api", "name": "Feifei Wang", "email": "feifei.wang2@arm.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230525094541.331338-3-feifei.wang2@arm.com/mbox/", "series": [ { "id": 28175, "url": "http://patches.dpdk.org/api/series/28175/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28175", "date": "2023-05-25T09:45:37", "name": "Recycle mbufs from Tx queue to Rx queue", "version": 6, "mbox": "http://patches.dpdk.org/series/28175/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/127386/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/127386/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D158C42B98;\n\tThu, 25 May 2023 11:46:05 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 7E01642D33;\n\tThu, 25 May 2023 11:45:56 +0200 (CEST)", "from foss.arm.com (foss.arm.com [217.140.110.172])\n by mails.dpdk.org (Postfix) with ESMTP id 3241342D33\n for <dev@dpdk.org>; Thu, 25 May 2023 11:45:55 +0200 (CEST)", "from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14])\n by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CD5321042;\n Thu, 25 May 2023 02:46:39 -0700 (PDT)", "from net-x86-dell-8268.shanghai.arm.com\n (net-x86-dell-8268.shanghai.arm.com [10.169.210.116])\n by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 648683F67D;\n Thu, 25 May 2023 02:45:52 -0700 (PDT)" ], "From": "Feifei Wang <feifei.wang2@arm.com>", "To": "Yuying Zhang <Yuying.Zhang@intel.com>, Beilei Xing <beilei.xing@intel.com>", "Cc": "dev@dpdk.org, nd@arm.com, Feifei Wang <feifei.wang2@arm.com>,\n Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>,\n Ruifeng Wang <ruifeng.wang@arm.com>", "Subject": "[PATCH v6 2/4] net/i40e: implement mbufs recycle mode", "Date": "Thu, 25 May 2023 17:45:39 +0800", "Message-Id": "<20230525094541.331338-3-feifei.wang2@arm.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230525094541.331338-1-feifei.wang2@arm.com>", "References": "<20211224164613.32569-1-feifei.wang2@arm.com>\n <20230525094541.331338-1-feifei.wang2@arm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Define specific function implementation for i40e driver.\nCurrently, mbufs recycle mode can support 128bit\nvector path and avx2 path. And can be enabled both in\nfast free and no fast free mode.\n\nSuggested-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\nSigned-off-by: Feifei Wang <feifei.wang2@arm.com>\nReviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>\nReviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>\n---\n drivers/net/i40e/i40e_ethdev.c | 1 +\n drivers/net/i40e/i40e_ethdev.h | 2 +\n .../net/i40e/i40e_recycle_mbufs_vec_common.c | 140 ++++++++++++++++++\n drivers/net/i40e/i40e_rxtx.c | 32 ++++\n drivers/net/i40e/i40e_rxtx.h | 4 +\n drivers/net/i40e/meson.build | 2 +\n 6 files changed, 181 insertions(+)\n create mode 100644 drivers/net/i40e/i40e_recycle_mbufs_vec_common.c", "diff": "diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c\nindex f9d8f9791f..d4eecd16cf 100644\n--- a/drivers/net/i40e/i40e_ethdev.c\n+++ b/drivers/net/i40e/i40e_ethdev.c\n@@ -496,6 +496,7 @@ static const struct eth_dev_ops i40e_eth_dev_ops = {\n \t.flow_ops_get = i40e_dev_flow_ops_get,\n \t.rxq_info_get = i40e_rxq_info_get,\n \t.txq_info_get = i40e_txq_info_get,\n+\t.recycle_rxq_info_get = i40e_recycle_rxq_info_get,\n \t.rx_burst_mode_get = i40e_rx_burst_mode_get,\n \t.tx_burst_mode_get = i40e_tx_burst_mode_get,\n \t.timesync_enable = i40e_timesync_enable,\ndiff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h\nindex 9b806d130e..b5b2d6cf2b 100644\n--- a/drivers/net/i40e/i40e_ethdev.h\n+++ b/drivers/net/i40e/i40e_ethdev.h\n@@ -1355,6 +1355,8 @@ void i40e_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tstruct rte_eth_rxq_info *qinfo);\n void i40e_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tstruct rte_eth_txq_info *qinfo);\n+void i40e_recycle_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\tstruct rte_eth_recycle_rxq_info *recycle_rxq_info);\n int i40e_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \t\t\t struct rte_eth_burst_mode *mode);\n int i40e_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id,\ndiff --git a/drivers/net/i40e/i40e_recycle_mbufs_vec_common.c b/drivers/net/i40e/i40e_recycle_mbufs_vec_common.c\nnew file mode 100644\nindex 0000000000..08d708fd7d\n--- /dev/null\n+++ b/drivers/net/i40e/i40e_recycle_mbufs_vec_common.c\n@@ -0,0 +1,140 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2023 Arm Limited.\n+ */\n+\n+#include <stdint.h>\n+#include <ethdev_driver.h>\n+\n+#include \"base/i40e_prototype.h\"\n+#include \"base/i40e_type.h\"\n+#include \"i40e_ethdev.h\"\n+#include \"i40e_rxtx.h\"\n+\n+#pragma GCC diagnostic ignored \"-Wcast-qual\"\n+\n+void\n+i40e_recycle_rx_descriptors_refill_vec(void *rx_queue, uint16_t nb_mbufs)\n+{\n+\tstruct i40e_rx_queue *rxq = rx_queue;\n+\tstruct i40e_rx_entry *rxep;\n+\tvolatile union i40e_rx_desc *rxdp;\n+\tuint16_t rx_id;\n+\tuint64_t paddr;\n+\tuint64_t dma_addr;\n+\tuint16_t i;\n+\n+\trxdp = rxq->rx_ring + rxq->rxrearm_start;\n+\trxep = &rxq->sw_ring[rxq->rxrearm_start];\n+\n+\tfor (i = 0; i < nb_mbufs; i++) {\n+\t\t/* Initialize rxdp descs. */\n+\t\tpaddr = (rxep[i].mbuf)->buf_iova + RTE_PKTMBUF_HEADROOM;\n+\t\tdma_addr = rte_cpu_to_le_64(paddr);\n+\t\t/* flush desc with pa dma_addr */\n+\t\trxdp[i].read.hdr_addr = 0;\n+\t\trxdp[i].read.pkt_addr = dma_addr;\n+\t}\n+\n+\t/* Update the descriptor initializer index */\n+\trxq->rxrearm_start += nb_mbufs;\n+\trx_id = rxq->rxrearm_start - 1;\n+\n+\tif (unlikely(rxq->rxrearm_start >= rxq->nb_rx_desc)) {\n+\t\trxq->rxrearm_start = 0;\n+\t\trx_id = rxq->nb_rx_desc - 1;\n+\t}\n+\n+\trxq->rxrearm_nb -= nb_mbufs;\n+\n+\trte_io_wmb();\n+\t/* Update the tail pointer on the NIC */\n+\tI40E_PCI_REG_WRITE_RELAXED(rxq->qrx_tail, rx_id);\n+}\n+\n+uint16_t\n+i40e_recycle_tx_mbufs_reuse_vec(void *tx_queue,\n+\tstruct rte_eth_recycle_rxq_info *recycle_rxq_info)\n+{\n+\tstruct i40e_tx_queue *txq = tx_queue;\n+\tstruct i40e_tx_entry *txep;\n+\tstruct rte_mbuf **rxep;\n+\tstruct rte_mbuf *m[RTE_I40E_TX_MAX_FREE_BUF_SZ];\n+\tint i, j, n;\n+\tuint16_t avail = 0;\n+\tuint16_t mbuf_ring_size = recycle_rxq_info->mbuf_ring_size;\n+\tuint16_t mask = recycle_rxq_info->mbuf_ring_size - 1;\n+\tuint16_t refill_requirement = recycle_rxq_info->refill_requirement;\n+\tuint16_t refill_head = *recycle_rxq_info->refill_head;\n+\tuint16_t receive_tail = *recycle_rxq_info->receive_tail;\n+\n+\t/* Get available recycling Rx buffers. */\n+\tavail = (mbuf_ring_size - (refill_head - receive_tail)) & mask;\n+\n+\t/* Check Tx free thresh and Rx available space. */\n+\tif (txq->nb_tx_free > txq->tx_free_thresh || avail <= txq->tx_rs_thresh)\n+\t\treturn 0;\n+\n+\t/* check DD bits on threshold descriptor */\n+\tif ((txq->tx_ring[txq->tx_next_dd].cmd_type_offset_bsz &\n+\t\t\t\trte_cpu_to_le_64(I40E_TXD_QW1_DTYPE_MASK)) !=\n+\t\t\trte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE))\n+\t\treturn 0;\n+\n+\tn = txq->tx_rs_thresh;\n+\n+\t/* Mbufs recycle mode can only support no ring buffer wrapping around.\n+\t * Two case for this:\n+\t *\n+\t * case 1: The refill head of Rx buffer ring needs to be aligned with\n+\t * mbuf ring size. In this case, the number of Tx freeing buffers\n+\t * should be equal to refill_requirement.\n+\t *\n+\t * case 2: The refill head of Rx ring buffer does not need to be aligned\n+\t * with mbuf ring size. In this case, the update of refill head can not\n+\t * exceed the Rx mbuf ring size.\n+\t */\n+\tif (refill_requirement != n ||\n+\t\t(!refill_requirement && (refill_head + n > mbuf_ring_size)))\n+\t\treturn 0;\n+\n+\t/* First buffer to free from S/W ring is at index\n+\t * tx_next_dd - (tx_rs_thresh-1).\n+\t */\n+\ttxep = &txq->sw_ring[txq->tx_next_dd - (n - 1)];\n+\trxep = recycle_rxq_info->mbuf_ring;\n+\trxep += refill_head;\n+\n+\tif (txq->offloads & RTE_ETH_TX_OFFLOAD_MBUF_FAST_FREE) {\n+\t\t/* Directly put mbufs from Tx to Rx. */\n+\t\tfor (i = 0; i < n; i++, rxep++, txep++)\n+\t\t\t*rxep = txep[0].mbuf;\n+\t} else {\n+\t\tfor (i = 0, j = 0; i < n; i++) {\n+\t\t\t/* Avoid txq contains buffers from expected mempool. */\n+\t\t\tif (unlikely(recycle_rxq_info->mp\n+\t\t\t\t\t\t!= txep[i].mbuf->pool))\n+\t\t\t\treturn 0;\n+\n+\t\t\tm[j] = rte_pktmbuf_prefree_seg(txep[i].mbuf);\n+\n+\t\t\t/* In case 1, each of Tx buffers should be the\n+\t\t\t * last reference.\n+\t\t\t */\n+\t\t\tif (unlikely(m[j] == NULL && refill_requirement))\n+\t\t\t\treturn 0;\n+\t\t\t/* In case 2, the number of valid Tx free\n+\t\t\t * buffers should be recorded.\n+\t\t\t */\n+\t\t\tj++;\n+\t\t}\n+\t\trte_memcpy(rxep, m, sizeof(void *) * j);\n+\t}\n+\n+\t/* Update counters for Tx. */\n+\ttxq->nb_tx_free = (uint16_t)(txq->nb_tx_free + txq->tx_rs_thresh);\n+\ttxq->tx_next_dd = (uint16_t)(txq->tx_next_dd + txq->tx_rs_thresh);\n+\tif (txq->tx_next_dd >= txq->nb_tx_desc)\n+\t\ttxq->tx_next_dd = (uint16_t)(txq->tx_rs_thresh - 1);\n+\n+\treturn n;\n+}\ndiff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c\nindex 788ffb51c2..53cf787f04 100644\n--- a/drivers/net/i40e/i40e_rxtx.c\n+++ b/drivers/net/i40e/i40e_rxtx.c\n@@ -3197,6 +3197,30 @@ i40e_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n \tqinfo->conf.offloads = txq->offloads;\n }\n \n+void\n+i40e_recycle_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id,\n+\tstruct rte_eth_recycle_rxq_info *recycle_rxq_info)\n+{\n+\tstruct i40e_rx_queue *rxq;\n+\tstruct i40e_adapter *ad =\n+\t\tI40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);\n+\n+\trxq = dev->data->rx_queues[queue_id];\n+\n+\trecycle_rxq_info->mbuf_ring = (void *)rxq->sw_ring;\n+\trecycle_rxq_info->mp = rxq->mp;\n+\trecycle_rxq_info->mbuf_ring_size = rxq->nb_rx_desc;\n+\trecycle_rxq_info->receive_tail = &rxq->rx_tail;\n+\n+\tif (ad->rx_vec_allowed) {\n+\t\trecycle_rxq_info->refill_requirement = RTE_I40E_RXQ_REARM_THRESH;\n+\t\trecycle_rxq_info->refill_head = &rxq->rxrearm_start;\n+\t} else {\n+\t\trecycle_rxq_info->refill_requirement = rxq->rx_free_thresh;\n+\t\trecycle_rxq_info->refill_head = &rxq->rx_free_trigger;\n+\t}\n+}\n+\n #ifdef RTE_ARCH_X86\n static inline bool\n get_avx_supported(bool request_avx512)\n@@ -3291,6 +3315,8 @@ i40e_set_rx_function(struct rte_eth_dev *dev)\n \t\t\t\tdev->rx_pkt_burst = ad->rx_use_avx2 ?\n \t\t\t\t\ti40e_recv_scattered_pkts_vec_avx2 :\n \t\t\t\t\ti40e_recv_scattered_pkts_vec;\n+\t\t\t\tdev->recycle_rx_descriptors_refill =\n+\t\t\t\t\ti40e_recycle_rx_descriptors_refill_vec;\n \t\t\t}\n \t\t} else {\n \t\t\tif (ad->rx_use_avx512) {\n@@ -3309,9 +3335,12 @@ i40e_set_rx_function(struct rte_eth_dev *dev)\n \t\t\t\tdev->rx_pkt_burst = ad->rx_use_avx2 ?\n \t\t\t\t\ti40e_recv_pkts_vec_avx2 :\n \t\t\t\t\ti40e_recv_pkts_vec;\n+\t\t\t\tdev->recycle_rx_descriptors_refill =\n+\t\t\t\t\ti40e_recycle_rx_descriptors_refill_vec;\n \t\t\t}\n \t\t}\n #else /* RTE_ARCH_X86 */\n+\t\tdev->recycle_rx_descriptors_refill = i40e_recycle_rx_descriptors_refill_vec;\n \t\tif (dev->data->scattered_rx) {\n \t\t\tPMD_INIT_LOG(DEBUG,\n \t\t\t\t \"Using Vector Scattered Rx (port %d).\",\n@@ -3479,15 +3508,18 @@ i40e_set_tx_function(struct rte_eth_dev *dev)\n \t\t\t\tdev->tx_pkt_burst = ad->tx_use_avx2 ?\n \t\t\t\t\t\t i40e_xmit_pkts_vec_avx2 :\n \t\t\t\t\t\t i40e_xmit_pkts_vec;\n+\t\t\t\tdev->recycle_tx_mbufs_reuse = i40e_recycle_tx_mbufs_reuse_vec;\n \t\t\t}\n #else /* RTE_ARCH_X86 */\n \t\t\tPMD_INIT_LOG(DEBUG, \"Using Vector Tx (port %d).\",\n \t\t\t\t dev->data->port_id);\n \t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_vec;\n+\t\t\tdev->recycle_tx_mbufs_reuse = i40e_recycle_tx_mbufs_reuse_vec;\n #endif /* RTE_ARCH_X86 */\n \t\t} else {\n \t\t\tPMD_INIT_LOG(DEBUG, \"Simple tx finally be used.\");\n \t\t\tdev->tx_pkt_burst = i40e_xmit_pkts_simple;\n+\t\t\tdev->recycle_tx_mbufs_reuse = i40e_recycle_tx_mbufs_reuse_vec;\n \t\t}\n \t\tdev->tx_pkt_prepare = i40e_simple_prep_pkts;\n \t} else {\ndiff --git a/drivers/net/i40e/i40e_rxtx.h b/drivers/net/i40e/i40e_rxtx.h\nindex 5e6eecc501..ed8921ddc0 100644\n--- a/drivers/net/i40e/i40e_rxtx.h\n+++ b/drivers/net/i40e/i40e_rxtx.h\n@@ -233,6 +233,10 @@ uint32_t i40e_dev_rx_queue_count(void *rx_queue);\n int i40e_dev_rx_descriptor_status(void *rx_queue, uint16_t offset);\n int i40e_dev_tx_descriptor_status(void *tx_queue, uint16_t offset);\n \n+uint16_t i40e_recycle_tx_mbufs_reuse_vec(void *tx_queue,\n+\t\tstruct rte_eth_recycle_rxq_info *recycle_rxq_info);\n+void i40e_recycle_rx_descriptors_refill_vec(void *rx_queue, uint16_t nb_mbufs);\n+\n uint16_t i40e_recv_pkts_vec(void *rx_queue, struct rte_mbuf **rx_pkts,\n \t\t\t uint16_t nb_pkts);\n uint16_t i40e_recv_scattered_pkts_vec(void *rx_queue,\ndiff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build\nindex 8e53b87a65..58eb627abc 100644\n--- a/drivers/net/i40e/meson.build\n+++ b/drivers/net/i40e/meson.build\n@@ -42,6 +42,8 @@ testpmd_sources = files('i40e_testpmd.c')\n deps += ['hash']\n includes += include_directories('base')\n \n+sources += files('i40e_recycle_mbufs_vec_common.c')\n+\n if arch_subdir == 'x86'\n sources += files('i40e_rxtx_vec_sse.c')\n \n", "prefixes": [ "v6", "2/4" ] }