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{
    "id": 127167,
    "url": "http://patches.dpdk.org/api/patches/127167/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230522132332.102030-2-simei.su@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230522132332.102030-2-simei.su@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230522132332.102030-2-simei.su@intel.com",
    "date": "2023-05-22T13:23:30",
    "name": "[RFC,v3,1/3] ethdev: add frequency adjustment API",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "bb871a33fe3d4181a7db9cc7a2eb6da1c85eda00",
    "submitter": {
        "id": 1298,
        "url": "http://patches.dpdk.org/api/people/1298/?format=api",
        "name": "Simei Su",
        "email": "simei.su@intel.com"
    },
    "delegate": {
        "id": 319,
        "url": "http://patches.dpdk.org/api/users/319/?format=api",
        "username": "fyigit",
        "first_name": "Ferruh",
        "last_name": "Yigit",
        "email": "ferruh.yigit@amd.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230522132332.102030-2-simei.su@intel.com/mbox/",
    "series": [
        {
            "id": 28113,
            "url": "http://patches.dpdk.org/api/series/28113/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=28113",
            "date": "2023-05-22T13:23:29",
            "name": "add frequency adjustment support for PTP timesync",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/28113/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/127167/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/127167/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
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        "X-IronPort-AV": [
            "E=McAfee;i=\"6600,9927,10717\"; a=\"342369339\"",
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            "E=McAfee;i=\"6600,9927,10717\"; a=\"950085689\"",
            "E=Sophos;i=\"6.00,184,1681196400\"; d=\"scan'208\";a=\"950085689\""
        ],
        "X-ExtLoop1": "1",
        "From": "Simei Su <simei.su@intel.com>",
        "To": "thomas@monjalon.net, ferruh.yigit@amd.com, andrew.rybchenko@oktetlabs.ru,\n kirill.rybalchenko@intel.com, qi.z.zhang@intel.com",
        "Cc": "dev@dpdk.org,\n\twenjun1.wu@intel.com,\n\tSimei Su <simei.su@intel.com>",
        "Subject": "[RFC v3 1/3] ethdev: add frequency adjustment API",
        "Date": "Mon, 22 May 2023 21:23:30 +0800",
        "Message-Id": "<20230522132332.102030-2-simei.su@intel.com>",
        "X-Mailer": "git-send-email 2.9.5",
        "In-Reply-To": "<20230522132332.102030-1-simei.su@intel.com>",
        "References": "<20230403092248.81551-1-simei.su@intel.com>\n <20230522132332.102030-1-simei.su@intel.com>",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "This patch introduces a new timesync API \"rte_eth_timesync_adjust_fine\"\nwhich enables finer adjustment of the PHC clock. During PTP timesync,\n\"rte_eth_timesync_adjust_time\" focuses on phase adjustment while\n\"rte_eth_timesync_adjust_fine\" focuses on frequency adjustment.\n\nThis new function gets the scaled_ppm (desired frequency offset from\nnominal frequency in parts per million, but with a 16 bit binary\nfractional field).\n\nSigned-off-by: Simei Su <simei.su@intel.com>\nSigned-off-by: Wenjun Wu <wenjun1.wu@intel.com>\n---\n lib/ethdev/ethdev_driver.h       |  5 +++++\n lib/ethdev/ethdev_trace.h        |  9 +++++++++\n lib/ethdev/ethdev_trace_points.c |  3 +++\n lib/ethdev/rte_ethdev.c          | 19 +++++++++++++++++++\n lib/ethdev/rte_ethdev.h          | 38 ++++++++++++++++++++++++++++++++++++++\n 5 files changed, 74 insertions(+)",
    "diff": "diff --git a/lib/ethdev/ethdev_driver.h b/lib/ethdev/ethdev_driver.h\nindex 2c9d615..b6fce64 100644\n--- a/lib/ethdev/ethdev_driver.h\n+++ b/lib/ethdev/ethdev_driver.h\n@@ -633,6 +633,9 @@ typedef int (*eth_timesync_read_tx_timestamp_t)(struct rte_eth_dev *dev,\n /** @internal Function used to adjust the device clock. */\n typedef int (*eth_timesync_adjust_time)(struct rte_eth_dev *dev, int64_t);\n \n+/** @internal Function used to adjust the clock increment rate. */\n+typedef int (*eth_timesync_adjust_fine)(struct rte_eth_dev *dev, int64_t);\n+\n /** @internal Function used to get time from the device clock. */\n typedef int (*eth_timesync_read_time)(struct rte_eth_dev *dev,\n \t\t\t\t      struct timespec *timestamp);\n@@ -1344,6 +1347,8 @@ struct eth_dev_ops {\n \teth_timesync_read_tx_timestamp_t timesync_read_tx_timestamp;\n \t/** Adjust the device clock */\n \teth_timesync_adjust_time   timesync_adjust_time;\n+\t/** Adjust the clock increment rate */\n+\teth_timesync_adjust_fine   timesync_adjust_fine;\n \t/** Get the device clock time */\n \teth_timesync_read_time     timesync_read_time;\n \t/** Set the device clock time */\ndiff --git a/lib/ethdev/ethdev_trace.h b/lib/ethdev/ethdev_trace.h\nindex 3dc7d02..1b10aab 100644\n--- a/lib/ethdev/ethdev_trace.h\n+++ b/lib/ethdev/ethdev_trace.h\n@@ -2196,6 +2196,15 @@ RTE_TRACE_POINT_FP(\n \trte_trace_point_emit_int(ret);\n )\n \n+/* Called in loop in examples/ptpclient */\n+RTE_TRACE_POINT_FP(\n+\trte_eth_trace_timesync_adjust_fine,\n+\tRTE_TRACE_POINT_ARGS(uint16_t port_id, int64_t scaled_ppm, int ret),\n+\trte_trace_point_emit_u16(port_id);\n+\trte_trace_point_emit_i64(scaled_ppm);\n+\trte_trace_point_emit_int(ret);\n+)\n+\n /* Called in loop in app/test-flow-perf */\n RTE_TRACE_POINT_FP(\n \trte_flow_trace_create,\ndiff --git a/lib/ethdev/ethdev_trace_points.c b/lib/ethdev/ethdev_trace_points.c\nindex 61010ca..b7ac391 100644\n--- a/lib/ethdev/ethdev_trace_points.c\n+++ b/lib/ethdev/ethdev_trace_points.c\n@@ -406,6 +406,9 @@ RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_read_tx_timestamp,\n RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_adjust_time,\n \tlib.ethdev.timesync_adjust_time)\n \n+RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_adjust_fine,\n+\tlib.ethdev.timesync_adjust_fine)\n+\n RTE_TRACE_POINT_REGISTER(rte_eth_trace_timesync_read_time,\n \tlib.ethdev.timesync_read_time)\n \ndiff --git a/lib/ethdev/rte_ethdev.c b/lib/ethdev/rte_ethdev.c\nindex 4d03255..17be7c8 100644\n--- a/lib/ethdev/rte_ethdev.c\n+++ b/lib/ethdev/rte_ethdev.c\n@@ -6017,6 +6017,25 @@ rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)\n }\n \n int\n+rte_eth_timesync_adjust_fine(uint16_t port_id, int64_t scaled_ppm)\n+{\n+\tstruct rte_eth_dev *dev;\n+\tint ret;\n+\n+\tRTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);\n+\tdev = &rte_eth_devices[port_id];\n+\n+\tif (*dev->dev_ops->timesync_adjust_fine == NULL)\n+\t\treturn -ENOTSUP;\n+\tret = eth_err(port_id, (*dev->dev_ops->timesync_adjust_fine)(dev,\n+\t\t\t\t\t\t\t\tscaled_ppm));\n+\n+\trte_eth_trace_timesync_adjust_fine(port_id, scaled_ppm, ret);\n+\n+\treturn ret;\n+}\n+\n+int\n rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)\n {\n \tstruct rte_eth_dev *dev;\ndiff --git a/lib/ethdev/rte_ethdev.h b/lib/ethdev/rte_ethdev.h\nindex 99fe9e2..a743d83 100644\n--- a/lib/ethdev/rte_ethdev.h\n+++ b/lib/ethdev/rte_ethdev.h\n@@ -5102,6 +5102,44 @@ int rte_eth_timesync_read_tx_timestamp(uint16_t port_id,\n int rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta);\n \n /**\n+ * Adjust the frequency of the PHC cycle counter by the indicated amount\n+ * from the base frequency.\n+ *\n+ * This function is used to do hardware timestamp adjustment in fine\n+ * granularity. It can be used in conjunction with rte_eth_timesync_adjust_time\n+ * to do more precise time control.\n+ *\n+ * E.g, below is a simple usage:\n+ * if master offset > master offset threshold\n+ *\tdo rte_eth_timesync_adjust_time;\n+ * else\n+ *\tdo rte_eth_timesync_adjust_fine;\n+ *\n+ * The user can apply a control algorithm to leverage these two APIs, one\n+ * example is in dpdk-ptpclient.\n+ *\n+ * This API is implemented with the below basic logic:\n+ *   - Determine a base frequency value\n+ *   - Multiply this by the abs() of the requested adjustment, then divide by\n+ *     the appropriate divisor (65536 billion).\n+ *   - Add or subtract this difference from the base frequency to calculate a\n+ *     new adjustment.\n+ *\n+ * @param port_id\n+ *  The port identifier of the Ethernet device.\n+ * @param scaled_ppm\n+ *  Desired frequency change in scaled parts per million. Scaled parts per\n+ *  million is ppm with a 16-bit binary fractional field.\n+ *\n+ * @return\n+ *   - 0: Success.\n+ *   - -ENODEV: The port ID is invalid.\n+ *   - -EIO: if device is removed.\n+ *   - -ENOTSUP: The function is not supported by the Ethernet driver.\n+ */\n+int rte_eth_timesync_adjust_fine(uint16_t port_id, int64_t scaled_ppm);\n+\n+/**\n  * Read the time from the timesync clock on an Ethernet device.\n  *\n  * This is usually used in conjunction with other Ethdev timesync functions to\n",
    "prefixes": [
        "RFC",
        "v3",
        "1/3"
    ]
}