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GET /api/patches/126848/?format=api
{ "id": 126848, "url": "http://patches.dpdk.org/api/patches/126848/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230515064700.624054-5-miao.li@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230515064700.624054-5-miao.li@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230515064700.624054-5-miao.li@intel.com", "date": "2023-05-15T06:47:00", "name": "[v1,4/4] bus/pci: add VFIO sparse mmap support", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "4af3e1eb88e61bbfcc0c08815bbfd02676af7722", "submitter": { "id": 2220, "url": "http://patches.dpdk.org/api/people/2220/?format=api", "name": "Li, Miao", "email": "miao.li@intel.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230515064700.624054-5-miao.li@intel.com/mbox/", "series": [ { "id": 27992, "url": "http://patches.dpdk.org/api/series/27992/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27992", "date": "2023-05-15T06:46:56", "name": "Support VFIO sparse mmap in PCI bus", "version": 1, "mbox": "http://patches.dpdk.org/series/27992/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/126848/comments/", "check": "fail", "checks": "http://patches.dpdk.org/api/patches/126848/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 311D942B0E;\n\tMon, 15 May 2023 08:47:48 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D4B4A42D36;\n\tMon, 15 May 2023 08:47:37 +0200 (CEST)", "from mga06.intel.com (mga06b.intel.com [134.134.136.31])\n by mails.dpdk.org (Postfix) with ESMTP id 9314042D2F\n for <dev@dpdk.org>; Mon, 15 May 2023 08:47:35 +0200 (CEST)", "from orsmga003.jf.intel.com ([10.7.209.27])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 14 May 2023 23:47:34 -0700", "from dpdk-limiao-icelake.sh.intel.com ([10.67.111.26])\n by orsmga003.jf.intel.com with ESMTP; 14 May 2023 23:47:31 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1684133256; x=1715669256;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=IY2xaN6wL5dhjjXDZmA+NH9Y+vfe7IlCIFcI/K94qkk=;\n b=YulBaBFjGDGKZNzEvl51bTsbCzxPTZ+NP4tVVNGPOWgGnc4d89ZX/Got\n TNZbuo5UpK8wqv+JFdzGusn5MFpYgW/tgF8RoM7hipHdx4UDgD24W8+IC\n T7/UwlZP6Ed9od9AOGR4NWn9TSb1bwpKEs/gQfgITedJERO4GdtC9UVGU\n xYVauvmbV+OH0lGwOpaVraLtFQ8YKdL6027Wni37woLksSyMgWgQmHECr\n 3+HTryYYsIjJ15FiWqqHD4ElcggxTW40lttzbu5bT3/bakjIJiVYaYVOh\n OFwcDcWBH/t8sfEZ6lfNmdFQydnXEg8LWHC9iTI1z+gQdIuA7VrZuOWqn Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10710\"; a=\"414520173\"", "E=Sophos;i=\"5.99,275,1677571200\"; d=\"scan'208\";a=\"414520173\"", "E=McAfee;i=\"6600,9927,10710\"; a=\"651306343\"", "E=Sophos;i=\"5.99,275,1677571200\"; d=\"scan'208\";a=\"651306343\"" ], "X-ExtLoop1": "1", "From": "Miao Li <miao.li@intel.com>", "To": "dev@dpdk.org", "Cc": "skori@marvell.com, thomas@monjalon.net, david.marchand@redhat.com,\n ferruh.yigit@amd.com, chenbo.xia@intel.com, yahui.cao@intel.com,\n Anatoly Burakov <anatoly.burakov@intel.com>", "Subject": "[PATCH v1 4/4] bus/pci: add VFIO sparse mmap support", "Date": "Mon, 15 May 2023 06:47:00 +0000", "Message-Id": "<20230515064700.624054-5-miao.li@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230515064700.624054-1-miao.li@intel.com>", "References": "<20230418053012.10667-1-chenbo.xia@intel.com>\n <20230515064700.624054-1-miao.li@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "This patch adds sparse mmap support in PCI bus. Sparse mmap is a\ncapability defined in VFIO which allows multiple mmap areas in one\nVFIO region.\n\nIn this patch, the sparse mmap regions are mapped to one continuous\nvirtual address region that follows device-specific BAR layout. So,\ndriver can still access all mapped sparse mmap regions by using\n'bar_base_address + bar_offset'.\n\nSigned-off-by: Miao Li <miao.li@intel.com>\nSigned-off-by: Chenbo Xia <chenbo.xia@intel.com>\n---\n drivers/bus/pci/linux/pci_vfio.c | 104 +++++++++++++++++++++++++++----\n drivers/bus/pci/private.h | 2 +\n 2 files changed, 94 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/bus/pci/linux/pci_vfio.c b/drivers/bus/pci/linux/pci_vfio.c\nindex f6289c907f..304c168e01 100644\n--- a/drivers/bus/pci/linux/pci_vfio.c\n+++ b/drivers/bus/pci/linux/pci_vfio.c\n@@ -673,6 +673,54 @@ pci_vfio_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res,\n \treturn 0;\n }\n \n+static int\n+pci_vfio_sparse_mmap_bar(int vfio_dev_fd, struct mapped_pci_resource *vfio_res,\n+\t\tint bar_index, int additional_flags)\n+{\n+\tstruct pci_map *bar = &vfio_res->maps[bar_index];\n+\tstruct vfio_region_sparse_mmap_area *sparse;\n+\tvoid *bar_addr;\n+\tuint32_t i;\n+\n+\tif (bar->size == 0) {\n+\t\tRTE_LOG(DEBUG, EAL, \"Bar size is 0, skip BAR%d\\n\", bar_index);\n+\t\treturn 0;\n+\t}\n+\n+\t/* reserve the address using an inaccessible mapping */\n+\tbar_addr = mmap(bar->addr, bar->size, 0, MAP_PRIVATE |\n+\t\t\tMAP_ANONYMOUS | additional_flags, -1, 0);\n+\tif (bar_addr != MAP_FAILED) {\n+\t\tvoid *map_addr = NULL;\n+\t\tfor (i = 0; i < bar->nr_areas; i++) {\n+\t\t\tsparse = &bar->areas[i];\n+\t\t\tif (sparse->size) {\n+\t\t\t\tvoid *addr = RTE_PTR_ADD(bar_addr, sparse->offset);\n+\t\t\t\tmap_addr = pci_map_resource(addr, vfio_dev_fd,\n+\t\t\t\t\tbar->offset + sparse->offset, sparse->size,\n+\t\t\t\t\tRTE_MAP_FORCE_ADDRESS);\n+\t\t\t\tif (map_addr == NULL) {\n+\t\t\t\t\tmunmap(bar_addr, bar->size);\n+\t\t\t\t\tRTE_LOG(ERR, EAL, \"Failed to map pci BAR%d\\n\",\n+\t\t\t\t\t\tbar_index);\n+\t\t\t\t\tgoto err_map;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t} else {\n+\t\tRTE_LOG(ERR, EAL, \"Failed to create inaccessible mapping for BAR%d\\n\",\n+\t\t\tbar_index);\n+\t\tgoto err_map;\n+\t}\n+\n+\tbar->addr = bar_addr;\n+\treturn 0;\n+\n+err_map:\n+\tbar->nr_areas = 0;\n+\treturn -1;\n+}\n+\n /*\n * region info may contain capability headers, so we need to keep reallocating\n * the memory until we match allocated memory size with argsz.\n@@ -875,6 +923,8 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)\n \n \tfor (i = 0; i < vfio_res->nb_maps; i++) {\n \t\tvoid *bar_addr;\n+\t\tstruct vfio_info_cap_header *hdr;\n+\t\tstruct vfio_region_info_cap_sparse_mmap *sparse;\n \n \t\tret = pci_vfio_get_region_info(vfio_dev_fd, ®, i);\n \t\tif (ret < 0) {\n@@ -920,12 +970,33 @@ pci_vfio_map_resource_primary(struct rte_pci_device *dev)\n \t\tmaps[i].size = reg->size;\n \t\tmaps[i].path = NULL; /* vfio doesn't have per-resource paths */\n \n-\t\tret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0);\n-\t\tif (ret < 0) {\n-\t\t\tRTE_LOG(ERR, EAL, \"%s mapping BAR%i failed: %s\\n\",\n-\t\t\t\t\tpci_addr, i, strerror(errno));\n-\t\t\tfree(reg);\n-\t\t\tgoto err_vfio_res;\n+\t\thdr = pci_vfio_info_cap(reg, VFIO_REGION_INFO_CAP_SPARSE_MMAP);\n+\n+\t\tif (hdr != NULL) {\n+\t\t\tsparse = container_of(hdr,\n+\t\t\t\tstruct vfio_region_info_cap_sparse_mmap, header);\n+\t\t\tif (sparse->nr_areas > 0) {\n+\t\t\t\tmaps[i].nr_areas = sparse->nr_areas;\n+\t\t\t\tmaps[i].areas = sparse->areas;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (maps[i].nr_areas > 0) {\n+\t\t\tret = pci_vfio_sparse_mmap_bar(vfio_dev_fd, vfio_res, i, 0);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tRTE_LOG(ERR, EAL, \"%s sparse mapping BAR%i failed: %s\\n\",\n+\t\t\t\t\t\tpci_addr, i, strerror(errno));\n+\t\t\t\tfree(reg);\n+\t\t\t\tgoto err_vfio_res;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tRTE_LOG(ERR, EAL, \"%s mapping BAR%i failed: %s\\n\",\n+\t\t\t\t\t\tpci_addr, i, strerror(errno));\n+\t\t\t\tfree(reg);\n+\t\t\t\tgoto err_vfio_res;\n+\t\t\t}\n \t\t}\n \n \t\tdev->mem_resource[i].addr = maps[i].addr;\n@@ -1008,11 +1079,20 @@ pci_vfio_map_resource_secondary(struct rte_pci_device *dev)\n \tmaps = vfio_res->maps;\n \n \tfor (i = 0; i < vfio_res->nb_maps; i++) {\n-\t\tret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, MAP_FIXED);\n-\t\tif (ret < 0) {\n-\t\t\tRTE_LOG(ERR, EAL, \"%s mapping BAR%i failed: %s\\n\",\n-\t\t\t\t\tpci_addr, i, strerror(errno));\n-\t\t\tgoto err_vfio_dev_fd;\n+\t\tif (maps[i].nr_areas > 0) {\n+\t\t\tret = pci_vfio_sparse_mmap_bar(vfio_dev_fd, vfio_res, i, 0);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tRTE_LOG(ERR, EAL, \"%s sparse mapping BAR%i failed: %s\\n\",\n+\t\t\t\t\t\tpci_addr, i, strerror(errno));\n+\t\t\t\tgoto err_vfio_dev_fd;\n+\t\t\t}\n+\t\t} else {\n+\t\t\tret = pci_vfio_mmap_bar(vfio_dev_fd, vfio_res, i, 0);\n+\t\t\tif (ret < 0) {\n+\t\t\t\tRTE_LOG(ERR, EAL, \"%s mapping BAR%i failed: %s\\n\",\n+\t\t\t\t\t\tpci_addr, i, strerror(errno));\n+\t\t\t\tgoto err_vfio_dev_fd;\n+\t\t\t}\n \t\t}\n \n \t\tdev->mem_resource[i].addr = maps[i].addr;\n@@ -1062,7 +1142,7 @@ find_and_unmap_vfio_resource(struct mapped_pci_res_list *vfio_res_list,\n \t\tbreak;\n \t}\n \n-\tif (vfio_res == NULL)\n+\tif (vfio_res == NULL)\n \t\treturn vfio_res;\n \n \tRTE_LOG(INFO, EAL, \"Releasing PCI mapped resource for %s\\n\",\ndiff --git a/drivers/bus/pci/private.h b/drivers/bus/pci/private.h\nindex 2d6991ccb7..8b0ce73533 100644\n--- a/drivers/bus/pci/private.h\n+++ b/drivers/bus/pci/private.h\n@@ -121,6 +121,8 @@ struct pci_map {\n \tuint64_t offset;\n \tuint64_t size;\n \tuint64_t phaddr;\n+\tuint32_t nr_areas;\n+\tstruct vfio_region_sparse_mmap_area *areas;\n };\n \n struct pci_msix_table {\n", "prefixes": [ "v1", "4/4" ] }