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GET /api/patches/126633/?format=api
{ "id": 126633, "url": "http://patches.dpdk.org/api/patches/126633/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230428144647.1072-7-ktejasree@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230428144647.1072-7-ktejasree@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230428144647.1072-7-ktejasree@marvell.com", "date": "2023-04-28T14:46:46", "name": "[6/7] crypto/cnxk: increase max segments", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "0580079c2c713fe793eed45c3cbec3fea5531448", "submitter": { "id": 1789, "url": "http://patches.dpdk.org/api/people/1789/?format=api", "name": "Tejasree Kondoj", "email": "ktejasree@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230428144647.1072-7-ktejasree@marvell.com/mbox/", "series": [ { "id": 27901, "url": "http://patches.dpdk.org/api/series/27901/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27901", "date": "2023-04-28T14:46:40", "name": "fixes and improvements to CNXK crypto PMD", "version": 1, "mbox": "http://patches.dpdk.org/series/27901/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/126633/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/126633/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 96AD842A12;\n\tFri, 28 Apr 2023 16:47:38 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id E6DD242FAE;\n\tFri, 28 Apr 2023 16:47:19 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 59EF042FB8\n for <dev@dpdk.org>; Fri, 28 Apr 2023 16:47:18 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 33SEOJmF007095 for <dev@dpdk.org>; Fri, 28 Apr 2023 07:47:17 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3q781hydy8-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 28 Apr 2023 07:47:17 -0700", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Fri, 28 Apr 2023 07:47:15 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Fri, 28 Apr 2023 07:47:15 -0700", "from HY-LT1085.marvell.com (unknown [10.193.84.114])\n by maili.marvell.com (Postfix) with ESMTP id 263A45B6930;\n Fri, 28 Apr 2023 07:47:11 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=OmPgvaPaB03iAuRE+VtKfWPCVVFB5zxpmSKlpxrFsb0=;\n b=KnOchW4B6iD5X4SR6DFuaGuQ0jHJX9iAZyyUybgY5OCePWk/qTgvXsdNM2lq6pDN8mBW\n DyP0HBlnarV+IXpCBe+LTG+JVm48wSl72GEQ2/qkL8BoOasl7Ujzg4c3XD9blU0evkq1\n 67GpSnadHsh+5OSwuxkCDS2WKgyjpZSgUgv7cXi3K1O9/TOzF5CVBEidB8k3W613KF3O\n t+7xJuNgCLzgc4+A/M5XKbqlAzyNYU+tfmCRmWYlKDNTtYvXccDSkZHkCNGBkuWSfg4W\n N7R84VTKKCa0onwMVoJuMuBVdrwNjDhDteeif/KIIm/kMHvjwJuO6h6fpBTBNERfPhsc Ww==", "From": "Tejasree Kondoj <ktejasree@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>", "CC": "Anoob Joseph <anoobj@marvell.com>, Jerin Jacob <jerinj@marvell.com>,\n Aakash Sasidharan <asasidharan@marvell.com>, Gowrishankar Muthukrishnan\n <gmuthukrishn@marvell.com>,\n Vidya Sagar Velumuri <vvelumuri@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH 6/7] crypto/cnxk: increase max segments", "Date": "Fri, 28 Apr 2023 20:16:46 +0530", "Message-ID": "<20230428144647.1072-7-ktejasree@marvell.com>", "X-Mailer": "git-send-email 2.40.1.windows.1", "In-Reply-To": "<20230428144647.1072-1-ktejasree@marvell.com>", "References": "<20230428144647.1072-1-ktejasree@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "eDgt-npbRgbATKM7KRtKmfIbZdcrqkTA", "X-Proofpoint-ORIG-GUID": "eDgt-npbRgbATKM7KRtKmfIbZdcrqkTA", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22\n definitions=2023-04-28_04,2023-04-27_01,2023-02-09_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Anoob Joseph <anoobj@marvell.com>\n\nIncrease max segments to allow max values supported by\nhardware/microcode. For SG_VER2, max number of descriptors supported\nwould be 45. For SG_VER1, maximum number of total components would be\n100.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\n---\n drivers/common/cnxk/roc_cpt_sg.h | 4 +-\n drivers/crypto/cnxk/cnxk_se.h | 90 ++++++++++++++++++++++++--------\n 2 files changed, 72 insertions(+), 22 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_cpt_sg.h b/drivers/common/cnxk/roc_cpt_sg.h\nindex 8a97e1aa5b..c12187144f 100644\n--- a/drivers/common/cnxk/roc_cpt_sg.h\n+++ b/drivers/common/cnxk/roc_cpt_sg.h\n@@ -7,11 +7,13 @@\n \n #define ROC_DMA_MODE_SG (1 << 7)\n \n-#define ROC_MAX_SG_IN_OUT_CNT 32\n+#define ROC_MAX_SG_IN_OUT_CNT 128\n #define ROC_MAX_SG_CNT\t (ROC_MAX_SG_IN_OUT_CNT / 2)\n \n #define ROC_SG_LIST_HDR_SIZE (8u)\n #define ROC_SG_ENTRY_SIZE sizeof(struct roc_sglist_comp)\n+#define ROC_SG_MAX_COMP\t 25\n+#define ROC_SG_MAX_DLEN_SIZE (ROC_SG_LIST_HDR_SIZE + (ROC_SG_MAX_COMP * ROC_SG_ENTRY_SIZE))\n \n struct roc_sglist_comp {\n \tunion {\ndiff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h\nindex 8715493cae..784b914137 100644\n--- a/drivers/crypto/cnxk/cnxk_se.h\n+++ b/drivers/crypto/cnxk/cnxk_se.h\n@@ -225,10 +225,10 @@ sg_inst_prep(struct roc_se_fc_params *params, struct cpt_inst_s *inst, uint64_t\n \tuint32_t mac_len = 0, aad_len = 0;\n \tstruct roc_se_ctx *se_ctx;\n \tuint32_t i, g_size_bytes;\n+\tint zsk_flags, ret = 0;\n \tuint64_t *offset_vaddr;\n \tuint32_t s_size_bytes;\n \tuint8_t *in_buffer;\n-\tint zsk_flags;\n \tuint32_t size;\n \tuint8_t *iv_d;\n \n@@ -395,8 +395,13 @@ sg_inst_prep(struct roc_se_fc_params *params, struct cpt_inst_s *inst, uint64_t\n \t/* This is DPTR len in case of SG mode */\n \tinst->w4.s.dlen = size;\n \n+\tif (unlikely(size > ROC_SG_MAX_DLEN_SIZE)) {\n+\t\tplt_dp_err(\"Exceeds max supported components. Reduce segments\");\n+\t\tret = -1;\n+\t}\n+\n \tinst->dptr = (uint64_t)in_buffer;\n-\treturn 0;\n+\treturn ret;\n }\n \n static __rte_always_inline int\n@@ -409,12 +414,13 @@ sg2_inst_prep(struct roc_se_fc_params *params, struct cpt_inst_s *inst, uint64_t\n \tvoid *m_vaddr = params->meta_buf.vaddr;\n \tstruct roc_se_buf_ptr *aad_buf = NULL;\n \tuint32_t mac_len = 0, aad_len = 0;\n+\tuint16_t scatter_sz, gather_sz;\n \tunion cpt_inst_w5 cpt_inst_w5;\n \tunion cpt_inst_w6 cpt_inst_w6;\n \tstruct roc_se_ctx *se_ctx;\n \tuint32_t i, g_size_bytes;\n \tuint64_t *offset_vaddr;\n-\tint zsk_flags;\n+\tint zsk_flags, ret = 0;\n \tuint32_t size;\n \tuint8_t *iv_d;\n \n@@ -435,6 +441,9 @@ sg2_inst_prep(struct roc_se_fc_params *params, struct cpt_inst_s *inst, uint64_t\n \n \tinst->w4.s.opcode_major |= (uint64_t)ROC_DMA_MODE_SG;\n \n+\t/* This is DPTR len in case of SG mode */\n+\tinst->w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;\n+\n \t/* iv offset is 0 */\n \t*offset_vaddr = offset_ctrl;\n \n@@ -505,9 +514,9 @@ sg2_inst_prep(struct roc_se_fc_params *params, struct cpt_inst_s *inst, uint64_t\n \t\t}\n \t}\n \n-\tcpt_inst_w5.s.gather_sz = ((i + 2) / 3);\n+\tgather_sz = (i + 2) / 3;\n+\tg_size_bytes = gather_sz * sizeof(struct roc_sg2list_comp);\n \n-\tg_size_bytes = ((i + 2) / 3) * sizeof(struct roc_sg2list_comp);\n \t/*\n \t * Output Scatter List\n \t */\n@@ -573,17 +582,23 @@ sg2_inst_prep(struct roc_se_fc_params *params, struct cpt_inst_s *inst, uint64_t\n \t\t}\n \t}\n \n-\tcpt_inst_w6.s.scatter_sz = ((i + 2) / 3);\n+\tscatter_sz = (i + 2) / 3;\n \n-\t/* This is DPTR len in case of SG mode */\n-\tinst->w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;\n+\tcpt_inst_w5.s.gather_sz = gather_sz;\n+\tcpt_inst_w6.s.scatter_sz = scatter_sz;\n \n \tcpt_inst_w5.s.dptr = (uint64_t)gather_comp;\n \tcpt_inst_w6.s.rptr = (uint64_t)scatter_comp;\n \n \tinst->w5.u64 = cpt_inst_w5.u64;\n \tinst->w6.u64 = cpt_inst_w6.u64;\n-\treturn 0;\n+\n+\tif (unlikely((scatter_sz >> 4) || (gather_sz >> 4))) {\n+\t\tplt_dp_err(\"Exceeds max supported components. Reduce segments\");\n+\t\tret = -1;\n+\t}\n+\n+\treturn ret;\n }\n \n static __rte_always_inline int\n@@ -599,6 +614,7 @@ cpt_digest_gen_sg_ver1_prep(uint32_t flags, uint64_t d_lens, struct roc_se_fc_pa\n \tstruct roc_se_ctx *ctx;\n \tuint8_t *in_buffer;\n \tuint32_t size, i;\n+\tint ret = 0;\n \n \tctx = params->ctx;\n \n@@ -692,22 +708,27 @@ cpt_digest_gen_sg_ver1_prep(uint32_t flags, uint64_t d_lens, struct roc_se_fc_pa\n \n \tsize = g_size_bytes + s_size_bytes + ROC_SG_LIST_HDR_SIZE;\n \n+\tif (unlikely(size > ROC_SG_MAX_DLEN_SIZE)) {\n+\t\tplt_dp_err(\"Exceeds max supported components. Reduce segments\");\n+\t\tret = -1;\n+\t}\n+\n \t/* This is DPTR len in case of SG mode */\n \tcpt_inst_w4.s.dlen = size;\n \n \tinst->dptr = (uint64_t)in_buffer;\n \tinst->w4.u64 = cpt_inst_w4.u64;\n \n-\treturn 0;\n+\treturn ret;\n }\n \n static __rte_always_inline int\n cpt_digest_gen_sg_ver2_prep(uint32_t flags, uint64_t d_lens, struct roc_se_fc_params *params,\n \t\t\t struct cpt_inst_s *inst)\n {\n+\tuint16_t data_len, mac_len, key_len, scatter_sz, gather_sz;\n \tstruct roc_sg2list_comp *gather_comp, *scatter_comp;\n \tvoid *m_vaddr = params->meta_buf.vaddr;\n-\tuint16_t data_len, mac_len, key_len;\n \tunion cpt_inst_w4 cpt_inst_w4;\n \tunion cpt_inst_w5 cpt_inst_w5;\n \tunion cpt_inst_w6 cpt_inst_w6;\n@@ -715,6 +736,7 @@ cpt_digest_gen_sg_ver2_prep(uint32_t flags, uint64_t d_lens, struct roc_se_fc_pa\n \tstruct roc_se_ctx *ctx;\n \tuint32_t g_size_bytes;\n \tuint32_t size, i;\n+\tint ret = 0;\n \n \tctx = params->ctx;\n \n@@ -768,9 +790,9 @@ cpt_digest_gen_sg_ver2_prep(uint32_t flags, uint64_t d_lens, struct roc_se_fc_pa\n \t\tplt_dp_err(\"Insufficient dst IOV size, short by %dB\", size);\n \t\treturn -1;\n \t}\n-\tcpt_inst_w5.s.gather_sz = ((i + 2) / 3);\n \n-\tg_size_bytes = ((i + 2) / 3) * sizeof(struct roc_sg2list_comp);\n+\tgather_sz = (i + 2) / 3;\n+\tg_size_bytes = gather_sz * sizeof(struct roc_sg2list_comp);\n \n \t/*\n \t * Output Gather list\n@@ -797,7 +819,10 @@ cpt_digest_gen_sg_ver2_prep(uint32_t flags, uint64_t d_lens, struct roc_se_fc_pa\n \t\t}\n \t}\n \n-\tcpt_inst_w6.s.scatter_sz = ((i + 2) / 3);\n+\tscatter_sz = (i + 2) / 3;\n+\n+\tcpt_inst_w5.s.gather_sz = gather_sz;\n+\tcpt_inst_w6.s.scatter_sz = scatter_sz;\n \n \tcpt_inst_w5.s.dptr = (uint64_t)gather_comp;\n \tcpt_inst_w6.s.rptr = (uint64_t)scatter_comp;\n@@ -807,7 +832,12 @@ cpt_digest_gen_sg_ver2_prep(uint32_t flags, uint64_t d_lens, struct roc_se_fc_pa\n \n \tinst->w4.u64 = cpt_inst_w4.u64;\n \n-\treturn 0;\n+\tif (unlikely((scatter_sz >> 4) || (gather_sz >> 4))) {\n+\t\tplt_dp_err(\"Exceeds max supported components. Reduce segments\");\n+\t\tret = -1;\n+\t}\n+\n+\treturn ret;\n }\n \n static inline int\n@@ -824,6 +854,7 @@ pdcp_chain_sg1_prep(struct roc_se_fc_params *params, struct roc_se_ctx *cpt_ctx,\n \tuint8_t *iv_d, *in_buffer;\n \tuint64_t *offset_vaddr;\n \tuint32_t size;\n+\tint ret = 0;\n \n \t/* save space for IV */\n \toffset_vaddr = m_vaddr;\n@@ -904,13 +935,18 @@ pdcp_chain_sg1_prep(struct roc_se_fc_params *params, struct roc_se_ctx *cpt_ctx,\n \n \tsize = g_size_bytes + s_size_bytes + ROC_SG_LIST_HDR_SIZE;\n \n+\tif (unlikely(size > ROC_SG_MAX_DLEN_SIZE)) {\n+\t\tplt_dp_err(\"Exceeds max supported components. Reduce segments\");\n+\t\tret = -1;\n+\t}\n+\n \t/* This is DPTR len in case of SG mode */\n \tw4.s.dlen = size;\n \tinst->w4.u64 = w4.u64;\n \n \tinst->dptr = (uint64_t)in_buffer;\n \n-\treturn 0;\n+\treturn ret;\n }\n \n static inline int\n@@ -922,6 +958,7 @@ pdcp_chain_sg2_prep(struct roc_se_fc_params *params, struct roc_se_ctx *cpt_ctx,\n {\n \tstruct roc_sg2list_comp *gather_comp, *scatter_comp;\n \tvoid *m_vaddr = params->meta_buf.vaddr;\n+\tuint16_t scatter_sz, gather_sz;\n \tconst uint32_t mac_len = 4;\n \tuint32_t i, g_size_bytes;\n \tuint64_t *offset_vaddr;\n@@ -929,6 +966,7 @@ pdcp_chain_sg2_prep(struct roc_se_fc_params *params, struct roc_se_ctx *cpt_ctx,\n \tunion cpt_inst_w6 w6;\n \tuint8_t *iv_d;\n \tuint32_t size;\n+\tint ret = 0;\n \n \t/* save space for IV */\n \toffset_vaddr = m_vaddr;\n@@ -968,9 +1006,9 @@ pdcp_chain_sg2_prep(struct roc_se_fc_params *params, struct roc_se_ctx *cpt_ctx,\n \t\t\treturn -1;\n \t\t}\n \t}\n-\tw5.s.gather_sz = ((i + 2) / 3);\n-\tw5.s.dptr = (uint64_t)gather_comp;\n-\tg_size_bytes = ((i + 2) / 3) * sizeof(struct roc_sg2list_comp);\n+\n+\tgather_sz = (i + 2) / 3;\n+\tg_size_bytes = gather_sz * sizeof(struct roc_sg2list_comp);\n \n \t/*\n \t * Output Scatter List\n@@ -1001,14 +1039,24 @@ pdcp_chain_sg2_prep(struct roc_se_fc_params *params, struct roc_se_ctx *cpt_ctx,\n \t\t}\n \t}\n \n-\tw6.s.scatter_sz = ((i + 2) / 3);\n+\tscatter_sz = (i + 2) / 3;\n+\n+\tw5.s.gather_sz = gather_sz;\n+\tw6.s.scatter_sz = scatter_sz;\n+\n+\tw5.s.dptr = (uint64_t)gather_comp;\n \tw6.s.rptr = (uint64_t)scatter_comp;\n \n \tinst->w4.u64 = w4.u64;\n \tinst->w5.u64 = w5.u64;\n \tinst->w6.u64 = w6.u64;\n \n-\treturn 0;\n+\tif (unlikely((scatter_sz >> 4) || (gather_sz >> 4))) {\n+\t\tplt_dp_err(\"Exceeds max supported components. Reduce segments\");\n+\t\tret = -1;\n+\t}\n+\n+\treturn ret;\n }\n \n static __rte_always_inline int\n", "prefixes": [ "6/7" ] }