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GET /api/patches/126573/?format=api
{ "id": 126573, "url": "http://patches.dpdk.org/api/patches/126573/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230427062001.478032-7-qiming.yang@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230427062001.478032-7-qiming.yang@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230427062001.478032-7-qiming.yang@intel.com", "date": "2023-04-27T06:19:37", "name": "[06/30] net/ice/base: add ability to set markid via switch filter", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "0c00468288a634111b9db0fe2eefe99ab9e868ae", "submitter": { "id": 522, "url": "http://patches.dpdk.org/api/people/522/?format=api", "name": "Qiming Yang", "email": "qiming.yang@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230427062001.478032-7-qiming.yang@intel.com/mbox/", "series": [ { "id": 27885, "url": "http://patches.dpdk.org/api/series/27885/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27885", "date": "2023-04-27T06:19:31", "name": "net/ice/base: share code update", "version": 1, "mbox": "http://patches.dpdk.org/series/27885/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/126573/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/126573/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A0E3C42A08;\n\tThu, 27 Apr 2023 08:38:39 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 342BD42D6C;\n\tThu, 27 Apr 2023 08:37:59 +0200 (CEST)", "from mga01.intel.com (mga01.intel.com [192.55.52.88])\n by mails.dpdk.org (Postfix) with ESMTP id 6851542D46\n for <dev@dpdk.org>; Thu, 27 Apr 2023 08:37:56 +0200 (CEST)", "from fmsmga002.fm.intel.com ([10.253.24.26])\n by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 26 Apr 2023 23:37:55 -0700", "from dpdk-qiming3.sh.intel.com ([10.67.111.4])\n by fmsmga002.fm.intel.com with ESMTP; 26 Apr 2023 23:37:53 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1682577476; x=1714113476;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=pADcOzUlbE8snxSSeTZx+QfLpkAHximSLLEIHUADapQ=;\n b=OoZfeMUvWlWJzCvJj1dtkqAWBFkvhivNQRBnQcXGgBPtJXp2Z9XOv1yP\n v/KaljhAPtbVVkmCTJZ6rVVJyvd4G4guT8fDz/gJ0HCea04ADqCa/fbrp\n awOmg0hhq25qa1vbgrB4qKyL2dzQsP737E7IzzokUk7N0YAT4F1QlnIak\n 2Wreu/jnVQ5xGSthc037gKb6RQAaLYIgaPPCNkb5qAC05KSssQjdf+V0H\n HkyLKvBxYRz0jkZFIDcbbR8eGmkHUe0eDa5NOKQGsQ6VND6MieNwQcddd\n dKQeWQoRGeGU4djCkDgIRgwzdGu/km2/EIUJBu7wS4rjft6mg61qJ+Ye4 w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10692\"; a=\"375324282\"", "E=Sophos;i=\"5.99,230,1677571200\"; d=\"scan'208\";a=\"375324282\"", "E=McAfee;i=\"6600,9927,10692\"; a=\"805845689\"", "E=Sophos;i=\"5.99,230,1677571200\"; d=\"scan'208\";a=\"805845689\"" ], "X-ExtLoop1": "1", "From": "Qiming Yang <qiming.yang@intel.com>", "To": "dev@dpdk.org", "Cc": "qi.z.zhang@intel.com, Qiming Yang <qiming.yang@intel.com>,\n Zhirun Yan <zhirun.yan@intel.com>", "Subject": "[PATCH 06/30] net/ice/base: add ability to set markid via switch\n filter", "Date": "Thu, 27 Apr 2023 06:19:37 +0000", "Message-Id": "<20230427062001.478032-7-qiming.yang@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230427062001.478032-1-qiming.yang@intel.com>", "References": "<20230427062001.478032-1-qiming.yang@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Support to add large action to set 32 bits markid via switch filter.\nFor OVS-DPDK VXLAN acceleration solution, switch markid will be used\nfor mega flow match for decap.\nFor one ptype, the pattern may have different fields as follow:\n eth / ipv4 src / udp dst\n eth / ipv4 dst src / udp dst\nFDIR will have conflict with the same profile id. So we could chose\nswitch to set markid.\n\nSigned-off-by: Zhirun Yan <zhirun.yan@intel.com>\nSigned-off-by: Qiming Yang <qiming.yang@intel.com>\n---\n drivers/net/ice/base/ice_common.c | 17 ++++++++++-\n drivers/net/ice/base/ice_sched.c | 2 +-\n drivers/net/ice/base/ice_switch.c | 48 +++++++++++++++++++++++++++----\n drivers/net/ice/base/ice_switch.h | 26 +++++++++--------\n drivers/net/ice/base/ice_type.h | 3 ++\n 5 files changed, 77 insertions(+), 19 deletions(-)", "diff": "diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c\nindex 006ffa802c..5bd40ece78 100644\n--- a/drivers/net/ice/base/ice_common.c\n+++ b/drivers/net/ice/base/ice_common.c\n@@ -2369,6 +2369,11 @@ ice_parse_common_caps(struct ice_hw *hw, struct ice_hw_common_caps *caps,\n \t\t\ttrue : false;\n \t\tice_debug(hw, ICE_DBG_INIT, \"%s: nvm_unified_update = %d\\n\", prefix,\n \t\t\t caps->nvm_unified_update);\n+\t\tcaps->netlist_auth =\n+\t\t\t(number & ICE_NVM_MGMT_NETLIST_AUTH_SUPPORT) ?\n+\t\t\ttrue : false;\n+\t\tice_debug(hw, ICE_DBG_INIT, \"%s: netlist_auth = %d\\n\", prefix,\n+\t\t\t caps->netlist_auth);\n \t\tbreak;\n \tcase ICE_AQC_CAPS_MAX_MTU:\n \t\tcaps->max_mtu = number;\n@@ -3814,6 +3819,7 @@ enum ice_status\n ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,\n \t\t\t struct ice_sq_cd *cd)\n {\n+\tenum ice_status status = ICE_ERR_AQ_ERROR;\n \tstruct ice_aqc_restart_an *cmd;\n \tstruct ice_aq_desc desc;\n \n@@ -3828,7 +3834,16 @@ ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,\n \telse\n \t\tcmd->cmd_flags &= ~ICE_AQC_RESTART_AN_LINK_ENABLE;\n \n-\treturn ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd);\n+\tstatus = ice_aq_send_cmd(pi->hw, &desc, NULL, 0, cd);\n+\tif (status)\n+\t\treturn status;\n+\n+\tif (ena_link)\n+\t\tpi->phy.curr_user_phy_cfg.caps |= ICE_AQC_PHY_EN_LINK;\n+\telse\n+\t\tpi->phy.curr_user_phy_cfg.caps &= ~ICE_AQC_PHY_EN_LINK;\n+\n+\treturn ICE_SUCCESS;\n }\n \n /**\ndiff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c\nindex 83cd152388..e3a638dcdd 100644\n--- a/drivers/net/ice/base/ice_sched.c\n+++ b/drivers/net/ice/base/ice_sched.c\n@@ -1057,11 +1057,11 @@ ice_sched_add_nodes_to_layer(struct ice_port_info *pi,\n \tu32 *first_teid_ptr = first_node_teid;\n \tu16 new_num_nodes = num_nodes;\n \tenum ice_status status = ICE_SUCCESS;\n+\tu32 temp;\n \n \t*num_nodes_added = 0;\n \twhile (*num_nodes_added < num_nodes) {\n \t\tu16 max_child_nodes, num_added = 0;\n-\t\tu32 temp;\n \n \t\tstatus = ice_sched_add_nodes_to_hw_layer(pi, tc_node, parent,\n \t\t\t\t\t\t\t layer,\tnew_num_nodes,\ndiff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c\nindex 31fec80735..dd4cc38114 100644\n--- a/drivers/net/ice/base/ice_switch.c\n+++ b/drivers/net/ice/base/ice_switch.c\n@@ -2520,7 +2520,7 @@ ice_free_sw_marker_lg(struct ice_hw *hw, u16 marker_lg_id, u32 sw_marker)\n \t\treturn ICE_ERR_NO_MEMORY;\n \n \tsw_buf->num_elems = CPU_TO_LE16(num_elems);\n-\tif (sw_marker == (sw_marker & 0xFFFF))\n+\tif (sw_marker <= 0xFFFF)\n \t\tsw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_1);\n \telse\n \t\tsw_buf->res_type = CPU_TO_LE16(ICE_AQC_RES_TYPE_WIDE_TABLE_2);\n@@ -4299,9 +4299,9 @@ enum ice_status ice_update_sw_rule_bridge_mode(struct ice_hw *hw)\n {\n \tstruct ice_fltr_mgmt_list_entry *fm_entry;\n \tenum ice_status status = ICE_SUCCESS;\n+\tstruct ice_switch_info *sw = NULL;\n \tstruct LIST_HEAD_TYPE *rule_head;\n \tstruct ice_lock *rule_lock; /* Lock to protect filter rule list */\n-\tstruct ice_switch_info *sw;\n \tsw = hw->switch_info;\n \n \trule_lock = &sw->recp_list[ICE_SW_LKUP_MAC].filt_rule_lock;\n@@ -5545,7 +5545,7 @@ ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set,\n \t\t u8 direction)\n {\n \tstruct ice_fltr_list_entry f_list_entry;\n-\tstruct ice_sw_recipe *recp_list;\n+\tstruct ice_sw_recipe *recp_list = NULL;\n \tstruct ice_fltr_info f_info;\n \tstruct ice_hw *hw = pi->hw;\n \tenum ice_status status;\n@@ -8698,6 +8698,36 @@ ice_fill_adv_packet_tun(struct ice_hw *hw, enum ice_sw_tunnel_type tun_type,\n \treturn ICE_ERR_CFG;\n }\n \n+/**\n+ * ice_fill_adv_packet_vlan - fill dummy packet with VLAN tag type\n+ * @vlan_type: VLAN tag type\n+ * @pkt: dummy packet to fill in\n+ * @offsets: offset info for the dummy packet\n+ */\n+static enum ice_status\n+ice_fill_adv_packet_vlan(u16 vlan_type, u8 *pkt,\n+\t\t\t const struct ice_dummy_pkt_offsets *offsets)\n+{\n+\tu16 i;\n+\n+\t/* Find VLAN header and insert VLAN TPID */\n+\tfor (i = 0; offsets[i].type != ICE_PROTOCOL_LAST; i++) {\n+\t\tif (offsets[i].type == ICE_VLAN_OFOS ||\n+\t\t offsets[i].type == ICE_VLAN_EX) {\n+\t\t\tstruct ice_vlan_hdr *hdr;\n+\t\t\tu16 offset;\n+\n+\t\t\toffset = offsets[i].offset;\n+\t\t\thdr = (struct ice_vlan_hdr *)&pkt[offset];\n+\t\t\thdr->type = CPU_TO_BE16(vlan_type);\n+\n+\t\t\treturn ICE_SUCCESS;\n+\t\t}\n+\t}\n+\n+\treturn ICE_ERR_CFG;\n+}\n+\n /**\n * ice_find_adv_rule_entry - Search a rule entry\n * @hw: pointer to the hardware structure\n@@ -9131,7 +9161,7 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \t\t ICE_SINGLE_ACT_Q_REGION_M;\n \t\tbreak;\n \tcase ICE_SET_MARK:\n-\t\tif (rinfo->sw_act.markid != (rinfo->sw_act.markid & 0xFFFF))\n+\t\tif (rinfo->sw_act.markid > 0xFFFF)\n \t\t\tnb_lg_acts_mark += 1;\n \t\t/* Allocate a hardware table entry to hold large act. */\n \t\tstatus = ice_alloc_res_lg_act(hw, &lg_act_id, nb_lg_acts_mark);\n@@ -9184,6 +9214,14 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups,\n \t\t\tgoto err_ice_add_adv_rule;\n \t}\n \n+\tif (rinfo->vlan_type != 0 && ice_is_dvm_ena(hw)) {\n+\t\tstatus = ice_fill_adv_packet_vlan(rinfo->vlan_type,\n+\t\t\t\t\t\t s_rule->hdr_data,\n+\t\t\t\t\t\t pkt_offsets);\n+\t\tif (status)\n+\t\t\tgoto err_ice_add_adv_rule;\n+\t}\n+\n \trx_tx = s_rule;\n \tif (rinfo->sw_act.fltr_act == ICE_SET_MARK) {\n \t\tlg_act_sz = (u16)ice_struct_size(lg_rule, act, nb_lg_acts_mark);\n@@ -9752,7 +9790,7 @@ enum ice_status\n ice_replay_vsi_all_fltr(struct ice_hw *hw, struct ice_port_info *pi,\n \t\t\tu16 vsi_handle)\n {\n-\tstruct ice_switch_info *sw;\n+\tstruct ice_switch_info *sw = NULL;\n \tenum ice_status status;\n \tu8 i;\n \ndiff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h\nindex c55ef19a8c..49bd535c79 100644\n--- a/drivers/net/ice/base/ice_switch.h\n+++ b/drivers/net/ice/base/ice_switch.h\n@@ -207,19 +207,19 @@ struct ice_adv_lkup_elem {\n \tunion ice_prot_hdr m_u;\t/* Mask of header values to match */\n };\n \n-struct lg_entry_vsi_fwd {\n+struct entry_vsi_fwd {\n \tu16 vsi_list;\n \tu8 list;\n \tu8 valid;\n };\n \n-struct lg_entry_to_q {\n+struct entry_to_q {\n \tu16 q_idx;\n \tu8 q_region_sz;\n \tu8 q_pri;\n };\n \n-struct lg_entry_prune {\n+struct entry_prune {\n \tu16 vsi_list;\n \tu8 list;\n \tu8 egr;\n@@ -227,28 +227,29 @@ struct lg_entry_prune {\n \tu8 prune_t;\n };\n \n-struct lg_entry_mirror {\n+struct entry_mirror {\n \tu16 mirror_vsi;\n };\n \n-struct lg_entry_generic_act {\n+struct entry_generic_act {\n \tu16 generic_value;\n \tu8 offset;\n \tu8 priority;\n };\n \n-struct lg_entry_statistics {\n+struct entry_statistics {\n \tu8 counter_idx;\n };\n \n union lg_act_entry {\n-\tstruct lg_entry_vsi_fwd vsi_fwd;\n-\tstruct lg_entry_to_q to_q;\n-\tstruct lg_entry_prune prune;\n-\tstruct lg_entry_mirror mirror;\n-\tstruct lg_entry_generic_act generic_act;\n-\tstruct lg_entry_statistics statistics;\n+\tstruct entry_vsi_fwd vsi_fwd;\n+\tstruct entry_to_q to_q;\n+\tstruct entry_prune prune;\n+\tstruct entry_mirror mirror;\n+\tstruct entry_generic_act generic_act;\n+\tstruct entry_statistics statistics;\n };\n+\n struct ice_prof_type_entry {\n \tu16 prof_id;\n \tenum ice_sw_tunnel_type type;\n@@ -301,6 +302,7 @@ struct ice_adv_rule_info {\n \tu8 rx; /* true means LOOKUP_RX otherwise LOOKUP_TX */\n \tu16 fltr_rule_id;\n \tu16 lg_id;\n+\tu16 vlan_type;\n \tstruct ice_adv_rule_flags_info flags_info;\n };\n \ndiff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h\nindex 3249e359de..b2df99e472 100644\n--- a/drivers/net/ice/base/ice_type.h\n+++ b/drivers/net/ice/base/ice_type.h\n@@ -693,9 +693,11 @@ struct ice_hw_common_caps {\n \tbool sec_rev_disabled;\n \tbool update_disabled;\n \tbool nvm_unified_update;\n+\tbool netlist_auth;\n #define ICE_NVM_MGMT_SEC_REV_DISABLED\t\tBIT(0)\n #define ICE_NVM_MGMT_UPDATE_DISABLED\t\tBIT(1)\n #define ICE_NVM_MGMT_UNIFIED_UPD_SUPPORT\tBIT(3)\n+#define ICE_NVM_MGMT_NETLIST_AUTH_SUPPORT\tBIT(5)\n \t/* PCIe reset avoidance */\n \tbool pcie_reset_avoidance; /* false: not supported, true: supported */\n \t/* Post update reset restriction */\n@@ -1458,6 +1460,7 @@ enum ice_sw_fwd_act_type {\n \tICE_FWD_TO_QGRP,\n \tICE_SET_MARK,\n \tICE_DROP_PACKET,\n+\tICE_LG_ACTION,\n \tICE_INVAL_ACT\n };\n \n", "prefixes": [ "06/30" ] }