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GET /api/patches/126390/?format=api
{ "id": 126390, "url": "http://patches.dpdk.org/api/patches/126390/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230421131221.1732314-3-ciara.power@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230421131221.1732314-3-ciara.power@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230421131221.1732314-3-ciara.power@intel.com", "date": "2023-04-21T13:12:14", "name": "[2/8] crypto/ipsec_mb: use burst API in aesni_mb", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "c0e40f07da345833b81534d8a0071edab0b45981", "submitter": { "id": 978, "url": "http://patches.dpdk.org/api/people/978/?format=api", "name": "Power, Ciara", "email": "ciara.power@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230421131221.1732314-3-ciara.power@intel.com/mbox/", "series": [ { "id": 27817, "url": "http://patches.dpdk.org/api/series/27817/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27817", "date": "2023-04-21T13:12:12", "name": "add AESNI_MB optimisations", "version": 1, "mbox": "http://patches.dpdk.org/series/27817/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/126390/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/126390/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BEFCD429AD;\n\tFri, 21 Apr 2023 15:12:43 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0EFF942D0B;\n\tFri, 21 Apr 2023 15:12:35 +0200 (CEST)", "from mga06.intel.com (mga06b.intel.com [134.134.136.31])\n by mails.dpdk.org (Postfix) with ESMTP id BDD394114B\n for <dev@dpdk.org>; Fri, 21 Apr 2023 15:12:31 +0200 (CEST)", "from orsmga001.jf.intel.com ([10.7.209.18])\n by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 21 Apr 2023 06:12:31 -0700", "from silpixa00400355.ir.intel.com (HELO\n silpixa00400355.ger.corp.intel.com) ([10.237.222.80])\n by orsmga001.jf.intel.com with ESMTP; 21 Apr 2023 06:12:29 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1682082752; x=1713618752;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=bpfEtkW9RAKKGKZGWuUmt3vz7R8QH+LLew6CWJvmbak=;\n b=SWaEHekLdT+2RMDabQ4QMcb20mWibC9DWz44q7GgtZbvo8cx1TGSBqpX\n n9J/hoS7nbp7ZkII4ohMZT4Fdm5HpU5gwCUJLOWFtVYZeqxbki999rpFe\n pVuzRGjnhM4zvv7PlkyjaJDNxIWhB1c7a9bc1iAfLgvmKO4c9xIFGXnE4\n dqsWxguFhQeFU7gxF2dxG36EhPzQJ8N4BVYp2ZSOKFRVM330shzPALFkP\n 5UzfRQhHpk5XnEo0rzIOrtwhKGlrhmslJyCVyKQsqhMnad3MIgUUoLXJy\n jsD83giih+F+mx9vNPdWbnN8OP1uTuJqsec8sk1AxJPb7x2/35z+Yx45U w==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10686\"; a=\"408927704\"", "E=Sophos;i=\"5.99,214,1677571200\"; d=\"scan'208\";a=\"408927704\"", "E=McAfee;i=\"6600,9927,10686\"; a=\"724817346\"", "E=Sophos;i=\"5.99,214,1677571200\"; d=\"scan'208\";a=\"724817346\"" ], "X-ExtLoop1": "1", "From": "Ciara Power <ciara.power@intel.com>", "To": "dev@dpdk.org", "Cc": "kai.ji@intel.com, Marcel Cornu <marcel.d.cornu@intel.com>,\n Pablo de Lara <pablo.de.lara.guarch@intel.com>,\n Ciara Power <ciara.power@intel.com>", "Subject": "[PATCH 2/8] crypto/ipsec_mb: use burst API in aesni_mb", "Date": "Fri, 21 Apr 2023 13:12:14 +0000", "Message-Id": "<20230421131221.1732314-3-ciara.power@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230421131221.1732314-1-ciara.power@intel.com>", "References": "<20230421131221.1732314-1-ciara.power@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Marcel Cornu <marcel.d.cornu@intel.com>\n\nUse new ipsec_mb burst API in dequeue burst function,\nwhen ipsec_mb version is v1.3 or newer.\n\nSigned-off-by: Marcel Cornu <marcel.d.cornu@intel.com>\nSigned-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>\nSigned-off-by: Ciara Power <ciara.power@intel.com>\n---\n drivers/crypto/ipsec_mb/pmd_aesni_mb.c | 133 ++++++++++++++++++++++++-\n 1 file changed, 132 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c\nindex c53548aa3b..5789b82d8e 100644\n--- a/drivers/crypto/ipsec_mb/pmd_aesni_mb.c\n+++ b/drivers/crypto/ipsec_mb/pmd_aesni_mb.c\n@@ -9,6 +9,10 @@ struct aesni_mb_op_buf_data {\n \tuint32_t offset;\n };\n \n+#if IMB_VERSION(1, 2, 0) < IMB_VERSION_NUM\n+static IMB_JOB *jobs[IMB_MAX_BURST_SIZE] = {NULL};\n+#endif\n+\n /**\n * Calculate the authentication pre-computes\n *\n@@ -1974,6 +1978,133 @@ set_job_null_op(IMB_JOB *job, struct rte_crypto_op *op)\n \treturn job;\n }\n \n+#if IMB_VERSION(1, 2, 0) < IMB_VERSION_NUM\n+static uint16_t\n+aesni_mb_dequeue_burst(void *queue_pair, struct rte_crypto_op **ops,\n+\t\tuint16_t nb_ops)\n+{\n+\tstruct ipsec_mb_qp *qp = queue_pair;\n+\tIMB_MGR *mb_mgr = qp->mb_mgr;\n+\tstruct rte_crypto_op *op;\n+\tstruct rte_crypto_op *deqd_ops[IMB_MAX_BURST_SIZE];\n+\tIMB_JOB *job;\n+\tint retval, processed_jobs = 0;\n+\tuint16_t i, nb_jobs;\n+\n+\tif (unlikely(nb_ops == 0 || mb_mgr == NULL))\n+\t\treturn 0;\n+\n+\tuint8_t digest_idx = qp->digest_idx;\n+\tuint16_t burst_sz = (nb_ops > IMB_MAX_BURST_SIZE) ?\n+\t\tIMB_MAX_BURST_SIZE : nb_ops;\n+\n+\t/*\n+\t * If nb_ops is greater than the max supported\n+\t * ipsec_mb burst size, then process in bursts of\n+\t * IMB_MAX_BURST_SIZE until all operations are submitted\n+\t */\n+\twhile (nb_ops) {\n+\t\tuint16_t nb_submit_ops;\n+\t\tuint16_t n = (nb_ops / burst_sz) ?\n+\t\t\tburst_sz : nb_ops;\n+\n+\t\twhile (unlikely((IMB_GET_NEXT_BURST(mb_mgr, n, jobs)) < n)) {\n+\t\t\t/*\n+\t\t\t * Not enough free jobs in the queue\n+\t\t\t * Flush n jobs until enough jobs available\n+\t\t\t */\n+\t\t\tnb_jobs = IMB_FLUSH_BURST(mb_mgr, n, jobs);\n+\t\t\tfor (i = 0; i < nb_jobs; i++) {\n+\t\t\t\tjob = jobs[i];\n+\n+\t\t\t\top = post_process_mb_job(qp, job);\n+\t\t\t\tif (op) {\n+\t\t\t\t\tops[processed_jobs++] = op;\n+\t\t\t\t\tqp->stats.dequeued_count++;\n+\t\t\t\t} else {\n+\t\t\t\t\tqp->stats.dequeue_err_count++;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\n+\t\t/*\n+\t\t * Get the next operations to process from ingress queue.\n+\t\t * There is no need to return the job to the IMB_MGR\n+\t\t * if there are no more operations to process, since\n+\t\t * the IMB_MGR can use that pointer again in next\n+\t\t * get_next calls.\n+\t\t */\n+\t\tnb_submit_ops = rte_ring_dequeue_burst(qp->ingress_queue,\n+\t\t\t\t\t\t(void **)deqd_ops, n, NULL);\n+\t\tfor (i = 0; i < nb_submit_ops; i++) {\n+\t\t\tjob = jobs[i];\n+\t\t\top = deqd_ops[i];\n+\n+#ifdef AESNI_MB_DOCSIS_SEC_ENABLED\n+\t\t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)\n+\t\t\t\tretval = set_sec_mb_job_params(job, qp, op,\n+\t\t\t\t\t\t\t &digest_idx);\n+\t\t\telse\n+#endif\n+\t\t\t\tretval = set_mb_job_params(job, qp, op,\n+\t\t\t\t\t\t\t &digest_idx, mb_mgr);\n+\n+\t\t\tif (unlikely(retval != 0)) {\n+\t\t\t\tqp->stats.dequeue_err_count++;\n+\t\t\t\tset_job_null_op(job, op);\n+\t\t\t}\n+\t\t}\n+\n+\t\t/* Submit jobs to multi-buffer for processing */\n+#ifdef RTE_LIBRTE_PMD_AESNI_MB_DEBUG\n+\t\tint err = 0;\n+\n+\t\tnb_jobs = IMB_SUBMIT_BURST(mb_mgr, nb_submit_ops, jobs);\n+\t\terr = imb_get_errno(mb_mgr);\n+\t\tif (err)\n+\t\t\tIPSEC_MB_LOG(ERR, \"%s\", imb_get_strerror(err));\n+#else\n+\t\tnb_jobs = IMB_SUBMIT_BURST_NOCHECK(mb_mgr,\n+\t\t\t\t\t\t nb_submit_ops, jobs);\n+#endif\n+\t\tfor (i = 0; i < nb_jobs; i++) {\n+\t\t\tjob = jobs[i];\n+\n+\t\t\top = post_process_mb_job(qp, job);\n+\t\t\tif (op) {\n+\t\t\t\tops[processed_jobs++] = op;\n+\t\t\t\tqp->stats.dequeued_count++;\n+\t\t\t} else {\n+\t\t\t\tqp->stats.dequeue_err_count++;\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t}\n+\n+\t\tqp->digest_idx = digest_idx;\n+\n+\t\tif (processed_jobs < 1) {\n+\t\t\tnb_jobs = IMB_FLUSH_BURST(mb_mgr, n, jobs);\n+\n+\t\t\tfor (i = 0; i < nb_jobs; i++) {\n+\t\t\t\tjob = jobs[i];\n+\n+\t\t\t\top = post_process_mb_job(qp, job);\n+\t\t\t\tif (op) {\n+\t\t\t\t\tops[processed_jobs++] = op;\n+\t\t\t\t\tqp->stats.dequeued_count++;\n+\t\t\t\t} else {\n+\t\t\t\t\tqp->stats.dequeue_err_count++;\n+\t\t\t\t\tbreak;\n+\t\t\t\t}\n+\t\t\t}\n+\t\t}\n+\t\tnb_ops -= n;\n+\t}\n+\n+\treturn processed_jobs;\n+}\n+#else\n static uint16_t\n aesni_mb_dequeue_burst(void *queue_pair, struct rte_crypto_op **ops,\n \t\tuint16_t nb_ops)\n@@ -2054,7 +2185,7 @@ aesni_mb_dequeue_burst(void *queue_pair, struct rte_crypto_op **ops,\n \n \treturn processed_jobs;\n }\n-\n+#endif\n static inline int\n check_crypto_sgl(union rte_crypto_sym_ofs so, const struct rte_crypto_sgl *sgl)\n {\n", "prefixes": [ "2/8" ] }