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GET /api/patches/126004/?format=api
{ "id": 126004, "url": "http://patches.dpdk.org/api/patches/126004/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230413094502.1714755-3-wenjing.qiao@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230413094502.1714755-3-wenjing.qiao@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230413094502.1714755-3-wenjing.qiao@intel.com", "date": "2023-04-13T09:44:46", "name": "[02/18] common/idpf: fix ctlq message send and receive", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "24d4a48407707c44bda0d0cc2a5259e71cc77900", "submitter": { "id": 2680, "url": "http://patches.dpdk.org/api/people/2680/?format=api", "name": "Wenjing Qiao", "email": "wenjing.qiao@intel.com" }, "delegate": { "id": 1540, "url": "http://patches.dpdk.org/api/users/1540/?format=api", "username": "qzhan15", "first_name": "Qi", "last_name": "Zhang", "email": "qi.z.zhang@intel.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230413094502.1714755-3-wenjing.qiao@intel.com/mbox/", "series": [ { "id": 27692, "url": "http://patches.dpdk.org/api/series/27692/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27692", "date": "2023-04-13T09:44:44", "name": "update idpf shared code", "version": 1, "mbox": "http://patches.dpdk.org/series/27692/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/126004/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/126004/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8C3BD42931;\n\tThu, 13 Apr 2023 11:50:24 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D841E42B7E;\n\tThu, 13 Apr 2023 11:50:16 +0200 (CEST)", "from mga07.intel.com (mga07.intel.com [134.134.136.100])\n by mails.dpdk.org (Postfix) with ESMTP id 35F52410F9;\n Thu, 13 Apr 2023 11:50:14 +0200 (CEST)", "from fmsmga003.fm.intel.com ([10.253.24.29])\n by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Apr 2023 02:50:12 -0700", "from dpdk-wenjing-01.sh.intel.com ([10.67.119.244])\n by FMSMGA003.fm.intel.com with ESMTP; 13 Apr 2023 02:50:10 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1681379414; x=1712915414;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=VQXRouaK+IKPG/RNj7a4FchRTe4L3XqOPsszmvYTy6E=;\n b=DrKBIJ1hT96lYNtLi0/+X9cL4r5QZz2j151PgEXJrZGspKlBE9FlkraI\n +NrV0TIREc42SQd1edg+nOdBpNcP4v5R15353OqpGM6+dyVAXpwuoPyD7\n quIt8i9EWLoPuzR5uBPEHwsbolKD1S4f4/vQ3RA9f/eV3GR551+yilE+N\n kWl5mab9RpPpJWKh3/qGtQzehRdTfA/ro4Y4XdDC7MyxohxyElkgZjVi/\n IFcd+hLGsN505+lTblOVCkHyqqrm/P84Xfom6mOPT9S0oNV3FaGh3hBBV\n 1/Whga1YhzgRpkou1CV+ualn6ATehNkIHD+Wd1cmHANHp01k/TJFzrtvK Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6600,9927,10678\"; a=\"409290359\"", "E=Sophos;i=\"5.98,341,1673942400\"; d=\"scan'208\";a=\"409290359\"", "E=McAfee;i=\"6600,9927,10678\"; a=\"778699245\"", "E=Sophos;i=\"5.98,341,1673942400\"; d=\"scan'208\";a=\"778699245\"" ], "X-ExtLoop1": "1", "From": "Wenjing Qiao <wenjing.qiao@intel.com>", "To": "jingjing.wu@intel.com,\n\tbeilei.xing@intel.com,\n\tqi.z.zhang@intel.com", "Cc": "dev@dpdk.org, Wenjing Qiao <wenjing.qiao@intel.com>, stable@dpdk.org,\n Charles Stoll <charles.stoll@intel.com>", "Subject": "[PATCH 02/18] common/idpf: fix ctlq message send and receive", "Date": "Thu, 13 Apr 2023 05:44:46 -0400", "Message-Id": "<20230413094502.1714755-3-wenjing.qiao@intel.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230413094502.1714755-1-wenjing.qiao@intel.com>", "References": "<20230413094502.1714755-1-wenjing.qiao@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Fixes the ctlq send and receive functions to not cast the cookie field\nto a u64 before programming. By doing a cast, it can cause endianness\nissues as LE will swap the lower 32 and higher 32 bits whereas BE will\nnot. By treating this field as two 32 bit values, both BE and LE will\nplace the retval and opcode in the correct location.\n\nSince this field is now being treated as two 32 bit values, the cfg.data\nsection must also be split into a data high and data low. Macros to\neasily pack and read these fields have also been added.\n\nFixes: fb4ac04e9bfa (\"common/idpf: introduce common library\")\nCc: stable@dpdk.org\n\nSigned-off-by: Charles Stoll <charles.stoll@intel.com>\nSigned-off-by: Wenjing Qiao <wenjing.qiao@intel.com>\n---\n drivers/common/idpf/base/idpf_controlq.c | 16 ++++------------\n 1 file changed, 4 insertions(+), 12 deletions(-)", "diff": "diff --git a/drivers/common/idpf/base/idpf_controlq.c b/drivers/common/idpf/base/idpf_controlq.c\nindex 3af81e5a64..8e4d3ee54f 100644\n--- a/drivers/common/idpf/base/idpf_controlq.c\n+++ b/drivers/common/idpf/base/idpf_controlq.c\n@@ -311,18 +311,14 @@ int idpf_ctlq_send(struct idpf_hw *hw, struct idpf_ctlq_info *cq,\n \n \tfor (i = 0; i < num_q_msg; i++) {\n \t\tstruct idpf_ctlq_msg *msg = &q_msg[i];\n-\t\tu64 msg_cookie;\n \n \t\tdesc = IDPF_CTLQ_DESC(cq, cq->next_to_use);\n \n \t\tdesc->opcode = CPU_TO_LE16(msg->opcode);\n \t\tdesc->pfid_vfid = CPU_TO_LE16(msg->func_id);\n \n-\t\tmsg_cookie = *(u64 *)&msg->cookie;\n-\t\tdesc->cookie_high =\n-\t\t\tCPU_TO_LE32(IDPF_HI_DWORD(msg_cookie));\n-\t\tdesc->cookie_low =\n-\t\t\tCPU_TO_LE32(IDPF_LO_DWORD(msg_cookie));\n+\t\tdesc->cookie_high = CPU_TO_LE32(msg->cookie.mbx.chnl_opcode);\n+\t\tdesc->cookie_low = CPU_TO_LE32(msg->cookie.mbx.chnl_retval);\n \n \t\tdesc->flags = CPU_TO_LE16((msg->host_id & IDPF_HOST_ID_MASK) <<\n \t\t\t\t\t IDPF_CTLQ_FLAG_HOST_ID_S);\n@@ -620,8 +616,6 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,\n \tnum_to_clean = *num_q_msg;\n \n \tfor (i = 0; i < num_to_clean; i++) {\n-\t\tu64 msg_cookie;\n-\n \t\t/* Fetch next descriptor and check if marked as done */\n \t\tdesc = IDPF_CTLQ_DESC(cq, ntc);\n \t\tflags = LE16_TO_CPU(desc->flags);\n@@ -639,10 +633,8 @@ int idpf_ctlq_recv(struct idpf_ctlq_info *cq, u16 *num_q_msg,\n \t\tif (flags & IDPF_CTLQ_FLAG_ERR)\n \t\t\tret_code = -EBADMSG;\n \n-\t\tmsg_cookie = (u64)LE32_TO_CPU(desc->cookie_high) << 32;\n-\t\tmsg_cookie |= (u64)LE32_TO_CPU(desc->cookie_low);\n-\t\tidpf_memcpy(&q_msg[i].cookie, &msg_cookie, sizeof(u64),\n-\t\t\t IDPF_NONDMA_TO_NONDMA);\n+\t\tq_msg[i].cookie.mbx.chnl_opcode = LE32_TO_CPU(desc->cookie_high);\n+\t\tq_msg[i].cookie.mbx.chnl_retval = LE32_TO_CPU(desc->cookie_low);\n \n \t\tq_msg[i].opcode = LE16_TO_CPU(desc->opcode);\n \t\tq_msg[i].data_len = LE16_TO_CPU(desc->datalen);\n", "prefixes": [ "02/18" ] }