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GET /api/patches/12600/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 12600,
    "url": "http://patches.dpdk.org/api/patches/12600/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/1462595421-22505-8-git-send-email-rasesh.mody@qlogic.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<1462595421-22505-8-git-send-email-rasesh.mody@qlogic.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/1462595421-22505-8-git-send-email-rasesh.mody@qlogic.com",
    "date": "2016-05-07T04:30:19",
    "name": "[dpdk-dev,7/9] qede: add 100g mode support",
    "commit_ref": null,
    "pull_url": null,
    "state": "changes-requested",
    "archived": true,
    "hash": "b20742a765bfa05a42a5a4c3cafcc96f8c7fbcbf",
    "submitter": {
        "id": 325,
        "url": "http://patches.dpdk.org/api/people/325/?format=api",
        "name": "Rasesh Mody",
        "email": "rasesh.mody@qlogic.com"
    },
    "delegate": {
        "id": 10,
        "url": "http://patches.dpdk.org/api/users/10/?format=api",
        "username": "bruce",
        "first_name": "Bruce",
        "last_name": "Richardson",
        "email": "bruce.richardson@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/1462595421-22505-8-git-send-email-rasesh.mody@qlogic.com/mbox/",
    "series": [],
    "comments": "http://patches.dpdk.org/api/patches/12600/comments/",
    "check": "pending",
    "checks": "http://patches.dpdk.org/api/patches/12600/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@dpdk.org",
        "Delivered-To": "patchwork@dpdk.org",
        "Received": [
            "from [92.243.14.124] (localhost [IPv6:::1])\n\tby dpdk.org (Postfix) with ESMTP id 59ACD5A63;\n\tSat,  7 May 2016 06:31:02 +0200 (CEST)",
            "from mx0b-0016ce01.pphosted.com (mx0a-0016ce01.pphosted.com\n\t[67.231.148.157]) by dpdk.org (Postfix) with ESMTP id B00385A6B\n\tfor <dev@dpdk.org>; Sat,  7 May 2016 06:31:00 +0200 (CEST)",
            "from pps.filterd (m0095336.ppops.net [127.0.0.1])\n\tby mx0a-0016ce01.pphosted.com (8.16.0.17/8.16.0.17) with SMTP id\n\tu474UPQI019040 for <dev@dpdk.org>; Fri, 6 May 2016 21:30:59 -0700",
            "from avcashub1.qlogic.com ([198.186.0.115])\n\tby mx0a-0016ce01.pphosted.com with ESMTP id 22s2eqgh8m-1\n\t(version=TLSv1 cipher=AES128-SHA bits=128 verify=NOT)\n\tfor <dev@dpdk.org>; Fri, 06 May 2016 21:30:59 -0700",
            "from avluser05.qlc.com (10.1.113.115) by qlc.com (10.1.4.190) with\n\tMicrosoft SMTP Server id 14.3.235.1; Fri, 6 May 2016 21:30:59 -0700",
            "(from rmody@localhost)\tby avluser05.qlc.com (8.14.4/8.14.4/Submit)\n\tid u474Uxsp022591;\tFri, 6 May 2016 21:30:59 -0700"
        ],
        "X-Authentication-Warning": "avluser05.qlc.com: rmody set sender to\n\trasesh.mody@qlogic.com using -f",
        "From": "Rasesh Mody <rasesh.mody@qlogic.com>",
        "To": "<dev@dpdk.org>",
        "CC": "<Dept-EngDPDKDev@qlogic.com>, Harish Patil <harish.patil@qlogic.com>",
        "Date": "Fri, 6 May 2016 21:30:19 -0700",
        "Message-ID": "<1462595421-22505-8-git-send-email-rasesh.mody@qlogic.com>",
        "X-Mailer": "git-send-email 1.7.10.3",
        "In-Reply-To": "<1462595421-22505-1-git-send-email-rasesh.mody@qlogic.com>",
        "References": "<1462595421-22505-1-git-send-email-rasesh.mody@qlogic.com>",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain",
        "disclaimer": "bypass",
        "X-Proofpoint-Virus-Version": "vendor=nai engine=5800 definitions=8157\n\tsignatures=670715",
        "X-Proofpoint-Spam-Details": "rule=notspam policy=default score=0\n\tpriorityscore=1501 suspectscore=1\n\tphishscore=0 bulkscore=0 spamscore=0 clxscore=1015 impostorscore=0\n\tlowpriorityscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx\n\tscancount=1 engine=8.0.1-1603290000 definitions=main-1605070067",
        "Subject": "[dpdk-dev] [PATCH 7/9] qede: add 100g mode support",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.15",
        "Precedence": "list",
        "List-Id": "patches and discussions about DPDK <dev.dpdk.org>",
        "List-Unsubscribe": "<http://dpdk.org/ml/options/dev>,\n\t<mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://dpdk.org/ml/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<http://dpdk.org/ml/listinfo/dev>,\n\t<mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org",
        "Sender": "\"dev\" <dev-bounces@dpdk.org>"
    },
    "content": "From: Harish Patil <harish.patil@qlogic.com>\n\nChange details:\n - Add device id to the PCI table\n - Add polling for the slowpath events for CMT mode device\n - Add prerequites to allow 100g mode\n        o Min number of queues needed is 2\n        o Only even number of queues are allowed\n - Update documentation\n\nSigned-off-by: Harish Patil <harish.patil@qlogic.com>\n---\n config/common_base             |    2 +-\n doc/guides/nics/qede.rst       |    8 ++---\n drivers/net/qede/qede_ethdev.c |   64 ++++++++++++++++++++++++++++++++++++++++\n drivers/net/qede/qede_ethdev.h |    4 ++-\n 4 files changed, 72 insertions(+), 6 deletions(-)",
    "diff": "diff --git a/config/common_base b/config/common_base\nindex a053aa3..8976694 100644\n--- a/config/common_base\n+++ b/config/common_base\n@@ -297,7 +297,7 @@ CONFIG_RTE_LIBRTE_PMD_BOND=y\n CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB=n\n CONFIG_RTE_LIBRTE_BOND_DEBUG_ALB_L1=n\n \n-# QLogic 25G/40G PMD\n+# QLogic 25G/40G/100G PMD\n #\n CONFIG_RTE_LIBRTE_QEDE_PMD=y\n CONFIG_RTE_LIBRTE_QEDE_DEBUG_INIT=n\ndiff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst\nindex c5fbd83..f7ca8eb 100644\n--- a/doc/guides/nics/qede.rst\n+++ b/doc/guides/nics/qede.rst\n@@ -55,7 +55,7 @@ Supported Features\n - TSS\n - Multiple MAC address\n - Default pause flow control\n-- SR-IOV VF\n+- SR-IOV VF for 25G/40G modes\n \n Non-supported Features\n ----------------------\n@@ -70,13 +70,13 @@ Non-supported Features\n Supported QLogic Adapters\n -------------------------\n \n-- QLogic FastLinQ QL4xxxx 25G/40G CNAs\n+- QLogic FastLinQ QL4xxxx 25G/40G/100G CNAs.\n \n Prerequisites\n -------------\n \n-- Requires firmware version **8.7.x.** and management\n-  firmware version **8.7.x or higher**. Firmware may be available\n+- Requires firmware version **8.7.x.** and management firmware\n+  version **8.7.x or higher**. Firmware may be available\n   inbox in certain newer Linux distros under the standard directory\n   ``E.g. /lib/firmware/qed/qed_init_values_zipped-8.7.7.0.bin``\n \ndiff --git a/drivers/net/qede/qede_ethdev.c b/drivers/net/qede/qede_ethdev.c\nindex 4abe168..bd89e5a 100644\n--- a/drivers/net/qede/qede_ethdev.c\n+++ b/drivers/net/qede/qede_ethdev.c\n@@ -7,10 +7,12 @@\n  */\n \n #include \"qede_ethdev.h\"\n+#include <rte_alarm.h>\n \n /* Globals */\n static const struct qed_eth_ops *qed_ops;\n static const char *drivername = \"qede pmd\";\n+static int64_t timer_period = 1;\n \n static const struct rte_eth_xstats qede_eth_stats[] = {\n \t{\"no_buff_discards\",\n@@ -477,6 +479,21 @@ static int qede_dev_configure(struct rte_eth_dev *eth_dev)\n \t\treturn -EINVAL;\n \t}\n \n+\t/* Check requirements for 100G mode */\n+\tif (edev->num_hwfns > 1) {\n+\t\tif (eth_dev->data->nb_rx_queues < 2) {\n+\t\t\tDP_NOTICE(edev, false,\n+\t\t\t\t  \"100G mode requires minimum two queues\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\n+\t\tif ((eth_dev->data->nb_rx_queues % 2) != 0) {\n+\t\t\tDP_NOTICE(edev, false,\n+\t\t\t\t  \"100G mode requires even number of queues\\n\");\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n \tqdev->num_rss = eth_dev->data->nb_rx_queues;\n \n \t/* Initial state */\n@@ -659,6 +676,26 @@ static void qede_promiscuous_disable(struct rte_eth_dev *eth_dev)\n \t\tqede_rx_mode_setting(eth_dev, QED_FILTER_RX_MODE_TYPE_REGULAR);\n }\n \n+static void qede_poll_sp_sb_cb(void *param)\n+{\n+\tstruct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;\n+\tstruct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);\n+\tstruct ecore_dev *edev = QEDE_INIT_EDEV(qdev);\n+\tint rc;\n+\n+\tqede_interrupt_action(ECORE_LEADING_HWFN(edev));\n+\tqede_interrupt_action(&edev->hwfns[1]);\n+\n+\trc = rte_eal_alarm_set(timer_period * US_PER_S,\n+\t\t\t       qede_poll_sp_sb_cb,\n+\t\t\t       (void *)eth_dev);\n+\tif (rc != 0) {\n+\t\tDP_ERR(edev, \"Unable to start periodic\"\n+\t\t\t     \" timer rc %d\\n\", rc);\n+\t\tassert(false && \"Unable to start periodic timer\");\n+\t}\n+}\n+\n static void qede_dev_close(struct rte_eth_dev *eth_dev)\n {\n \tstruct qede_dev *qdev = eth_dev->data->dev_private;\n@@ -691,6 +728,9 @@ static void qede_dev_close(struct rte_eth_dev *eth_dev)\n \trte_intr_callback_unregister(&eth_dev->pci_dev->intr_handle,\n \t\t\t\t     qede_interrupt_handler, (void *)eth_dev);\n \n+\tif (edev->num_hwfns > 1)\n+\t\trte_eal_alarm_cancel(qede_poll_sp_sb_cb, (void *)eth_dev);\n+\n \tqdev->state = QEDE_CLOSE;\n }\n \n@@ -1206,9 +1246,26 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)\n \tparams.drv_eng = QEDE_ENGINEERING_VERSION;\n \tstrncpy((char *)params.name, \"qede LAN\", QED_DRV_VER_STR_SIZE);\n \n+\t/* For CMT mode device do periodic polling for slowpath events.\n+\t * This is required since uio device uses only one MSI-x\n+\t * interrupt vector but we need one for each engine.\n+\t */\n+\tif (edev->num_hwfns > 1) {\n+\t\trc = rte_eal_alarm_set(timer_period * US_PER_S,\n+\t\t\t\t       qede_poll_sp_sb_cb,\n+\t\t\t\t       (void *)eth_dev);\n+\t\tif (rc != 0) {\n+\t\t\tDP_ERR(edev, \"Unable to start periodic\"\n+\t\t\t\t     \" timer rc %d\\n\", rc);\n+\t\t\treturn -EINVAL;\n+\t\t}\n+\t}\n+\n \trc = qed_ops->common->slowpath_start(edev, &params);\n \tif (rc) {\n \t\tDP_ERR(edev, \"Cannot start slowpath rc = %d\\n\", rc);\n+\t\trte_eal_alarm_cancel(qede_poll_sp_sb_cb,\n+\t\t\t\t     (void *)eth_dev);\n \t\treturn -ENODEV;\n \t}\n \n@@ -1217,6 +1274,8 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)\n \t\tDP_ERR(edev, \"Cannot get device_info rc %d\\n\", rc);\n \t\tqed_ops->common->slowpath_stop(edev);\n \t\tqed_ops->common->remove(edev);\n+\t\trte_eal_alarm_cancel(qede_poll_sp_sb_cb,\n+\t\t\t\t     (void *)eth_dev);\n \t\treturn -ENODEV;\n \t}\n \n@@ -1242,6 +1301,8 @@ static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)\n \t\tDP_ERR(edev, \"Failed to allocate MAC address\\n\");\n \t\tqed_ops->common->slowpath_stop(edev);\n \t\tqed_ops->common->remove(edev);\n+\t\trte_eal_alarm_cancel(qede_poll_sp_sb_cb,\n+\t\t\t\t     (void *)eth_dev);\n \t\treturn -ENOMEM;\n \t}\n \n@@ -1357,6 +1418,9 @@ static struct rte_pci_id pci_id_qede_map[] = {\n \t{\n \t\tQEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_25)\n \t},\n+\t{\n+\t\tQEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_100)\n+\t},\n \t{.vendor_id = 0,}\n };\n \ndiff --git a/drivers/net/qede/qede_ethdev.h b/drivers/net/qede/qede_ethdev.h\nindex 64d5f08..b080f5f 100644\n--- a/drivers/net/qede/qede_ethdev.h\n+++ b/drivers/net/qede/qede_ethdev.h\n@@ -81,7 +81,7 @@\n \tstruct ecore_dev *edev = &qdev->edev;\t\t\t\\\n }\n \n-/************* QLogic 25G/40G vendor/devices ids *************/\n+/************* QLogic 25G/40G/100G vendor/devices ids *************/\n #define PCI_VENDOR_ID_QLOGIC            0x1077\n \n #define CHIP_NUM_57980E                 0x1634\n@@ -90,6 +90,7 @@\n #define CHIP_NUM_57980S_40              0x1634\n #define CHIP_NUM_57980S_25              0x1656\n #define CHIP_NUM_57980S_IOV             0x1664\n+#define CHIP_NUM_57980S_100             0x1644\n \n #define PCI_DEVICE_ID_NX2_57980E        CHIP_NUM_57980E\n #define PCI_DEVICE_ID_NX2_57980S        CHIP_NUM_57980S\n@@ -97,6 +98,7 @@\n #define PCI_DEVICE_ID_57980S_40         CHIP_NUM_57980S_40\n #define PCI_DEVICE_ID_57980S_25         CHIP_NUM_57980S_25\n #define PCI_DEVICE_ID_57980S_IOV        CHIP_NUM_57980S_IOV\n+#define PCI_DEVICE_ID_57980S_100        CHIP_NUM_57980S_100\n \n extern char fw_file[];\n \n",
    "prefixes": [
        "dpdk-dev",
        "7/9"
    ]
}