Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/125921/?format=api
{ "id": 125921, "url": "http://patches.dpdk.org/api/patches/125921/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230411091144.1087887-16-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230411091144.1087887-16-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230411091144.1087887-16-ndabilpuram@marvell.com", "date": "2023-04-11T09:11:39", "name": "[16/21] common/cnxk: sync between mbox up and down messages", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "247d1681beceb2ff45bc0b6af9de98166360f87c", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230411091144.1087887-16-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 27660, "url": "http://patches.dpdk.org/api/series/27660/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27660", "date": "2023-04-11T09:11:24", "name": "[01/21] common/cnxk: allocate dynamic BPIDs", "version": 1, "mbox": "http://patches.dpdk.org/series/27660/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/125921/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/125921/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 000224291B;\n\tTue, 11 Apr 2023 11:13:48 +0200 (CEST)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1E06241611;\n\tTue, 11 Apr 2023 11:12:52 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id EC63F42BAC\n for <dev@dpdk.org>; Tue, 11 Apr 2023 11:12:49 +0200 (CEST)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 33B8V8Co021687 for <dev@dpdk.org>; Tue, 11 Apr 2023 02:12:49 -0700", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3pvt73b1vf-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 11 Apr 2023 02:12:48 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.48;\n Tue, 11 Apr 2023 02:12:47 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.48 via Frontend\n Transport; Tue, 11 Apr 2023 02:12:47 -0700", "from hyd1588t430.caveonetworks.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 060863F706A;\n Tue, 11 Apr 2023 02:12:44 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=kRHigjH98bdhwoGGG41niOq+Tw9a6wNDtexyz4Y2ZTM=;\n b=U6DwpM7XbCNsNU9jRHEm5f1jLnwzqdhZnbnHguXHrTje7kkhnIAfA9eUUUIv+OvSzYXS\n MANRTE7AxI6dr/TR4GKgoDKjjtnKeo2wpSWXYXI52F4e4quL+60OY6HipVGwHkFnHCci\n SP7tEukZn6uzN51WZ62m09wIa0y/T2diLT5JdARSuyrgY6WvIkedzQPjkAhcjWGELj75\n VryeLHwKnJUjS+LoXh5CRXTsxy5QIIfrQxhag3h0QwUmXJTelUY3Xithd5dr07KxWZBE\n TuCaauV1nCoAMuspSKAhxFOIlHHaKcGbpJlmw+FaaTcRBlaTNIHuHlaZMCZyxY8tECwY EQ==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Nithin Kumar Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<jerinj@marvell.com>, <dev@dpdk.org>, Harman Kalra <hkalra@marvell.com>", "Subject": "[PATCH 16/21] common/cnxk: sync between mbox up and down messages", "Date": "Tue, 11 Apr 2023 14:41:39 +0530", "Message-ID": "<20230411091144.1087887-16-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230411091144.1087887-1-ndabilpuram@marvell.com>", "References": "<20230411091144.1087887-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "-G0CObFgzCp8dbPqw0k4M2vxphjLO4cG", "X-Proofpoint-ORIG-GUID": "-G0CObFgzCp8dbPqw0k4M2vxphjLO4cG", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22\n definitions=2023-04-11_05,2023-04-06_03,2023-02-09_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Harman Kalra <hkalra@marvell.com>\n\nAn issue is observed where if PF is with DPDK and VF as kernel\nnetdev does not responds to link events. It was due to recent\ndesign change in kernel where sender checks whether previous\ninterrupt is received before triggering current interrupt by\nwaiting for mailbox data register to become zero.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n drivers/common/cnxk/roc_dev.c | 20 ++++++++-\n drivers/common/cnxk/roc_mbox.c | 64 +++++++++++++++++++++--------\n drivers/common/cnxk/roc_mbox.h | 15 +++++++\n drivers/common/cnxk/roc_mbox_priv.h | 6 ++-\n 4 files changed, 84 insertions(+), 21 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_dev.c b/drivers/common/cnxk/roc_dev.c\nindex 5e4e564ebe..e5a5cd7c10 100644\n--- a/drivers/common/cnxk/roc_dev.c\n+++ b/drivers/common/cnxk/roc_dev.c\n@@ -195,7 +195,8 @@ af_pf_wait_msg(struct dev *dev, uint16_t vf, int num_msg)\n \t\t\t\tvf_msg->rc = msg->rc;\n \t\t\t\tvf_msg->pcifunc = msg->pcifunc;\n \t\t\t\t/* Send to VF */\n-\t\t\t\tmbox_msg_send(&dev->mbox_vfpf_up, vf);\n+\t\t\t\tmbox_msg_send_up(&dev->mbox_vfpf_up, vf);\n+\t\t\t\tmbox_wait_for_zero(&dev->mbox_vfpf_up, vf);\n \t\t\t}\n \t\t}\n \n@@ -498,6 +499,7 @@ pf_vf_mbox_send_up_msg(struct dev *dev, void *rec_msg)\n \n \t\t/* Send to VF */\n \t\tmbox_msg_send(vf_mbox, vf);\n+\t\tmbox_wait_for_zero(&dev->mbox_vfpf_up, vf);\n \t}\n }\n \n@@ -631,6 +633,7 @@ static void\n roc_pf_vf_mbox_irq(void *param)\n {\n \tstruct dev *dev = param;\n+\tuint64_t mbox_data;\n \tuint64_t intr;\n \n \tintr = plt_read64(dev->bar2 + RVU_VF_INT);\n@@ -640,6 +643,13 @@ roc_pf_vf_mbox_irq(void *param)\n \tplt_write64(intr, dev->bar2 + RVU_VF_INT);\n \tplt_base_dbg(\"Irq 0x%\" PRIx64 \"(pf:%d,vf:%d)\", intr, dev->pf, dev->vf);\n \n+\t/* Reading for UP/DOWN message, next message sending will be delayed\n+\t * by 1ms until this region is zeroed mbox_wait_for_zero()\n+\t */\n+\tmbox_data = plt_read64(dev->bar2 + RVU_VF_VFPF_MBOX0);\n+\tif (mbox_data)\n+\t\tplt_write64(!mbox_data, dev->bar2 + RVU_VF_VFPF_MBOX0);\n+\n \t/* First process all configuration messages */\n \tprocess_msgs(dev, dev->mbox);\n \n@@ -651,6 +661,7 @@ static void\n roc_af_pf_mbox_irq(void *param)\n {\n \tstruct dev *dev = param;\n+\tuint64_t mbox_data;\n \tuint64_t intr;\n \n \tintr = plt_read64(dev->bar2 + RVU_PF_INT);\n@@ -660,6 +671,13 @@ roc_af_pf_mbox_irq(void *param)\n \tplt_write64(intr, dev->bar2 + RVU_PF_INT);\n \tplt_base_dbg(\"Irq 0x%\" PRIx64 \"(pf:%d,vf:%d)\", intr, dev->pf, dev->vf);\n \n+\t/* Reading for UP/DOWN message, next message sending will be delayed\n+\t * by 1ms until this region is zeroed mbox_wait_for_zero()\n+\t */\n+\tmbox_data = plt_read64(dev->bar2 + RVU_PF_PFAF_MBOX0);\n+\tif (mbox_data)\n+\t\tplt_write64(!mbox_data, dev->bar2 + RVU_PF_PFAF_MBOX0);\n+\n \t/* First process all configuration messages */\n \tprocess_msgs(dev, dev->mbox);\n \ndiff --git a/drivers/common/cnxk/roc_mbox.c b/drivers/common/cnxk/roc_mbox.c\nindex 7dcd188ca7..5338a960d9 100644\n--- a/drivers/common/cnxk/roc_mbox.c\n+++ b/drivers/common/cnxk/roc_mbox.c\n@@ -10,18 +10,6 @@\n #include \"roc_api.h\"\n #include \"roc_priv.h\"\n \n-#define RVU_AF_AFPF_MBOX0 (0x02000)\n-#define RVU_AF_AFPF_MBOX1 (0x02008)\n-\n-#define RVU_PF_PFAF_MBOX0 (0xC00)\n-#define RVU_PF_PFAF_MBOX1 (0xC08)\n-\n-#define RVU_PF_VFX_PFVF_MBOX0 (0x0000)\n-#define RVU_PF_VFX_PFVF_MBOX1 (0x0008)\n-\n-#define RVU_VF_VFPF_MBOX0 (0x0000)\n-#define RVU_VF_VFPF_MBOX1 (0x0008)\n-\n /* RCLK, SCLK in MHz */\n uint16_t dev_rclk_freq;\n uint16_t dev_sclk_freq;\n@@ -194,10 +182,31 @@ mbox_alloc_msg_rsp(struct mbox *mbox, int devid, int size, int size_rsp)\n \n /**\n * @internal\n- * Send a mailbox message\n+ * Synchronization between UP and DOWN messages\n */\n-void\n-mbox_msg_send(struct mbox *mbox, int devid)\n+bool\n+mbox_wait_for_zero(struct mbox *mbox, int devid)\n+{\n+\tuint64_t data;\n+\n+\tdata = plt_read64((volatile void *)(mbox->reg_base +\n+\t\t\t\t(mbox->trigger | (devid << mbox->tr_shift))));\n+\n+\t/* If data is non-zero wait for ~1ms and return to caller\n+\t * whether data has changed to zero or not after the wait.\n+\t */\n+\tif (data)\n+\t\tusleep(1000);\n+\telse\n+\t\treturn true;\n+\n+\tdata = plt_read64((volatile void *)(mbox->reg_base +\n+\t\t\t\t(mbox->trigger | (devid << mbox->tr_shift))));\n+\treturn data == 0;\n+}\n+\n+static void\n+mbox_msg_send_data(struct mbox *mbox, int devid, uint8_t data)\n {\n \tstruct mbox_dev *mdev = &mbox->dev[devid];\n \tstruct mbox_hdr *tx_hdr =\n@@ -223,9 +232,28 @@ mbox_msg_send(struct mbox *mbox, int devid)\n \t/* The interrupt should be fired after num_msgs is written\n \t * to the shared memory\n \t */\n-\tplt_write64(1, (volatile void *)(mbox->reg_base +\n-\t\t\t\t\t (mbox->trigger |\n-\t\t\t\t\t (devid << mbox->tr_shift))));\n+\tplt_write64(data, (volatile void *)(mbox->reg_base +\n+\t\t\t\t(mbox->trigger | (devid << mbox->tr_shift))));\n+}\n+\n+/**\n+ * @internal\n+ * Send a mailbox message\n+ */\n+void\n+mbox_msg_send(struct mbox *mbox, int devid)\n+{\n+\tmbox_msg_send_data(mbox, devid, MBOX_DOWN_MSG);\n+}\n+\n+/**\n+ * @internal\n+ * Send an UP mailbox message\n+ */\n+void\n+mbox_msg_send_up(struct mbox *mbox, int devid)\n+{\n+\tmbox_msg_send_data(mbox, devid, MBOX_UP_MSG);\n }\n \n /**\ndiff --git a/drivers/common/cnxk/roc_mbox.h b/drivers/common/cnxk/roc_mbox.h\nindex 3d5746b9b8..93c5451c0f 100644\n--- a/drivers/common/cnxk/roc_mbox.h\n+++ b/drivers/common/cnxk/roc_mbox.h\n@@ -35,6 +35,21 @@ struct mbox_msghdr {\n \tint __io rc; /* Msg processed response code */\n };\n \n+#define RVU_AF_AFPF_MBOX0 (0x02000)\n+#define RVU_AF_AFPF_MBOX1 (0x02008)\n+\n+#define RVU_PF_PFAF_MBOX0 (0xC00)\n+#define RVU_PF_PFAF_MBOX1 (0xC08)\n+\n+#define RVU_PF_VFX_PFVF_MBOX0 (0x0000)\n+#define RVU_PF_VFX_PFVF_MBOX1 (0x0008)\n+\n+#define RVU_VF_VFPF_MBOX0 (0x0000)\n+#define RVU_VF_VFPF_MBOX1 (0x0008)\n+\n+#define MBOX_DOWN_MSG 1\n+#define MBOX_UP_MSG 2\n+\n /* Mailbox message types */\n #define MBOX_MSG_MASK\t 0xFFFF\n #define MBOX_MSG_INVALID 0xFFFE\ndiff --git a/drivers/common/cnxk/roc_mbox_priv.h b/drivers/common/cnxk/roc_mbox_priv.h\nindex 4fafca6f72..354c8fa52a 100644\n--- a/drivers/common/cnxk/roc_mbox_priv.h\n+++ b/drivers/common/cnxk/roc_mbox_priv.h\n@@ -71,10 +71,12 @@ struct mbox {\n const char *mbox_id2name(uint16_t id);\n int mbox_id2size(uint16_t id);\n void mbox_reset(struct mbox *mbox, int devid);\n-int mbox_init(struct mbox *mbox, uintptr_t hwbase, uintptr_t reg_base,\n-\t int direction, int ndevsi, uint64_t intr_offset);\n+int mbox_init(struct mbox *mbox, uintptr_t hwbase, uintptr_t reg_base, int direction, int ndevsi,\n+\t uint64_t intr_offset);\n void mbox_fini(struct mbox *mbox);\n void mbox_msg_send(struct mbox *mbox, int devid);\n+void mbox_msg_send_up(struct mbox *mbox, int devid);\n+bool mbox_wait_for_zero(struct mbox *mbox, int devid);\n int mbox_wait_for_rsp(struct mbox *mbox, int devid);\n int mbox_wait_for_rsp_tmo(struct mbox *mbox, int devid, uint32_t tmo);\n int mbox_get_rsp(struct mbox *mbox, int devid, void **msg);\n", "prefixes": [ "16/21" ] }