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GET /api/patches/125878/?format=api
{ "id": 125878, "url": "http://patches.dpdk.org/api/patches/125878/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230410110015.2973660-3-chaoyong.he@corigine.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230410110015.2973660-3-chaoyong.he@corigine.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230410110015.2973660-3-chaoyong.he@corigine.com", "date": "2023-04-10T11:00:04", "name": "[02/13] net/nfp: move shared target logic to own source file", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "145498d37104d6a83d6ff63945258d70a78f7cf0", "submitter": { "id": 2554, "url": "http://patches.dpdk.org/api/people/2554/?format=api", "name": "Chaoyong He", "email": "chaoyong.he@corigine.com" }, "delegate": { "id": 319, "url": "http://patches.dpdk.org/api/users/319/?format=api", "username": "fyigit", "first_name": "Ferruh", "last_name": "Yigit", "email": "ferruh.yigit@amd.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230410110015.2973660-3-chaoyong.he@corigine.com/mbox/", "series": [ { "id": 27651, "url": "http://patches.dpdk.org/api/series/27651/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27651", "date": "2023-04-10T11:00:02", "name": "Sync the kernel driver logic", "version": 1, "mbox": "http://patches.dpdk.org/series/27651/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/125878/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/125878/checks/", "tags": {}, "related": [], "headers": { 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"Authentication-Results": "dkim=none (message not signed)\n header.d=none;dmarc=none action=none header.from=corigine.com;", "From": "Chaoyong He <chaoyong.he@corigine.com>", "To": "dev@dpdk.org", "Cc": "oss-drivers@corigine.com, niklas.soderlund@corigine.com,\n Chaoyong He <chaoyong.he@corigine.com>", "Subject": "[PATCH 02/13] net/nfp: move shared target logic to own source file", "Date": "Mon, 10 Apr 2023 19:00:04 +0800", "Message-Id": "<20230410110015.2973660-3-chaoyong.he@corigine.com>", "X-Mailer": "git-send-email 2.39.1", "In-Reply-To": "<20230410110015.2973660-1-chaoyong.he@corigine.com>", "References": "<20230410110015.2973660-1-chaoyong.he@corigine.com>", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-ClientProxiedBy": "SI2PR01CA0040.apcprd01.prod.exchangelabs.com\n (2603:1096:4:193::14) To SJ0PR13MB5545.namprd13.prod.outlook.com\n (2603:10b6:a03:424::5)", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", 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"=?utf-8?q?s72jQi6Kb7vFgmSiODjhN5spjUZe?=\n\t=?utf-8?q?enl1NpgIeFfa3u5/ihjTmWnX/HMa2GcytOuY+aHjgDRJGJHFc/9ylhY2/Ldz/5Jhz?=\n\t=?utf-8?q?vsByrPBdHvbRwgJURipXq/btPQpLa5qmrxfz4Ltl2R3ynxcrsyaW+DyiaDOYtar23?=\n\t=?utf-8?q?sBlT4UnVec9KV36rRSh4YfvjSMGDKv4j7/Dg2fh4fxd7wKd6PqJ3DiXVXd9a8sgo4?=\n\t=?utf-8?q?NfbD4TTRyJNBwovNfMHx2bdN0YEOdjVSHjHyc14M4eGEHkd3y5BqXV+zyD074Q4Oc?=\n\t=?utf-8?q?DWdjrBvO1DkZ7JT8R/D2e4XeBj3IIf2wXfA70EKjujpNwRo6Df26Q9Lewvld5pAyv?=\n\t=?utf-8?q?LjOkCMK460h900o1MvBP6cJ7uDb+r5PNczoDj8mwdCcEKaJfykEHciRx5fN228DlA?=\n\t=?utf-8?q?Xt9eWzjKSHNthDjO4r2Bv4QaMhWVPiW7HNAqpKvseO0QrikVBr+hRQ3tugBKHIJXt?=\n\t=?utf-8?q?xErlA/AJfLN5A7hOAn9tCzTTPDbCEbid2+QR13emdDtD6nU/GNGjmWzE6rcFG3bSO?=\n\t=?utf-8?q?9crYRvgM7usw8K9kdl8vcnsFz3ozd3zoXq2YYdZDDglea85sD84JWzc8zyperLQhD?=\n\t=?utf-8?q?MAFPJEE0eJElGVHnOUkUIsOAPr6gaAFTa7JcgnTMA4L+WVw4CtsqWEv0++CQkmxH+?=\n\t=?utf-8?q?51b2jHsdqKVtL65GzZgZjSa8HPk38sW30l+D5kPP7Y6qF5PqLD9kyO6MRJvI8mIjY?=\n\t=?utf-8?q?tkRdetEFH/UdLAZxYnPaGhl/nYX1YuiGG+UJQXS2gRA2LlUaOGdmIZu8dBlvXN3VK?=\n\t=?utf-8?q?Cgz+rjQ8Rm6UbUPHCMwpr8OD31nLRd/Y/kL5JJivTCRMO4Lkr38c34yoZTefcfbU+?=\n\t=?utf-8?q?2+MZMlkGXHKt4kVM+ENIeDcUrk7/NDu9S0/FLetNN8RZxk+7ebTBo/RkHXKXRvnn7?=\n\t=?utf-8?q?RruI05E4kLdXEsqISQLLpwX0/F2ezr5wkOxIFPQy+OnuNtB6t9vkfi3hfFUqHPdAc?=\n\t=?utf-8?q?CeY6T9RvVUAdFMnwsoOnh02qFPICK7SHp1FGSPncZItzL49RVhXNUoa22f4DN8dX0?=\n\t=?utf-8?q?1vDp3ezqmYqthQXX27/YxCJAXwpRPeB5JU1zR4XKqccd5DBNbXM5QOXMewzoAHzgx?=\n\t=?utf-8?q?su68JGf9kvUENy+1EwjD1qS/DRf5kGW1D0oVBijwca3MUuAG59lZZXB/OjS+gEtiW?=\n\t=?utf-8?q?pc10Jg8JxYTuX/YX8JQCLbZ/J39VttcpB9q69j9MJSB6Bab2BendabS1GVk5Nl52S?=\n\t=?utf-8?q?f2Ru2ye+gMWcijrsGU3Qpn8uNY6qHrZefHkJl303tQ096oCcVHHs156vKYW6q/hVg?=\n\t=?utf-8?q?PIg3+U6IfOToXkWjkkGof+7acNbb7IreriLYAx3V6U0SjlVRLHyk+e5Tygv/XO5XK?=\n\t=?utf-8?q?tt76pCD/n8v5KQJ3DQ8Rg9XWQ86GLzo39XCaYLLQphA5NROdmBvrp5jslEVAiAEpH?=\n\t=?utf-8?q?ZTE44bPzaUh6zkSBoki8n8M0Q4rBHGmessp5UhAPexj85C4t+AoOVyzbPdHAMG5MC?=\n\t=?utf-8?q?I1HGpocz+c+7Sq88XZU74UVL6ivWDaccLRlBy23fYNeqgmTlltUsAjLYBtKhZM+Dd?=\n\t=?utf-8?q?PtQmuwmjOMUMMN2FUZToQlU+L0rvdznz3A=3D=3D?=", "X-OriginatorOrg": "corigine.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 3f77fdbe-5998-4158-6705-08db39b2d98e", "X-MS-Exchange-CrossTenant-AuthSource": "SJ0PR13MB5545.namprd13.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "10 Apr 2023 11:00:52.3951 (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "fe128f2c-073b-4c20-818e-7246a585940c", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n DxmxkbmHpyBxyb2ocgkbCz0YZXdYnSgrTgiJ6yjgs8SYgonr+K1jEk25R2GYVypY+hRT0+bk/7UXOj2+reaT4dESAz5Li/RRoD6a9OmEvAo=", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM6PR13MB3882", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Move the needed logic of nfp_target.h and nfp_cppat.h\nto a new source file nfp_target.c, and delete the logic\nwhich are not used at all.\n\nThe code is moved verbatim from the header file to the source\nfile, no functional change.\n\nThis mainly to mimic the source file structure in the kernel\ndriver, and also gives a nice decrease in driver size.\n\nSigned-off-by: Chaoyong He <chaoyong.he@corigine.com>\nReviewed-by: Niklas Söderlund <niklas.soderlund@corigine.com>\n---\n drivers/net/nfp/meson.build | 1 +\n .../net/nfp/nfpcore/nfp-common/nfp_cppat.h | 725 -------------\n drivers/net/nfp/nfpcore/nfp6000/nfp6000.h | 20 +\n drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c | 3 +-\n drivers/net/nfp/nfpcore/nfp_cppcore.c | 1 -\n drivers/net/nfp/nfpcore/nfp_target.c | 994 ++++++++++++++++++\n drivers/net/nfp/nfpcore/nfp_target.h | 1 -\n 7 files changed, 1016 insertions(+), 729 deletions(-)\n delete mode 100644 drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h\n create mode 100644 drivers/net/nfp/nfpcore/nfp_target.c", "diff": "diff --git a/drivers/net/nfp/meson.build b/drivers/net/nfp/meson.build\nindex b60eaed2b7..6d122f5ce9 100644\n--- a/drivers/net/nfp/meson.build\n+++ b/drivers/net/nfp/meson.build\n@@ -22,6 +22,7 @@ sources = files(\n 'nfpcore/nfp_mutex.c',\n 'nfpcore/nfp_nsp_eth.c',\n 'nfpcore/nfp_hwinfo.c',\n+ 'nfpcore/nfp_target.c',\n 'nfp_common.c',\n 'nfp_rxtx.c',\n 'nfp_cpp_bridge.c',\ndiff --git a/drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h b/drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h\ndeleted file mode 100644\nindex 538f882bf2..0000000000\n--- a/drivers/net/nfp/nfpcore/nfp-common/nfp_cppat.h\n+++ /dev/null\n@@ -1,725 +0,0 @@\n-/* SPDX-License-Identifier: BSD-3-Clause\n- * Copyright(c) 2018 Netronome Systems, Inc.\n- * All rights reserved.\n- */\n-\n-#ifndef __NFP_CPPAT_H__\n-#define __NFP_CPPAT_H__\n-\n-#include \"nfp_platform.h\"\n-#include \"nfp_resid.h\"\n-\n-/* This file contains helpers for creating CPP commands\n- *\n- * All magic NFP-6xxx IMB 'mode' numbers here are from:\n- * Databook (1 August 2013)\n- * - System Overview and Connectivity\n- * -- Internal Connectivity\n- * --- Distributed Switch Fabric - Command Push/Pull (DSF-CPP) Bus\n- * ---- CPP addressing\n- * ----- Table 3.6. CPP Address Translation Mode Commands\n- */\n-\n-#define _NIC_NFP6000_MU_LOCALITY_DIRECT 2\n-\n-static inline int\n-_nfp6000_decode_basic(uint64_t addr, int *dest_island, int cpp_tgt, int mode,\n-\t\t int addr40, int isld1, int isld0);\n-\n-static uint64_t\n-_nic_mask64(int msb, int lsb, int at0)\n-{\n-\tuint64_t v;\n-\tint w = msb - lsb + 1;\n-\n-\tif (w == 64)\n-\t\treturn ~(uint64_t)0;\n-\n-\tif ((lsb + w) > 64)\n-\t\treturn 0;\n-\n-\tv = (UINT64_C(1) << w) - 1;\n-\n-\tif (at0)\n-\t\treturn v;\n-\n-\treturn v << lsb;\n-}\n-\n-/* For VQDR, we may not modify the Channel bits, which might overlap\n- * with the Index bit. When it does, we need to ensure that isld0 == isld1.\n- */\n-static inline int\n-_nfp6000_encode_basic(uint64_t *addr, int dest_island, int cpp_tgt, int mode,\n-\t\t int addr40, int isld1, int isld0)\n-{\n-\tuint64_t _u64;\n-\tint iid_lsb, idx_lsb;\n-\tint i, v = 0;\n-\tint isld[2];\n-\n-\tisld[0] = isld0;\n-\tisld[1] = isld1;\n-\n-\tswitch (cpp_tgt) {\n-\tcase NFP6000_CPPTGT_MU:\n-\t\t/* This function doesn't handle MU */\n-\t\treturn NFP_ERRNO(EINVAL);\n-\tcase NFP6000_CPPTGT_CTXPB:\n-\t\t/* This function doesn't handle CTXPB */\n-\t\treturn NFP_ERRNO(EINVAL);\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\tswitch (mode) {\n-\tcase 0:\n-\t\tif (cpp_tgt == NFP6000_CPPTGT_VQDR && !addr40) {\n-\t\t\t/*\n-\t\t\t * In this specific mode we'd rather not modify the\n-\t\t\t * address but we can verify if the existing contents\n-\t\t\t * will point to a valid island.\n-\t\t\t */\n-\t\t\ti = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode,\n-\t\t\t\t\t\t addr40, isld1,\n-\t\t\t\t\t\t isld0);\n-\t\t\tif (i != 0)\n-\t\t\t\t/* Full Island ID and channel bits overlap */\n-\t\t\t\treturn i;\n-\n-\t\t\t/*\n-\t\t\t * If dest_island is invalid, the current address won't\n-\t\t\t * go where expected.\n-\t\t\t */\n-\t\t\tif (dest_island != -1 && dest_island != v)\n-\t\t\t\treturn NFP_ERRNO(EINVAL);\n-\n-\t\t\t/* If dest_island was -1, we don't care */\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tiid_lsb = (addr40) ? 34 : 26;\n-\n-\t\t/* <39:34> or <31:26> */\n-\t\t_u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);\n-\t\t*addr &= ~_u64;\n-\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;\n-\t\treturn 0;\n-\tcase 1:\n-\t\tif (cpp_tgt == NFP6000_CPPTGT_VQDR && !addr40) {\n-\t\t\ti = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode,\n-\t\t\t\t\t\t addr40, isld1, isld0);\n-\t\t\tif (i != 0)\n-\t\t\t\t/* Full Island ID and channel bits overlap */\n-\t\t\t\treturn i;\n-\n-\t\t\t/*\n-\t\t\t * If dest_island is invalid, the current address won't\n-\t\t\t * go where expected.\n-\t\t\t */\n-\t\t\tif (dest_island != -1 && dest_island != v)\n-\t\t\t\treturn NFP_ERRNO(EINVAL);\n-\n-\t\t\t/* If dest_island was -1, we don't care */\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tidx_lsb = (addr40) ? 39 : 31;\n-\t\tif (dest_island == isld0) {\n-\t\t\t/* Only need to clear the Index bit */\n-\t\t\t*addr &= ~_nic_mask64(idx_lsb, idx_lsb, 0);\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tif (dest_island == isld1) {\n-\t\t\t/* Only need to set the Index bit */\n-\t\t\t*addr |= (UINT64_C(1) << idx_lsb);\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\treturn NFP_ERRNO(ENODEV);\n-\tcase 2:\n-\t\tif (cpp_tgt == NFP6000_CPPTGT_VQDR && !addr40) {\n-\t\t\t/* iid<0> = addr<30> = channel<0> */\n-\t\t\t/* channel<1> = addr<31> = Index */\n-\n-\t\t\t/*\n-\t\t\t * Special case where we allow channel bits to be set\n-\t\t\t * before hand and with them select an island.\n-\t\t\t * So we need to confirm that it's at least plausible.\n-\t\t\t */\n-\t\t\ti = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode,\n-\t\t\t\t\t\t addr40, isld1, isld0);\n-\t\t\tif (i != 0)\n-\t\t\t\t/* Full Island ID and channel bits overlap */\n-\t\t\t\treturn i;\n-\n-\t\t\t/*\n-\t\t\t * If dest_island is invalid, the current address won't\n-\t\t\t * go where expected.\n-\t\t\t */\n-\t\t\tif (dest_island != -1 && dest_island != v)\n-\t\t\t\treturn NFP_ERRNO(EINVAL);\n-\n-\t\t\t/* If dest_island was -1, we don't care */\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\t/*\n-\t\t * Make sure we compare against isldN values by clearing the\n-\t\t * LSB. This is what the silicon does.\n-\t\t **/\n-\t\tisld[0] &= ~1;\n-\t\tisld[1] &= ~1;\n-\n-\t\tidx_lsb = (addr40) ? 39 : 31;\n-\t\tiid_lsb = idx_lsb - 1;\n-\n-\t\t/*\n-\t\t * Try each option, take first one that fits. Not sure if we\n-\t\t * would want to do some smarter searching and prefer 0 or non-0\n-\t\t * island IDs.\n-\t\t */\n-\n-\t\tfor (i = 0; i < 2; i++) {\n-\t\t\tfor (v = 0; v < 2; v++) {\n-\t\t\t\tif (dest_island != (isld[i] | v))\n-\t\t\t\t\tcontinue;\n-\t\t\t\t*addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0);\n-\t\t\t\t*addr |= (((uint64_t)i) << idx_lsb);\n-\t\t\t\t*addr |= (((uint64_t)v) << iid_lsb);\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\t\t}\n-\n-\t\treturn NFP_ERRNO(ENODEV);\n-\tcase 3:\n-\t\tif (cpp_tgt == NFP6000_CPPTGT_VQDR && !addr40) {\n-\t\t\t/*\n-\t\t\t * iid<0> = addr<29> = data\n-\t\t\t * iid<1> = addr<30> = channel<0>\n-\t\t\t * channel<1> = addr<31> = Index\n-\t\t\t */\n-\t\t\ti = _nfp6000_decode_basic(*addr, &v, cpp_tgt, mode,\n-\t\t\t\t\t\t addr40, isld1, isld0);\n-\t\t\tif (i != 0)\n-\t\t\t\t/* Full Island ID and channel bits overlap */\n-\t\t\t\treturn i;\n-\n-\t\t\tif (dest_island != -1 && dest_island != v)\n-\t\t\t\treturn NFP_ERRNO(EINVAL);\n-\n-\t\t\t/* If dest_island was -1, we don't care */\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tisld[0] &= ~3;\n-\t\tisld[1] &= ~3;\n-\n-\t\tidx_lsb = (addr40) ? 39 : 31;\n-\t\tiid_lsb = idx_lsb - 2;\n-\n-\t\tfor (i = 0; i < 2; i++) {\n-\t\t\tfor (v = 0; v < 4; v++) {\n-\t\t\t\tif (dest_island != (isld[i] | v))\n-\t\t\t\t\tcontinue;\n-\t\t\t\t*addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0);\n-\t\t\t\t*addr |= (((uint64_t)i) << idx_lsb);\n-\t\t\t\t*addr |= (((uint64_t)v) << iid_lsb);\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\t\t}\n-\t\treturn NFP_ERRNO(ENODEV);\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\treturn NFP_ERRNO(EINVAL);\n-}\n-\n-static inline int\n-_nfp6000_decode_basic(uint64_t addr, int *dest_island, int cpp_tgt, int mode,\n-\t\t int addr40, int isld1, int isld0)\n-{\n-\tint iid_lsb, idx_lsb;\n-\n-\tswitch (cpp_tgt) {\n-\tcase NFP6000_CPPTGT_MU:\n-\t\t/* This function doesn't handle MU */\n-\t\treturn NFP_ERRNO(EINVAL);\n-\tcase NFP6000_CPPTGT_CTXPB:\n-\t\t/* This function doesn't handle CTXPB */\n-\t\treturn NFP_ERRNO(EINVAL);\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\tswitch (mode) {\n-\tcase 0:\n-\t\t/*\n-\t\t * For VQDR, in this mode for 32-bit addressing it would be\n-\t\t * islands 0, 16, 32 and 48 depending on channel and upper\n-\t\t * address bits. Since those are not all valid islands, most\n-\t\t * decode cases would result in bad island IDs, but we do them\n-\t\t * anyway since this is decoding an address that is already\n-\t\t * assumed to be used as-is to get to sram.\n-\t\t */\n-\t\tiid_lsb = (addr40) ? 34 : 26;\n-\t\t*dest_island = (int)(addr >> iid_lsb) & 0x3F;\n-\t\treturn 0;\n-\tcase 1:\n-\t\t/*\n-\t\t * For VQDR 32-bit, this would decode as:\n-\t\t *\tChannel 0: island#0\n-\t\t *\tChannel 1: island#0\n-\t\t *\tChannel 2: island#1\n-\t\t *\tChannel 3: island#1\n-\t\t *\n-\t\t * That would be valid as long as both islands have VQDR.\n-\t\t * Let's allow this.\n-\t\t */\n-\n-\t\tidx_lsb = (addr40) ? 39 : 31;\n-\t\tif (addr & _nic_mask64(idx_lsb, idx_lsb, 0))\n-\t\t\t*dest_island = isld1;\n-\t\telse\n-\t\t\t*dest_island = isld0;\n-\n-\t\treturn 0;\n-\tcase 2:\n-\t\t/*\n-\t\t * For VQDR 32-bit:\n-\t\t *\tChannel 0: (island#0 | 0)\n-\t\t *\tChannel 1: (island#0 | 1)\n-\t\t *\tChannel 2: (island#1 | 0)\n-\t\t *\tChannel 3: (island#1 | 1)\n-\t\t *\n-\t\t * Make sure we compare against isldN values by clearing the\n-\t\t * LSB. This is what the silicon does.\n-\t\t */\n-\t\tisld0 &= ~1;\n-\t\tisld1 &= ~1;\n-\n-\t\tidx_lsb = (addr40) ? 39 : 31;\n-\t\tiid_lsb = idx_lsb - 1;\n-\n-\t\tif (addr & _nic_mask64(idx_lsb, idx_lsb, 0))\n-\t\t\t*dest_island = isld1 | (int)((addr >> iid_lsb) & 1);\n-\t\telse\n-\t\t\t*dest_island = isld0 | (int)((addr >> iid_lsb) & 1);\n-\n-\t\treturn 0;\n-\tcase 3:\n-\t\t/*\n-\t\t * In this mode the data address starts to affect the island ID\n-\t\t * so rather not allow it. In some really specific case one\n-\t\t * could use this to send the upper half of the VQDR channel to\n-\t\t * another MU, but this is getting very specific. However, as\n-\t\t * above for mode 0, this is the decoder and the caller should\n-\t\t * validate the resulting IID. This blindly does what the\n-\t\t * silicon would do.\n-\t\t */\n-\n-\t\tisld0 &= ~3;\n-\t\tisld1 &= ~3;\n-\n-\t\tidx_lsb = (addr40) ? 39 : 31;\n-\t\tiid_lsb = idx_lsb - 2;\n-\n-\t\tif (addr & _nic_mask64(idx_lsb, idx_lsb, 0))\n-\t\t\t*dest_island = isld1 | (int)((addr >> iid_lsb) & 3);\n-\t\telse\n-\t\t\t*dest_island = isld0 | (int)((addr >> iid_lsb) & 3);\n-\n-\t\treturn 0;\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\treturn NFP_ERRNO(EINVAL);\n-}\n-\n-static inline int\n-_nfp6000_cppat_mu_locality_lsb(int mode, int addr40)\n-{\n-\tswitch (mode) {\n-\tcase 0:\n-\tcase 1:\n-\tcase 2:\n-\tcase 3:\n-\t\treturn (addr40) ? 38 : 30;\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\treturn NFP_ERRNO(EINVAL);\n-}\n-\n-static inline int\n-_nfp6000_encode_mu(uint64_t *addr, int dest_island, int mode, int addr40,\n-\t\t int isld1, int isld0)\n-{\n-\tuint64_t _u64;\n-\tint iid_lsb, idx_lsb, locality_lsb;\n-\tint i, v;\n-\tint isld[2];\n-\tint da;\n-\n-\tisld[0] = isld0;\n-\tisld[1] = isld1;\n-\tlocality_lsb = _nfp6000_cppat_mu_locality_lsb(mode, addr40);\n-\n-\tif (locality_lsb < 0)\n-\t\treturn NFP_ERRNO(EINVAL);\n-\n-\tif (((*addr >> locality_lsb) & 3) == _NIC_NFP6000_MU_LOCALITY_DIRECT)\n-\t\tda = 1;\n-\telse\n-\t\tda = 0;\n-\n-\tswitch (mode) {\n-\tcase 0:\n-\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t_u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);\n-\t\t*addr &= ~_u64;\n-\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;\n-\t\treturn 0;\n-\tcase 1:\n-\t\tif (da) {\n-\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t_u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);\n-\t\t\t*addr &= ~_u64;\n-\t\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tidx_lsb = (addr40) ? 37 : 29;\n-\t\tif (dest_island == isld0) {\n-\t\t\t*addr &= ~_nic_mask64(idx_lsb, idx_lsb, 0);\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tif (dest_island == isld1) {\n-\t\t\t*addr |= (UINT64_C(1) << idx_lsb);\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\treturn NFP_ERRNO(ENODEV);\n-\tcase 2:\n-\t\tif (da) {\n-\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t_u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);\n-\t\t\t*addr &= ~_u64;\n-\t\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\t/*\n-\t\t * Make sure we compare against isldN values by clearing the\n-\t\t * LSB. This is what the silicon does.\n-\t\t */\n-\t\tisld[0] &= ~1;\n-\t\tisld[1] &= ~1;\n-\n-\t\tidx_lsb = (addr40) ? 37 : 29;\n-\t\tiid_lsb = idx_lsb - 1;\n-\n-\t\t/*\n-\t\t * Try each option, take first one that fits. Not sure if we\n-\t\t * would want to do some smarter searching and prefer 0 or\n-\t\t * non-0 island IDs.\n-\t\t */\n-\n-\t\tfor (i = 0; i < 2; i++) {\n-\t\t\tfor (v = 0; v < 2; v++) {\n-\t\t\t\tif (dest_island != (isld[i] | v))\n-\t\t\t\t\tcontinue;\n-\t\t\t\t*addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0);\n-\t\t\t\t*addr |= (((uint64_t)i) << idx_lsb);\n-\t\t\t\t*addr |= (((uint64_t)v) << iid_lsb);\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\t\t}\n-\t\treturn NFP_ERRNO(ENODEV);\n-\tcase 3:\n-\t\t/*\n-\t\t * Only the EMU will use 40 bit addressing. Silently set the\n-\t\t * direct locality bit for everyone else. The SDK toolchain\n-\t\t * uses dest_island <= 0 to test for atypical address encodings\n-\t\t * to support access to local-island CTM with a 32-but address\n-\t\t * (high-locality is effectively ignored and just used for\n-\t\t * routing to island #0).\n-\t\t */\n-\t\tif (dest_island > 0 &&\n-\t\t (dest_island < 24 || dest_island > 26)) {\n-\t\t\t*addr |= ((uint64_t)_NIC_NFP6000_MU_LOCALITY_DIRECT)\n-\t\t\t\t << locality_lsb;\n-\t\t\tda = 1;\n-\t\t}\n-\n-\t\tif (da) {\n-\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t_u64 = _nic_mask64((iid_lsb + 5), iid_lsb, 0);\n-\t\t\t*addr &= ~_u64;\n-\t\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & _u64;\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tisld[0] &= ~3;\n-\t\tisld[1] &= ~3;\n-\n-\t\tidx_lsb = (addr40) ? 37 : 29;\n-\t\tiid_lsb = idx_lsb - 2;\n-\n-\t\tfor (i = 0; i < 2; i++) {\n-\t\t\tfor (v = 0; v < 4; v++) {\n-\t\t\t\tif (dest_island != (isld[i] | v))\n-\t\t\t\t\tcontinue;\n-\t\t\t\t*addr &= ~_nic_mask64(idx_lsb, iid_lsb, 0);\n-\t\t\t\t*addr |= (((uint64_t)i) << idx_lsb);\n-\t\t\t\t*addr |= (((uint64_t)v) << iid_lsb);\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\t\t}\n-\n-\t\treturn NFP_ERRNO(ENODEV);\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\treturn NFP_ERRNO(EINVAL);\n-}\n-\n-static inline int\n-_nfp6000_decode_mu(uint64_t addr, int *dest_island, int mode, int addr40,\n-\t\t int isld1, int isld0)\n-{\n-\tint iid_lsb, idx_lsb, locality_lsb;\n-\tint da;\n-\n-\tlocality_lsb = _nfp6000_cppat_mu_locality_lsb(mode, addr40);\n-\n-\tif (((addr >> locality_lsb) & 3) == _NIC_NFP6000_MU_LOCALITY_DIRECT)\n-\t\tda = 1;\n-\telse\n-\t\tda = 0;\n-\n-\tswitch (mode) {\n-\tcase 0:\n-\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t*dest_island = (int)(addr >> iid_lsb) & 0x3F;\n-\t\treturn 0;\n-\tcase 1:\n-\t\tif (da) {\n-\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t*dest_island = (int)(addr >> iid_lsb) & 0x3F;\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tidx_lsb = (addr40) ? 37 : 29;\n-\n-\t\tif (addr & _nic_mask64(idx_lsb, idx_lsb, 0))\n-\t\t\t*dest_island = isld1;\n-\t\telse\n-\t\t\t*dest_island = isld0;\n-\n-\t\treturn 0;\n-\tcase 2:\n-\t\tif (da) {\n-\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t*dest_island = (int)(addr >> iid_lsb) & 0x3F;\n-\t\t\treturn 0;\n-\t\t}\n-\t\t/*\n-\t\t * Make sure we compare against isldN values by clearing the\n-\t\t * LSB. This is what the silicon does.\n-\t\t */\n-\t\tisld0 &= ~1;\n-\t\tisld1 &= ~1;\n-\n-\t\tidx_lsb = (addr40) ? 37 : 29;\n-\t\tiid_lsb = idx_lsb - 1;\n-\n-\t\tif (addr & _nic_mask64(idx_lsb, idx_lsb, 0))\n-\t\t\t*dest_island = isld1 | (int)((addr >> iid_lsb) & 1);\n-\t\telse\n-\t\t\t*dest_island = isld0 | (int)((addr >> iid_lsb) & 1);\n-\n-\t\treturn 0;\n-\tcase 3:\n-\t\tif (da) {\n-\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t*dest_island = (int)(addr >> iid_lsb) & 0x3F;\n-\t\t\treturn 0;\n-\t\t}\n-\n-\t\tisld0 &= ~3;\n-\t\tisld1 &= ~3;\n-\n-\t\tidx_lsb = (addr40) ? 37 : 29;\n-\t\tiid_lsb = idx_lsb - 2;\n-\n-\t\tif (addr & _nic_mask64(idx_lsb, idx_lsb, 0))\n-\t\t\t*dest_island = isld1 | (int)((addr >> iid_lsb) & 3);\n-\t\telse\n-\t\t\t*dest_island = isld0 | (int)((addr >> iid_lsb) & 3);\n-\n-\t\treturn 0;\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\treturn NFP_ERRNO(EINVAL);\n-}\n-\n-static inline int\n-_nfp6000_cppat_addr_encode(uint64_t *addr, int dest_island, int cpp_tgt,\n-\t\t\t int mode, int addr40, int isld1, int isld0)\n-{\n-\tswitch (cpp_tgt) {\n-\tcase NFP6000_CPPTGT_NBI:\n-\tcase NFP6000_CPPTGT_VQDR:\n-\tcase NFP6000_CPPTGT_ILA:\n-\tcase NFP6000_CPPTGT_PCIE:\n-\tcase NFP6000_CPPTGT_ARM:\n-\tcase NFP6000_CPPTGT_CRYPTO:\n-\tcase NFP6000_CPPTGT_CLS:\n-\t\treturn _nfp6000_encode_basic(addr, dest_island, cpp_tgt, mode,\n-\t\t\t\t\t addr40, isld1, isld0);\n-\n-\tcase NFP6000_CPPTGT_MU:\n-\t\treturn _nfp6000_encode_mu(addr, dest_island, mode, addr40,\n-\t\t\t\t\t isld1, isld0);\n-\n-\tcase NFP6000_CPPTGT_CTXPB:\n-\t\tif (mode != 1 || addr40 != 0)\n-\t\t\treturn NFP_ERRNO(EINVAL);\n-\n-\t\t*addr &= ~_nic_mask64(29, 24, 0);\n-\t\t*addr |= (((uint64_t)dest_island) << 24) &\n-\t\t\t _nic_mask64(29, 24, 0);\n-\t\treturn 0;\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\treturn NFP_ERRNO(EINVAL);\n-}\n-\n-static inline int\n-_nfp6000_cppat_addr_decode(uint64_t addr, int *dest_island, int cpp_tgt,\n-\t\t\t int mode, int addr40, int isld1, int isld0)\n-{\n-\tswitch (cpp_tgt) {\n-\tcase NFP6000_CPPTGT_NBI:\n-\tcase NFP6000_CPPTGT_VQDR:\n-\tcase NFP6000_CPPTGT_ILA:\n-\tcase NFP6000_CPPTGT_PCIE:\n-\tcase NFP6000_CPPTGT_ARM:\n-\tcase NFP6000_CPPTGT_CRYPTO:\n-\tcase NFP6000_CPPTGT_CLS:\n-\t\treturn _nfp6000_decode_basic(addr, dest_island, cpp_tgt, mode,\n-\t\t\t\t\t addr40, isld1, isld0);\n-\n-\tcase NFP6000_CPPTGT_MU:\n-\t\treturn _nfp6000_decode_mu(addr, dest_island, mode, addr40,\n-\t\t\t\t\t isld1, isld0);\n-\n-\tcase NFP6000_CPPTGT_CTXPB:\n-\t\tif (mode != 1 || addr40 != 0)\n-\t\t\treturn -EINVAL;\n-\t\t*dest_island = (int)(addr >> 24) & 0x3F;\n-\t\treturn 0;\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\treturn -EINVAL;\n-}\n-\n-static inline int\n-_nfp6000_cppat_addr_iid_clear(uint64_t *addr, int cpp_tgt, int mode, int addr40)\n-{\n-\tint iid_lsb, locality_lsb, da;\n-\n-\tswitch (cpp_tgt) {\n-\tcase NFP6000_CPPTGT_NBI:\n-\tcase NFP6000_CPPTGT_VQDR:\n-\tcase NFP6000_CPPTGT_ILA:\n-\tcase NFP6000_CPPTGT_PCIE:\n-\tcase NFP6000_CPPTGT_ARM:\n-\tcase NFP6000_CPPTGT_CRYPTO:\n-\tcase NFP6000_CPPTGT_CLS:\n-\t\tswitch (mode) {\n-\t\tcase 0:\n-\t\t\tiid_lsb = (addr40) ? 34 : 26;\n-\t\t\t*addr &= ~(UINT64_C(0x3F) << iid_lsb);\n-\t\t\treturn 0;\n-\t\tcase 1:\n-\t\t\tiid_lsb = (addr40) ? 39 : 31;\n-\t\t\t*addr &= ~_nic_mask64(iid_lsb, iid_lsb, 0);\n-\t\t\treturn 0;\n-\t\tcase 2:\n-\t\t\tiid_lsb = (addr40) ? 38 : 30;\n-\t\t\t*addr &= ~_nic_mask64(iid_lsb + 1, iid_lsb, 0);\n-\t\t\treturn 0;\n-\t\tcase 3:\n-\t\t\tiid_lsb = (addr40) ? 37 : 29;\n-\t\t\t*addr &= ~_nic_mask64(iid_lsb + 2, iid_lsb, 0);\n-\t\t\treturn 0;\n-\t\tdefault:\n-\t\t\tbreak;\n-\t\t}\n-\tcase NFP6000_CPPTGT_MU:\n-\t\tlocality_lsb = _nfp6000_cppat_mu_locality_lsb(mode, addr40);\n-\t\tda = (((*addr >> locality_lsb) & 3) ==\n-\t\t _NIC_NFP6000_MU_LOCALITY_DIRECT);\n-\t\tswitch (mode) {\n-\t\tcase 0:\n-\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t*addr &= ~(UINT64_C(0x3F) << iid_lsb);\n-\t\t\treturn 0;\n-\t\tcase 1:\n-\t\t\tif (da) {\n-\t\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t\t*addr &= ~(UINT64_C(0x3F) << iid_lsb);\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\t\t\tiid_lsb = (addr40) ? 37 : 29;\n-\t\t\t*addr &= ~_nic_mask64(iid_lsb, iid_lsb, 0);\n-\t\t\treturn 0;\n-\t\tcase 2:\n-\t\t\tif (da) {\n-\t\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t\t*addr &= ~(UINT64_C(0x3F) << iid_lsb);\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\n-\t\t\tiid_lsb = (addr40) ? 36 : 28;\n-\t\t\t*addr &= ~_nic_mask64(iid_lsb + 1, iid_lsb, 0);\n-\t\t\treturn 0;\n-\t\tcase 3:\n-\t\t\tif (da) {\n-\t\t\t\tiid_lsb = (addr40) ? 32 : 24;\n-\t\t\t\t*addr &= ~(UINT64_C(0x3F) << iid_lsb);\n-\t\t\t\treturn 0;\n-\t\t\t}\n-\n-\t\t\tiid_lsb = (addr40) ? 35 : 27;\n-\t\t\t*addr &= ~_nic_mask64(iid_lsb + 2, iid_lsb, 0);\n-\t\t\treturn 0;\n-\t\tdefault:\n-\t\t\tbreak;\n-\t\t}\n-\tcase NFP6000_CPPTGT_CTXPB:\n-\t\tif (mode != 1 || addr40 != 0)\n-\t\t\treturn 0;\n-\t\t*addr &= ~(UINT64_C(0x3F) << 24);\n-\t\treturn 0;\n-\tdefault:\n-\t\tbreak;\n-\t}\n-\n-\treturn NFP_ERRNO(EINVAL);\n-}\n-\n-#endif /* __NFP_CPPAT_H__ */\ndiff --git a/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h b/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h\nindex 47e1ddaeed..7750a0218e 100644\n--- a/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h\n+++ b/drivers/net/nfp/nfpcore/nfp6000/nfp6000.h\n@@ -26,6 +26,21 @@\n #define NFP_MU_ADDR_ACCESS_TYPE_MASK 3ULL\n #define NFP_MU_ADDR_ACCESS_TYPE_DIRECT 2ULL\n \n+#define PUSHPULL(pull, push) (((pull) << 4) | ((push) << 0))\n+#define PUSH_WIDTH(push_pull) pushpull_width((push_pull) >> 0)\n+#define PULL_WIDTH(push_pull) pushpull_width((push_pull) >> 4)\n+\n+static inline int\n+pushpull_width(int pp)\n+{\n+\tpp &= 0xf;\n+\tif (pp == 0)\n+\t\treturn -EINVAL;\n+\n+\treturn 2 << pp;\n+}\n+\n+\n static inline int\n nfp_cppat_mu_locality_lsb(int mode, int addr40)\n {\n@@ -37,4 +52,9 @@ nfp_cppat_mu_locality_lsb(int mode, int addr40)\n \t}\n }\n \n+int nfp_target_pushpull(uint32_t cpp_id, uint64_t address);\n+int nfp_target_cpp(uint32_t cpp_island_id, uint64_t cpp_island_address,\n+\t\tuint32_t *cpp_target_id, uint64_t *cpp_target_address,\n+\t\tconst uint32_t *imb_table);\n+\n #endif /* NFP_NFP6000_H */\ndiff --git a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c\nindex 6029bd6c3a..edf4088747 100644\n--- a/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c\n+++ b/drivers/net/nfp/nfpcore/nfp_cpp_pcie_ops.c\n@@ -34,7 +34,6 @@\n \n #include \"nfp_cpp.h\"\n #include \"nfp_logs.h\"\n-#include \"nfp_target.h\"\n #include \"nfp6000/nfp6000.h\"\n #include \"../nfp_logs.h\"\n \n@@ -406,7 +405,7 @@ nfp6000_area_init(struct nfp_cpp_area *area, uint32_t dest,\n \tuint32_t token = NFP_CPP_ID_TOKEN_of(dest);\n \tint pp, ret = 0;\n \n-\tpp = nfp6000_target_pushpull(NFP_CPP_ID(target, action, token),\n+\tpp = nfp_target_pushpull(NFP_CPP_ID(target, action, token),\n \t\t\t\t address);\n \tif (pp < 0)\n \t\treturn pp;\ndiff --git a/drivers/net/nfp/nfpcore/nfp_cppcore.c b/drivers/net/nfp/nfpcore/nfp_cppcore.c\nindex 72f50ace38..1d2468ad7a 100644\n--- a/drivers/net/nfp/nfpcore/nfp_cppcore.c\n+++ b/drivers/net/nfp/nfpcore/nfp_cppcore.c\n@@ -16,7 +16,6 @@\n \n #include \"nfp_cpp.h\"\n #include \"nfp_logs.h\"\n-#include \"nfp_target.h\"\n #include \"nfp6000/nfp6000.h\"\n #include \"nfp6000/nfp_xpb.h\"\n #include \"nfp_nffw.h\"\ndiff --git a/drivers/net/nfp/nfpcore/nfp_target.c b/drivers/net/nfp/nfpcore/nfp_target.c\nnew file mode 100644\nindex 0000000000..3f7ddfb5e9\n--- /dev/null\n+++ b/drivers/net/nfp/nfpcore/nfp_target.c\n@@ -0,0 +1,994 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright (c) 2022 Corigine, Inc.\n+ * All rights reserved.\n+ */\n+\n+#include \"nfp_cpp.h\"\n+#include \"nfp6000/nfp6000.h\"\n+\n+#define P32 1\n+#define P64 2\n+\n+/*\n+ * All magic NFP-6xxx IMB 'mode' numbers here are from:\n+ * Databook (1 August 2013)\n+ * - System Overview and Connectivity\n+ * -- Internal Connectivity\n+ * --- Distributed Switch Fabric - Command Push/Pull (DSF-CPP) Bus\n+ * ---- CPP addressing\n+ * ----- Table 3.6. CPP Address Translation Mode Commands\n+ */\n+#define NFP6000_MU_LOCALITY_DIRECT 2\n+\n+static int\n+target_rw(uint32_t cpp_id,\n+\t\tint pp,\n+\t\tint start,\n+\t\tint len)\n+{\n+\tuint8_t island;\n+\n+\tisland = NFP_CPP_ID_ISLAND_of(cpp_id);\n+\tif (island != 0 && (island < start || island > (start + len)))\n+\t\treturn -EINVAL;\n+\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 0, 0):\n+\t\treturn PUSHPULL(0, pp);\n+\tcase NFP_CPP_ID(0, 1, 0):\n+\t\treturn PUSHPULL(pp, 0);\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):\n+\t\treturn PUSHPULL(pp, pp);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int\n+nfp6000_nbi_dma(uint32_t cpp_id)\n+{\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 0, 0): /* Read NBI DMA */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 1, 0): /* Write NBI DMA */\n+\t\treturn PUSHPULL(P64, 0);\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):\n+\t\treturn PUSHPULL(P64, P64);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int\n+nfp6000_nbi_stats(uint32_t cpp_id)\n+{\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 0, 0): /* Read NBI Stats */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 1, 0): /* Write NBI Stats */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):\n+\t\treturn PUSHPULL(P32, P32);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int\n+nfp6000_nbi_tm(uint32_t cpp_id)\n+{\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 0, 0): /* Read NBI TM */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 1, 0): /* Write NBI TM */\n+\t\treturn PUSHPULL(P64, 0);\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):\n+\t\treturn PUSHPULL(P64, P64);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int\n+nfp6000_nbi_ppc(uint32_t cpp_id)\n+{\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 0, 0): /* Read NBI Preclassifier */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 1, 0): /* Write NBI Preclassifier */\n+\t\treturn PUSHPULL(P64, 0);\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0):\n+\t\treturn PUSHPULL(P64, P64);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int\n+nfp6000_nbi(uint32_t cpp_id,\n+\t\tuint64_t address)\n+{\n+\tuint8_t island;\n+\tuint64_t rel_addr;\n+\n+\tisland = NFP_CPP_ID_ISLAND_of(cpp_id);\n+\tif (island != 8 && island != 9)\n+\t\treturn -EINVAL;\n+\n+\trel_addr = address & 0x3FFFFF;\n+\tif (rel_addr < (1 << 20)) /* [0x000000, 0x100000) */\n+\t\treturn nfp6000_nbi_dma(cpp_id);\n+\telse if (rel_addr < (2 << 20)) /* [0x100000, 0x200000) */\n+\t\treturn nfp6000_nbi_stats(cpp_id);\n+\telse if (rel_addr < (3 << 20)) /* [0x200000, 0x300000) */\n+\t\treturn nfp6000_nbi_tm(cpp_id);\n+\telse /* [0x300000, 0x400000) */\n+\t\treturn nfp6000_nbi_ppc(cpp_id);\n+}\n+\n+/*\n+ * This structure ONLY includes items that can be done with a read or write of\n+ * 32-bit or 64-bit words. All others are not listed.\n+ */\n+static int\n+nfp6000_mu_common(uint32_t cpp_id)\n+{\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 0): /* read_be/write_be */\n+\t\treturn PUSHPULL(P64, P64);\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 1): /* read_le/write_le */\n+\t\treturn PUSHPULL(P64, P64);\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 2): /* read_swap_be/write_swap_be */\n+\t\treturn PUSHPULL(P64, P64);\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 3): /* read_swap_le/write_swap_le */\n+\t\treturn PUSHPULL(P64, P64);\n+\tcase NFP_CPP_ID(0, 0, 0): /* read_be */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 0, 1): /* read_le */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 0, 2): /* read_swap_be */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 0, 3): /* read_swap_le */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 1, 0): /* write_be */\n+\t\treturn PUSHPULL(P64, 0);\n+\tcase NFP_CPP_ID(0, 1, 1): /* write_le */\n+\t\treturn PUSHPULL(P64, 0);\n+\tcase NFP_CPP_ID(0, 1, 2): /* write_swap_be */\n+\t\treturn PUSHPULL(P64, 0);\n+\tcase NFP_CPP_ID(0, 1, 3): /* write_swap_le */\n+\t\treturn PUSHPULL(P64, 0);\n+\tcase NFP_CPP_ID(0, 3, 0): /* atomic_read */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 3, 2): /* mask_compare_write */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 4, 0): /* atomic_write */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 4, 2): /* atomic_write_imm */\n+\t\treturn PUSHPULL(0, 0);\n+\tcase NFP_CPP_ID(0, 4, 3): /* swap_imm */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 5, 0): /* set */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 5, 3): /* test_set_imm */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 6, 0): /* clr */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 6, 3): /* test_clr_imm */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 7, 0): /* add */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 7, 3): /* test_add_imm */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 8, 0): /* addsat */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 8, 3): /* test_subsat_imm */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 9, 0): /* sub */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 9, 3): /* test_sub_imm */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 10, 0): /* subsat */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 10, 3): /* test_subsat_imm */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 13, 0): /* microq128_get */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 13, 1): /* microq128_pop */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 13, 2): /* microq128_put */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 15, 0): /* xor */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 15, 3): /* test_xor_imm */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 28, 0): /* read32_be */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 28, 1): /* read32_le */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 28, 2): /* read32_swap_be */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 28, 3): /* read32_swap_le */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 31, 0): /* write32_be */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 31, 1): /* write32_le */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 31, 2): /* write32_swap_be */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 31, 3): /* write32_swap_le */\n+\t\treturn PUSHPULL(P32, 0);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int\n+nfp6000_mu_ctm(uint32_t cpp_id)\n+{\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 16, 1): /* packet_read_packet_status */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 17, 1): /* packet_credit_get */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 17, 3): /* packet_add_thread */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 18, 2): /* packet_free_and_return_pointer */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 18, 3): /* packet_return_pointer */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 21, 0): /* pe_dma_to_memory_indirect */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 21, 1): /* pe_dma_to_memory_indirect_swap */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 21, 2): /* pe_dma_to_memory_indirect_free */\n+\t\treturn PUSHPULL(0, P64);\n+\tcase NFP_CPP_ID(0, 21, 3): /* pe_dma_to_memory_indirect_free_swap */\n+\t\treturn PUSHPULL(0, P64);\n+\tdefault:\n+\t\treturn nfp6000_mu_common(cpp_id);\n+\t}\n+}\n+\n+static int\n+nfp6000_mu_emu(uint32_t cpp_id)\n+{\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 18, 0): /* read_queue */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 18, 1): /* read_queue_ring */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 18, 2): /* write_queue */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 18, 3): /* write_queue_ring */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 20, 2): /* journal */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 21, 0): /* get */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 21, 1): /* get_eop */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 21, 2): /* get_freely */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 22, 0): /* pop */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 22, 1): /* pop_eop */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 22, 2): /* pop_freely */\n+\t\treturn PUSHPULL(0, P32);\n+\tdefault:\n+\t\treturn nfp6000_mu_common(cpp_id);\n+\t}\n+}\n+\n+static int\n+nfp6000_mu_imu(uint32_t cpp_id)\n+{\n+\treturn nfp6000_mu_common(cpp_id);\n+}\n+\n+static int\n+nfp6000_mu(uint32_t cpp_id,\n+\t\tuint64_t address)\n+{\n+\tint pp;\n+\tuint8_t island;\n+\n+\tisland = NFP_CPP_ID_ISLAND_of(cpp_id);\n+\tif (island == 0) {\n+\t\tif (address < 0x2000000000ULL)\n+\t\t\tpp = nfp6000_mu_ctm(cpp_id);\n+\t\telse if (address < 0x8000000000ULL)\n+\t\t\tpp = nfp6000_mu_emu(cpp_id);\n+\t\telse if (address < 0x9800000000ULL)\n+\t\t\tpp = nfp6000_mu_ctm(cpp_id);\n+\t\telse if (address < 0x9C00000000ULL)\n+\t\t\tpp = nfp6000_mu_emu(cpp_id);\n+\t\telse if (address < 0xA000000000ULL)\n+\t\t\tpp = nfp6000_mu_imu(cpp_id);\n+\t\telse\n+\t\t\tpp = nfp6000_mu_ctm(cpp_id);\n+\t} else if (island >= 24 && island <= 27) {\n+\t\tpp = nfp6000_mu_emu(cpp_id);\n+\t} else if (island >= 28 && island <= 31) {\n+\t\tpp = nfp6000_mu_imu(cpp_id);\n+\t} else if (island == 1 ||\n+\t\t\t(island >= 4 && island <= 7) ||\n+\t\t\t(island >= 12 && island <= 13) ||\n+\t\t\t(island >= 32 && island <= 47) ||\n+\t\t\t(island >= 48 && island <= 51)) {\n+\t\tpp = nfp6000_mu_ctm(cpp_id);\n+\t} else {\n+\t\tpp = -EINVAL;\n+\t}\n+\n+\treturn pp;\n+}\n+\n+static int\n+nfp6000_ila(uint32_t cpp_id)\n+{\n+\tuint8_t island;\n+\n+\tisland = NFP_CPP_ID_ISLAND_of(cpp_id);\n+\tif (island != 0 && (island < 48 || island > 51))\n+\t\treturn -EINVAL;\n+\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 0, 1): /* read_check_error */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 2, 0): /* read_int */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 3, 0): /* write_int */\n+\t\treturn PUSHPULL(P32, 0);\n+\tdefault:\n+\t\treturn target_rw(cpp_id, P32, 48, 4);\n+\t}\n+}\n+\n+static int\n+nfp6000_pci(uint32_t cpp_id)\n+{\n+\tuint8_t island;\n+\n+\tisland = NFP_CPP_ID_ISLAND_of(cpp_id);\n+\tif (island != 0 && (island < 4 || island > 7))\n+\t\treturn -EINVAL;\n+\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 2, 0):\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 3, 0):\n+\t\treturn PUSHPULL(P32, 0);\n+\tdefault:\n+\t\treturn target_rw(cpp_id, P32, 4, 4);\n+\t}\n+}\n+\n+static int\n+nfp6000_crypto(uint32_t cpp_id)\n+{\n+\tuint8_t island;\n+\n+\tisland = NFP_CPP_ID_ISLAND_of(cpp_id);\n+\tif (island != 0 && (island < 12 || island > 15))\n+\t\treturn -EINVAL;\n+\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 2, 0):\n+\t\treturn PUSHPULL(P64, 0);\n+\tdefault:\n+\t\treturn target_rw(cpp_id, P64, 12, 4);\n+\t}\n+}\n+\n+static int\n+nfp6000_cap_xpb(uint32_t cpp_id)\n+{\n+\tuint8_t island;\n+\n+\tisland = NFP_CPP_ID_ISLAND_of(cpp_id);\n+\tif (island > 63)\n+\t\treturn -EINVAL;\n+\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 0, 1): /* RingGet */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 0, 2): /* Interthread Signal */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 1, 1): /* RingPut */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 1, 2): /* CTNNWr */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 2, 0): /* ReflectRd, signal none */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 2, 1): /* ReflectRd, signal self */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 2, 2): /* ReflectRd, signal remote */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 2, 3): /* ReflectRd, signal both */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 3, 0): /* ReflectWr, signal none */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 3, 1): /* ReflectWr, signal self */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 3, 2): /* ReflectWr, signal remote */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 3, 3): /* ReflectWr, signal both */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, NFP_CPP_ACTION_RW, 1):\n+\t\treturn PUSHPULL(P32, P32);\n+\tdefault:\n+\t\treturn target_rw(cpp_id, P32, 1, 63);\n+\t}\n+}\n+\n+static int\n+nfp6000_cls(uint32_t cpp_id)\n+{\n+\tuint8_t island;\n+\n+\tisland = NFP_CPP_ID_ISLAND_of(cpp_id);\n+\tif (island > 63)\n+\t\treturn -EINVAL;\n+\n+\tswitch (cpp_id & NFP_CPP_ID(0, ~0, ~0)) {\n+\tcase NFP_CPP_ID(0, 0, 3): /* xor */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 2, 0): /* set */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 2, 1): /* clr */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 4, 0): /* add */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 4, 1): /* add64 */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 6, 0): /* sub */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 6, 1): /* sub64 */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 6, 2): /* subsat */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 8, 2): /* hash_mask */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 8, 3): /* hash_clear */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 9, 0): /* ring_get */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 9, 1): /* ring_pop */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 9, 2): /* ring_get_freely */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 9, 3): /* ring_pop_freely */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 10, 0): /* ring_put */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 10, 2): /* ring_journal */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 14, 0): /* reflect_write_sig_local */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 15, 1): /* reflect_read_sig_local */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 17, 2): /* statistic */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 24, 0): /* ring_read */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 24, 1): /* ring_write */\n+\t\treturn PUSHPULL(P32, 0);\n+\tcase NFP_CPP_ID(0, 25, 0): /* ring_workq_add_thread */\n+\t\treturn PUSHPULL(0, P32);\n+\tcase NFP_CPP_ID(0, 25, 1): /* ring_workq_add_work */\n+\t\treturn PUSHPULL(P32, 0);\n+\tdefault:\n+\t\treturn target_rw(cpp_id, P32, 0, 64);\n+\t}\n+}\n+\n+int\n+nfp_target_pushpull(uint32_t cpp_id,\n+\t\tuint64_t address)\n+{\n+\tswitch (NFP_CPP_ID_TARGET_of(cpp_id)) {\n+\tcase NFP6000_CPPTGT_NBI:\n+\t\treturn nfp6000_nbi(cpp_id, address);\n+\tcase NFP6000_CPPTGT_VQDR:\n+\t\treturn target_rw(cpp_id, P32, 24, 4);\n+\tcase NFP6000_CPPTGT_ILA:\n+\t\treturn nfp6000_ila(cpp_id);\n+\tcase NFP6000_CPPTGT_MU:\n+\t\treturn nfp6000_mu(cpp_id, address);\n+\tcase NFP6000_CPPTGT_PCIE:\n+\t\treturn nfp6000_pci(cpp_id);\n+\tcase NFP6000_CPPTGT_ARM:\n+\t\tif (address < 0x10000)\n+\t\t\treturn target_rw(cpp_id, P64, 1, 1);\n+\t\telse\n+\t\t\treturn target_rw(cpp_id, P32, 1, 1);\n+\tcase NFP6000_CPPTGT_CRYPTO:\n+\t\treturn nfp6000_crypto(cpp_id);\n+\tcase NFP6000_CPPTGT_CTXPB:\n+\t\treturn nfp6000_cap_xpb(cpp_id);\n+\tcase NFP6000_CPPTGT_CLS:\n+\t\treturn nfp6000_cls(cpp_id);\n+\tcase 0:\n+\t\treturn target_rw(cpp_id, P32, 4, 4);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static uint64_t\n+nfp_mask64(int msb,\n+\t\tint lsb)\n+{\n+\tint width;\n+\n+\tif (msb < 0 || lsb < 0)\n+\t\treturn 0;\n+\n+\twidth = msb - lsb + 1;\n+\tif (width < 0)\n+\t\treturn 0;\n+\n+\tif (width == 64)\n+\t\treturn ~(uint64_t)0;\n+\n+\tif ((lsb + width) > 64)\n+\t\treturn 0;\n+\n+\treturn (RTE_BIT64(width) - 1) << lsb;\n+}\n+\n+static int\n+nfp_decode_basic(uint64_t addr,\n+\t\tint *dest_island,\n+\t\tint cpp_tgt,\n+\t\tint mode,\n+\t\tint addr40,\n+\t\tint isld1,\n+\t\tint isld0)\n+{\n+\tint iid_lsb;\n+\tint idx_lsb;\n+\n+\t/* This function doesn't handle MU or CTXBP */\n+\tif (cpp_tgt == NFP_CPP_TARGET_MU || cpp_tgt == NFP_CPP_TARGET_CT_XPB)\n+\t\treturn -EINVAL;\n+\n+\tswitch (mode) {\n+\tcase 0:\n+\t\t/*\n+\t\t * For VQDR, in this mode for 32-bit addressing it would be\n+\t\t * islands 0, 16, 32 and 48 depending on channel and upper\n+\t\t * address bits. Since those are not all valid islands, most\n+\t\t * decode cases would result in bad island IDs, but we do them\n+\t\t * anyway since this is decoding an address that is already\n+\t\t * assumed to be used as-is to get to sram.\n+\t\t */\n+\t\tiid_lsb = (addr40) ? 34 : 26;\n+\t\t*dest_island = (int)(addr >> iid_lsb) & 0x3F;\n+\n+\t\treturn 0;\n+\tcase 1:\n+\t\t/*\n+\t\t * For VQDR 32-bit, this would decode as:\n+\t\t *\tChannel 0: island#0\n+\t\t *\tChannel 1: island#0\n+\t\t *\tChannel 2: island#1\n+\t\t *\tChannel 3: island#1\n+\t\t *\n+\t\t * That would be valid as long as both islands have VQDR.\n+\t\t * Let's allow this.\n+\t\t */\n+\t\tidx_lsb = (addr40) ? 39 : 31;\n+\t\tif ((addr & nfp_mask64(idx_lsb, idx_lsb)) != 0)\n+\t\t\t*dest_island = isld1;\n+\t\telse\n+\t\t\t*dest_island = isld0;\n+\n+\t\treturn 0;\n+\tcase 2:\n+\t\t/*\n+\t\t * For VQDR 32-bit:\n+\t\t *\tChannel 0: (island#0 | 0)\n+\t\t *\tChannel 1: (island#0 | 1)\n+\t\t *\tChannel 2: (island#1 | 0)\n+\t\t *\tChannel 3: (island#1 | 1)\n+\t\t *\n+\t\t * Make sure we compare against isldN values by clearing the\n+\t\t * LSB. This is what the silicon does.\n+\t\t */\n+\t\tisld0 &= ~1;\n+\t\tisld1 &= ~1;\n+\n+\t\tidx_lsb = (addr40) ? 39 : 31;\n+\t\tiid_lsb = idx_lsb - 1;\n+\n+\t\tif ((addr & nfp_mask64(idx_lsb, idx_lsb)) != 0)\n+\t\t\t*dest_island = isld1 | (int)((addr >> iid_lsb) & 1);\n+\t\telse\n+\t\t\t*dest_island = isld0 | (int)((addr >> iid_lsb) & 1);\n+\n+\t\treturn 0;\n+\tcase 3:\n+\t\t/*\n+\t\t * In this mode the data address starts to affect the island ID\n+\t\t * so rather not allow it. In some really specific case one\n+\t\t * could use this to send the upper half of the VQDR channel to\n+\t\t * another MU, but this is getting very specific. However, as\n+\t\t * above for mode 0, this is the decoder and the caller should\n+\t\t * validate the resulting IID. This blindly does what the\n+\t\t * silicon would do.\n+\t\t */\n+\t\tisld0 &= ~3;\n+\t\tisld1 &= ~3;\n+\n+\t\tidx_lsb = (addr40) ? 39 : 31;\n+\t\tiid_lsb = idx_lsb - 2;\n+\n+\t\tif ((addr & nfp_mask64(idx_lsb, idx_lsb)) != 0)\n+\t\t\t*dest_island = isld1 | (int)((addr >> iid_lsb) & 3);\n+\t\telse\n+\t\t\t*dest_island = isld0 | (int)((addr >> iid_lsb) & 3);\n+\n+\t\treturn 0;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int\n+nfp_encode_basic_qdr(uint64_t addr,\n+\t\tint dest_island,\n+\t\tint cpp_tgt,\n+\t\tint mode,\n+\t\tint addr40,\n+\t\tint isld1,\n+\t\tint isld0)\n+{\n+\tint v;\n+\tint ret;\n+\n+\t/* Full Island ID and channel bits overlap? */\n+\tret = nfp_decode_basic(addr, &v, cpp_tgt, mode, addr40, isld1, isld0);\n+\tif (ret != 0)\n+\t\treturn ret;\n+\n+\t/* The current address won't go where expected? */\n+\tif (dest_island != -1 && dest_island != v)\n+\t\treturn -EINVAL;\n+\n+\t/* If dest_island was -1, we don't care where it goes. */\n+\treturn 0;\n+}\n+\n+/*\n+ * Try each option, take first one that fits.\n+ * Not sure if we would want to do some smarter\n+ * searching and prefer 0 or non-0 island IDs.\n+ */\n+static int\n+nfp_encode_basic_search(uint64_t *addr,\n+\t\tint dest_island,\n+\t\tint *isld,\n+\t\tint iid_lsb,\n+\t\tint idx_lsb,\n+\t\tint v_max)\n+{\n+\tint i;\n+\tint v;\n+\n+\tfor (i = 0; i < 2; i++)\n+\t\tfor (v = 0; v < v_max; v++) {\n+\t\t\tif (dest_island != (isld[i] | v))\n+\t\t\t\tcontinue;\n+\n+\t\t\t*addr &= ~nfp_mask64(idx_lsb, iid_lsb);\n+\t\t\t*addr |= ((uint64_t)i << idx_lsb);\n+\t\t\t*addr |= ((uint64_t)v << iid_lsb);\n+\t\t\treturn 0;\n+\t\t}\n+\n+\treturn -ENODEV;\n+}\n+\n+/*\n+ * For VQDR, we may not modify the Channel bits, which might overlap\n+ * with the Index bit. When it does, we need to ensure that isld0 == isld1.\n+ */\n+static int\n+nfp_encode_basic(uint64_t *addr,\n+\t\tint dest_island,\n+\t\tint cpp_tgt,\n+\t\tint mode,\n+\t\tint addr40,\n+\t\tint isld1,\n+\t\tint isld0)\n+{\n+\tint iid_lsb;\n+\tint idx_lsb;\n+\tint isld[2];\n+\tuint64_t value;\n+\n+\tisld[0] = isld0;\n+\tisld[1] = isld1;\n+\n+\t/* This function doesn't handle MU or CTXBP */\n+\tif (cpp_tgt == NFP_CPP_TARGET_MU || cpp_tgt == NFP_CPP_TARGET_CT_XPB)\n+\t\treturn -EINVAL;\n+\n+\tswitch (mode) {\n+\tcase 0:\n+\t\tif (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {\n+\t\t\t/*\n+\t\t\t * In this specific mode we'd rather not modify the\n+\t\t\t * address but we can verify if the existing contents\n+\t\t\t * will point to a valid island.\n+\t\t\t */\n+\t\t\treturn nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,\n+\t\t\t\t\tmode, addr40, isld1, isld0);\n+\t\t}\n+\n+\t\tiid_lsb = (addr40) ? 34 : 26;\n+\n+\t\t/* <39:34> or <31:26> */\n+\t\tvalue = nfp_mask64((iid_lsb + 5), iid_lsb);\n+\t\t*addr &= ~value;\n+\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & value;\n+\t\treturn 0;\n+\tcase 1:\n+\t\tif (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {\n+\t\t\treturn nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,\n+\t\t\t\t\tmode, addr40, isld1, isld0);\n+\t\t}\n+\n+\t\tidx_lsb = (addr40) ? 39 : 31;\n+\t\tif (dest_island == isld0) {\n+\t\t\t/* Only need to clear the Index bit */\n+\t\t\t*addr &= ~nfp_mask64(idx_lsb, idx_lsb);\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\tif (dest_island == isld1) {\n+\t\t\t/* Only need to set the Index bit */\n+\t\t\t*addr |= (UINT64_C(1) << idx_lsb);\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\treturn -ENODEV;\n+\tcase 2:\n+\t\tif (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {\n+\t\t\t/* iid<0> = addr<30> = channel<0> */\n+\t\t\t/* channel<1> = addr<31> = Index */\n+\t\t\treturn nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,\n+\t\t\t\t\tmode, addr40, isld1, isld0);\n+\t\t}\n+\n+\t\t/*\n+\t\t * Make sure we compare against isldN values by clearing the\n+\t\t * LSB. This is what the silicon does.\n+\t\t **/\n+\t\tisld[0] &= ~1;\n+\t\tisld[1] &= ~1;\n+\n+\t\tidx_lsb = (addr40) ? 39 : 31;\n+\t\tiid_lsb = idx_lsb - 1;\n+\n+\t\treturn nfp_encode_basic_search(addr, dest_island, isld,\n+\t\t\t\tiid_lsb, idx_lsb, 2);\n+\tcase 3:\n+\t\tif (cpp_tgt == NFP6000_CPPTGT_VQDR && addr40 == 0) {\n+\t\t\t/*\n+\t\t\t * iid<0> = addr<29> = data\n+\t\t\t * iid<1> = addr<30> = channel<0>\n+\t\t\t * channel<1> = addr<31> = Index\n+\t\t\t */\n+\t\t\treturn nfp_encode_basic_qdr(*addr, cpp_tgt, dest_island,\n+\t\t\t\t\tmode, addr40, isld1, isld0);\n+\t\t}\n+\n+\t\tisld[0] &= ~3;\n+\t\tisld[1] &= ~3;\n+\n+\t\tidx_lsb = (addr40) ? 39 : 31;\n+\t\tiid_lsb = idx_lsb - 2;\n+\n+\t\treturn nfp_encode_basic_search(addr, dest_island, isld,\n+\t\t\t\tiid_lsb, idx_lsb, 4);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int\n+nfp_encode_mu(uint64_t *addr,\n+\t\tint dest_island,\n+\t\tint mode,\n+\t\tint addr40,\n+\t\tint isld1,\n+\t\tint isld0)\n+{\n+\tint da;\n+\tint iid_lsb;\n+\tint idx_lsb;\n+\tint isld[2];\n+\tuint64_t value;\n+\tint locality_lsb;\n+\n+\tisld[0] = isld0;\n+\tisld[1] = isld1;\n+\n+\tlocality_lsb = nfp_cppat_mu_locality_lsb(mode, addr40);\n+\tif (locality_lsb < 0)\n+\t\treturn -EINVAL;\n+\n+\tif (((*addr >> locality_lsb) & 3) == NFP6000_MU_LOCALITY_DIRECT)\n+\t\tda = 1;\n+\telse\n+\t\tda = 0;\n+\n+\tswitch (mode) {\n+\tcase 0:\n+\t\tiid_lsb = (addr40 != 0) ? 32 : 24;\n+\t\tvalue = nfp_mask64((iid_lsb + 5), iid_lsb);\n+\t\t*addr &= ~value;\n+\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & value;\n+\t\treturn 0;\n+\tcase 1:\n+\t\tif (da == 1) {\n+\t\t\tiid_lsb = (addr40 != 0) ? 32 : 24;\n+\t\t\tvalue = nfp_mask64((iid_lsb + 5), iid_lsb);\n+\t\t\t*addr &= ~value;\n+\t\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & value;\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\tidx_lsb = (addr40 != 0) ? 37 : 29;\n+\t\tif (dest_island == isld0) {\n+\t\t\t*addr &= ~nfp_mask64(idx_lsb, idx_lsb);\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\tif (dest_island == isld1) {\n+\t\t\t*addr |= (UINT64_C(1) << idx_lsb);\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\treturn -ENODEV;\n+\tcase 2:\n+\t\tif (da == 1) {\n+\t\t\tiid_lsb = (addr40 != 0) ? 32 : 24;\n+\t\t\tvalue = nfp_mask64((iid_lsb + 5), iid_lsb);\n+\t\t\t*addr &= ~value;\n+\t\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & value;\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\t/*\n+\t\t * Make sure we compare against isldN values by clearing the\n+\t\t * LSB. This is what the silicon does.\n+\t\t */\n+\t\tisld[0] &= ~1;\n+\t\tisld[1] &= ~1;\n+\n+\t\tidx_lsb = (addr40 != 0) ? 37 : 29;\n+\t\tiid_lsb = idx_lsb - 1;\n+\n+\t\treturn nfp_encode_basic_search(addr, dest_island, isld,\n+\t\t\t\tiid_lsb, idx_lsb, 2);\n+\tcase 3:\n+\t\t/*\n+\t\t * Only the EMU will use 40 bit addressing. Silently set the\n+\t\t * direct locality bit for everyone else. The SDK toolchain\n+\t\t * uses dest_island <= 0 to test for atypical address encodings\n+\t\t * to support access to local-island CTM with a 32-but address\n+\t\t * (high-locality is effectively ignored and just used for\n+\t\t * routing to island #0).\n+\t\t */\n+\t\tif (dest_island > 0 && (dest_island < 24 || dest_island > 26)) {\n+\t\t\t*addr |= ((uint64_t)NFP6000_MU_LOCALITY_DIRECT)\n+\t\t\t\t\t<< locality_lsb;\n+\t\t\tda = 1;\n+\t\t}\n+\n+\t\tif (da == 1) {\n+\t\t\tiid_lsb = (addr40 != 0) ? 32 : 24;\n+\t\t\tvalue = nfp_mask64((iid_lsb + 5), iid_lsb);\n+\t\t\t*addr &= ~value;\n+\t\t\t*addr |= (((uint64_t)dest_island) << iid_lsb) & value;\n+\t\t\treturn 0;\n+\t\t}\n+\n+\t\tisld[0] &= ~3;\n+\t\tisld[1] &= ~3;\n+\n+\t\tidx_lsb = (addr40 != 0) ? 37 : 29;\n+\t\tiid_lsb = idx_lsb - 2;\n+\n+\t\treturn nfp_encode_basic_search(addr, dest_island, isld,\n+\t\t\t\tiid_lsb, idx_lsb, 4);\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+static int\n+nfp_cppat_addr_encode(uint64_t *addr,\n+\t\tint dest_island,\n+\t\tint cpp_tgt,\n+\t\tint mode,\n+\t\tint addr40,\n+\t\tint isld1,\n+\t\tint isld0)\n+{\n+\tuint64_t value;\n+\n+\tswitch (cpp_tgt) {\n+\tcase NFP6000_CPPTGT_NBI:\n+\tcase NFP6000_CPPTGT_VQDR:\n+\tcase NFP6000_CPPTGT_ILA:\n+\tcase NFP6000_CPPTGT_PCIE:\n+\tcase NFP6000_CPPTGT_ARM:\n+\tcase NFP6000_CPPTGT_CRYPTO:\n+\tcase NFP6000_CPPTGT_CLS:\n+\t\treturn nfp_encode_basic(addr, dest_island, cpp_tgt, mode,\n+\t\t\t\taddr40, isld1, isld0);\n+\tcase NFP6000_CPPTGT_MU:\n+\t\treturn nfp_encode_mu(addr, dest_island, mode, addr40,\n+\t\t\t\tisld1, isld0);\n+\tcase NFP6000_CPPTGT_CTXPB:\n+\t\tif (mode != 1 || addr40 != 0)\n+\t\t\treturn -EINVAL;\n+\n+\t\tvalue = nfp_mask64(29, 24);\n+\t\t*addr &= ~value;\n+\t\t*addr |= (((uint64_t)dest_island) << 24) & value;\n+\t\treturn 0;\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+}\n+\n+int\n+nfp_target_cpp(uint32_t cpp_island_id,\n+\t\tuint64_t cpp_island_address,\n+\t\tuint32_t *cpp_target_id,\n+\t\tuint64_t *cpp_target_address,\n+\t\tconst uint32_t *imb_table)\n+{\n+\tint err;\n+\tuint32_t imb;\n+\tuint8_t island;\n+\tuint8_t target;\n+\n+\ttarget = NFP_CPP_ID_TARGET_of(cpp_island_id);\n+\tif (target >= 16)\n+\t\treturn -EINVAL;\n+\n+\tisland = NFP_CPP_ID_ISLAND_of(cpp_island_id);\n+\tif (island == 0) {\n+\t\t/* Already translated */\n+\t\t*cpp_target_id = cpp_island_id;\n+\t\t*cpp_target_address = cpp_island_address;\n+\t\treturn 0;\n+\t}\n+\n+\t/* CPP + Island only allowed on systems with IMB tables */\n+\tif (imb_table == NULL)\n+\t\treturn -EINVAL;\n+\n+\timb = imb_table[target];\n+\n+\t*cpp_target_address = cpp_island_address;\n+\terr = nfp_cppat_addr_encode(cpp_target_address, island, target,\n+\t\t\t((imb >> 13) & 7), ((imb >> 12) & 1),\n+\t\t\t((imb >> 6) & 0x3f), ((imb >> 0) & 0x3f));\n+\tif (err != 0)\n+\t\treturn err;\n+\n+\t*cpp_target_id = NFP_CPP_ID(target,\n+\t\t\tNFP_CPP_ID_ACTION_of(cpp_island_id),\n+\t\t\tNFP_CPP_ID_TOKEN_of(cpp_island_id));\n+\n+\treturn 0;\n+}\ndiff --git a/drivers/net/nfp/nfpcore/nfp_target.h b/drivers/net/nfp/nfpcore/nfp_target.h\nindex d1e5a50b14..24417fb315 100644\n--- a/drivers/net/nfp/nfpcore/nfp_target.h\n+++ b/drivers/net/nfp/nfpcore/nfp_target.h\n@@ -7,7 +7,6 @@\n #define NFP_TARGET_H\n \n #include \"nfp-common/nfp_resid.h\"\n-#include \"nfp-common/nfp_cppat.h\"\n #include \"nfp-common/nfp_platform.h\"\n #include \"nfp_cpp.h\"\n \n", "prefixes": [ "02/13" ] }