get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/125610/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 125610,
    "url": "http://patches.dpdk.org/api/patches/125610/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230329234049.11071-19-stephen@networkplumber.org/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230329234049.11071-19-stephen@networkplumber.org>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230329234049.11071-19-stephen@networkplumber.org",
    "date": "2023-03-29T23:40:45",
    "name": "[v12,18/22] hash: move rte_hash_set_alg out header",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "2f151b9db757db0f1dbd0a7860013951170f87da",
    "submitter": {
        "id": 27,
        "url": "http://patches.dpdk.org/api/people/27/?format=api",
        "name": "Stephen Hemminger",
        "email": "stephen@networkplumber.org"
    },
    "delegate": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230329234049.11071-19-stephen@networkplumber.org/mbox/",
    "series": [
        {
            "id": 27577,
            "url": "http://patches.dpdk.org/api/series/27577/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27577",
            "date": "2023-03-29T23:40:27",
            "name": "Covert static log types in libraries to dynamic",
            "version": 12,
            "mbox": "http://patches.dpdk.org/series/27577/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/125610/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/125610/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id B8FF042868;\n\tThu, 30 Mar 2023 01:42:43 +0200 (CEST)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id A665342D82;\n\tThu, 30 Mar 2023 01:41:26 +0200 (CEST)",
            "from mail-pj1-f48.google.com (mail-pj1-f48.google.com\n [209.85.216.48]) by mails.dpdk.org (Postfix) with ESMTP id 0D4F342D4B\n for <dev@dpdk.org>; Thu, 30 Mar 2023 01:41:19 +0200 (CEST)",
            "by mail-pj1-f48.google.com with SMTP id q102so15618183pjq.3\n for <dev@dpdk.org>; Wed, 29 Mar 2023 16:41:18 -0700 (PDT)",
            "from hermes.local (204-195-120-218.wavecable.com. [204.195.120.218])\n by smtp.gmail.com with ESMTPSA id\n f10-20020a17090274ca00b0019c2b1c4db1sm23360095plt.239.2023.03.29.16.41.16\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Wed, 29 Mar 2023 16:41:17 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=networkplumber-org.20210112.gappssmtp.com; s=20210112; t=1680133278;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=ajNSW0dhTFKFeRoVwFrppElVBjIDjifWwTugDwJNyR8=;\n b=6QEvGPsmdjjCzjECTQREysoUPrMHugACOH4CkgsIjKGt4U17s600VynGbNEOY71ERA\n BsZa2Hp+wfmzybBgIUCZxp+/Q6jjcEyTRe74KxCswbelHDFuMD8UPkZjjSkbZJYLXpFv\n NRSKxfWEZgSyY2QKAzrBs9gxK66B4Vl1Qu8XCUyKDVECIxAvMDtQexUcWXfVHkXM+tzG\n ZXiPkCYviesCFBxMYCihlFs64hSl7+t0U/VeEaNnUdSLZVK7QOqqH7swqPKv43rswWm5\n OOGOat8+S/1ao8F1CglY6no5FV9lBw2AroyZ6yL4BpOvWL5LLEaRcAZF2IdSPpq1qneV\n I+kw==",
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20210112; t=1680133278;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc\n :subject:date:message-id:reply-to;\n bh=ajNSW0dhTFKFeRoVwFrppElVBjIDjifWwTugDwJNyR8=;\n b=0yhdABZLEOB1Lm56l3ymFIoTu4KTCayHIzrAoX7WeEhxMphSTr3e/OEjasY/6uDWaa\n QV/3nqwNcuvm61K8nI4P1dwEMwYIX1m/ltjGxPwVOHeElBKLGixFW9XwqEW5mSJMLjcN\n Wtf4QsjJJkEo7Pf/SNsWvJkzv2iWAR2gsRbnM76ZgpnQaE14G+XJVdzM4m35vJQfbMCF\n Z6cHc6Yq9mFWnV6vEI7R89S2WPPUXVwE6K4K6Er/1AV9D9ydDQ4ULdEkvf2lnJjs5Xgi\n WaniMp5tdHA3/VLD72vV4oT4q2O/h0Pvsp5Q3VIrMHvlpcq806FB0EvBGKNShw2jIFZz\n wO7Q==",
        "X-Gm-Message-State": "AAQBX9fJrzFS6hAFtfnOimLj3YwI7bjVmGudRR0RfRPw98sfctKqvOKS\n QWEATVlGzN07DgjhNoLjgYF6xRCCcJYXTKVfpxWyFQ==",
        "X-Google-Smtp-Source": "\n AKy350Zz1X8kTjXCYIvgSzpYnwDjxBhWGS4cqRQ7+5Y8dTRSK5PCqE/fOwD9GCgu7ySPh1N8YJ5Wig==",
        "X-Received": "by 2002:a17:902:f985:b0:1a1:d24f:a5f6 with SMTP id\n ky5-20020a170902f98500b001a1d24fa5f6mr19412830plb.46.1680133278174;\n Wed, 29 Mar 2023 16:41:18 -0700 (PDT)",
        "From": "Stephen Hemminger <stephen@networkplumber.org>",
        "To": "dev@dpdk.org",
        "Cc": "Stephen Hemminger <stephen@networkplumber.org>,\n Ruifeng Wang <ruifeng.wang@arm.com>, Yipeng Wang <yipeng1.wang@intel.com>,\n Sameh Gobriel <sameh.gobriel@intel.com>,\n Bruce Richardson <bruce.richardson@intel.com>,\n Vladimir Medvedkin <vladimir.medvedkin@intel.com>",
        "Subject": "[PATCH v12 18/22] hash: move rte_hash_set_alg out header",
        "Date": "Wed, 29 Mar 2023 16:40:45 -0700",
        "Message-Id": "<20230329234049.11071-19-stephen@networkplumber.org>",
        "X-Mailer": "git-send-email 2.39.2",
        "In-Reply-To": "<20230329234049.11071-1-stephen@networkplumber.org>",
        "References": "<20230329234049.11071-1-stephen@networkplumber.org>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "The code for setting algorithm for hash is not at all perf sensitive,\nand doing it inline has a couple of problems. First, it means that if\nmultiple files include the header, then the initialization gets done\nmultiple times. But also, it makes it harder to fix usage of RTE_LOG().\n\nDespite what the checking script say. This is not an ABI change, the\nprevious version inlined the same code; therefore both old and new code\nwill work the same.\n\nSigned-off-by: Stephen Hemminger <stephen@networkplumber.org>\nAcked-by: Ruifeng Wang <ruifeng.wang@arm.com>\n---\n lib/hash/meson.build     |  1 +\n lib/hash/rte_crc_arm64.h |  8 ++---\n lib/hash/rte_crc_x86.h   | 10 +++---\n lib/hash/rte_hash_crc.c  | 68 ++++++++++++++++++++++++++++++++++++++++\n lib/hash/rte_hash_crc.h  | 48 ++--------------------------\n lib/hash/version.map     |  7 +++++\n 6 files changed, 88 insertions(+), 54 deletions(-)\n create mode 100644 lib/hash/rte_hash_crc.c",
    "diff": "diff --git a/lib/hash/meson.build b/lib/hash/meson.build\nindex e56ee8572564..c345c6f561fc 100644\n--- a/lib/hash/meson.build\n+++ b/lib/hash/meson.build\n@@ -19,6 +19,7 @@ indirect_headers += files(\n \n sources = files(\n     'rte_cuckoo_hash.c',\n+    'rte_hash_crc.c',\n     'rte_fbk_hash.c',\n     'rte_thash.c',\n     'rte_thash_gfni.c'\ndiff --git a/lib/hash/rte_crc_arm64.h b/lib/hash/rte_crc_arm64.h\nindex c9f52510871b..414fe065caa8 100644\n--- a/lib/hash/rte_crc_arm64.h\n+++ b/lib/hash/rte_crc_arm64.h\n@@ -53,7 +53,7 @@ crc32c_arm64_u64(uint64_t data, uint32_t init_val)\n static inline uint32_t\n rte_hash_crc_1byte(uint8_t data, uint32_t init_val)\n {\n-\tif (likely(crc32_alg & CRC32_ARM64))\n+\tif (likely(rte_hash_crc32_alg & CRC32_ARM64))\n \t\treturn crc32c_arm64_u8(data, init_val);\n \n \treturn crc32c_1byte(data, init_val);\n@@ -67,7 +67,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)\n static inline uint32_t\n rte_hash_crc_2byte(uint16_t data, uint32_t init_val)\n {\n-\tif (likely(crc32_alg & CRC32_ARM64))\n+\tif (likely(rte_hash_crc32_alg & CRC32_ARM64))\n \t\treturn crc32c_arm64_u16(data, init_val);\n \n \treturn crc32c_2bytes(data, init_val);\n@@ -81,7 +81,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)\n static inline uint32_t\n rte_hash_crc_4byte(uint32_t data, uint32_t init_val)\n {\n-\tif (likely(crc32_alg & CRC32_ARM64))\n+\tif (likely(rte_hash_crc32_alg & CRC32_ARM64))\n \t\treturn crc32c_arm64_u32(data, init_val);\n \n \treturn crc32c_1word(data, init_val);\n@@ -95,7 +95,7 @@ rte_hash_crc_4byte(uint32_t data, uint32_t init_val)\n static inline uint32_t\n rte_hash_crc_8byte(uint64_t data, uint32_t init_val)\n {\n-\tif (likely(crc32_alg & CRC32_ARM64))\n+\tif (likely(rte_hash_crc32_alg & CRC32_ARM64))\n \t\treturn crc32c_arm64_u64(data, init_val);\n \n \treturn crc32c_2words(data, init_val);\ndiff --git a/lib/hash/rte_crc_x86.h b/lib/hash/rte_crc_x86.h\nindex 205bc182be77..3b865e251db2 100644\n--- a/lib/hash/rte_crc_x86.h\n+++ b/lib/hash/rte_crc_x86.h\n@@ -67,7 +67,7 @@ crc32c_sse42_u64(uint64_t data, uint64_t init_val)\n static inline uint32_t\n rte_hash_crc_1byte(uint8_t data, uint32_t init_val)\n {\n-\tif (likely(crc32_alg & CRC32_SSE42))\n+\tif (likely(rte_hash_crc32_alg & CRC32_SSE42))\n \t\treturn crc32c_sse42_u8(data, init_val);\n \n \treturn crc32c_1byte(data, init_val);\n@@ -81,7 +81,7 @@ rte_hash_crc_1byte(uint8_t data, uint32_t init_val)\n static inline uint32_t\n rte_hash_crc_2byte(uint16_t data, uint32_t init_val)\n {\n-\tif (likely(crc32_alg & CRC32_SSE42))\n+\tif (likely(rte_hash_crc32_alg & CRC32_SSE42))\n \t\treturn crc32c_sse42_u16(data, init_val);\n \n \treturn crc32c_2bytes(data, init_val);\n@@ -95,7 +95,7 @@ rte_hash_crc_2byte(uint16_t data, uint32_t init_val)\n static inline uint32_t\n rte_hash_crc_4byte(uint32_t data, uint32_t init_val)\n {\n-\tif (likely(crc32_alg & CRC32_SSE42))\n+\tif (likely(rte_hash_crc32_alg & CRC32_SSE42))\n \t\treturn crc32c_sse42_u32(data, init_val);\n \n \treturn crc32c_1word(data, init_val);\n@@ -110,11 +110,11 @@ static inline uint32_t\n rte_hash_crc_8byte(uint64_t data, uint32_t init_val)\n {\n #ifdef RTE_ARCH_X86_64\n-\tif (likely(crc32_alg == CRC32_SSE42_x64))\n+\tif (likely(rte_hash_crc32_alg == CRC32_SSE42_x64))\n \t\treturn crc32c_sse42_u64(data, init_val);\n #endif\n \n-\tif (likely(crc32_alg & CRC32_SSE42))\n+\tif (likely(rte_hash_crc32_alg & CRC32_SSE42))\n \t\treturn crc32c_sse42_u64_mimic(data, init_val);\n \n \treturn crc32c_2words(data, init_val);\ndiff --git a/lib/hash/rte_hash_crc.c b/lib/hash/rte_hash_crc.c\nnew file mode 100644\nindex 000000000000..1439d8a71f6a\n--- /dev/null\n+++ b/lib/hash/rte_hash_crc.c\n@@ -0,0 +1,68 @@\n+/* SPDX-License-Identifier: BSD-3-Clause\n+ * Copyright(c) 2010-2014 Intel Corporation\n+ */\n+\n+#include <rte_cpuflags.h>\n+#include <rte_log.h>\n+\n+#include \"rte_hash_crc.h\"\n+\n+RTE_LOG_REGISTER_SUFFIX(hash_crc_logtype, crc, INFO);\n+#define RTE_LOGTYPE_HASH_CRC hash_crc_logtype\n+\n+uint8_t rte_hash_crc32_alg = CRC32_SW;\n+\n+/**\n+ * Allow or disallow use of SSE4.2/ARMv8 intrinsics for CRC32 hash\n+ * calculation.\n+ *\n+ * @param alg\n+ *   An OR of following flags:\n+ *   - (CRC32_SW) Don't use SSE4.2/ARMv8 intrinsics (default non-[x86/ARMv8])\n+ *   - (CRC32_SSE42) Use SSE4.2 intrinsics if available\n+ *   - (CRC32_SSE42_x64) Use 64-bit SSE4.2 intrinsic if available (default x86)\n+ *   - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8)\n+ *\n+ */\n+void\n+rte_hash_crc_set_alg(uint8_t alg)\n+{\n+\trte_hash_crc32_alg = CRC32_SW;\n+\n+\tif (alg == CRC32_SW)\n+\t\treturn;\n+\n+#if defined RTE_ARCH_X86\n+\tif (!(alg & CRC32_SSE42_x64))\n+\t\tRTE_LOG(WARNING, HASH_CRC,\n+\t\t\t\"Unsupported CRC32 algorithm requested using CRC32_x64/CRC32_SSE42\\n\");\n+\tif (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T) || alg == CRC32_SSE42)\n+\t\trte_hash_crc32_alg = CRC32_SSE42;\n+\telse\n+\t\trte_hash_crc32_alg = CRC32_SSE42_x64;\n+#endif\n+\n+#if defined RTE_ARCH_ARM64\n+\tif (!(alg & CRC32_ARM64))\n+\t\tRTE_LOG(WARNING, HASH_CRC,\n+\t\t\t\"Unsupported CRC32 algorithm requested using CRC32_ARM64\\n\");\n+\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32))\n+\t\trte_hash_crc32_alg = CRC32_ARM64;\n+#endif\n+\n+\tif (rte_hash_crc32_alg == CRC32_SW)\n+\t\tRTE_LOG(WARNING, HASH_CRC,\n+\t\t\t\"Unsupported CRC32 algorithm requested using CRC32_SW\\n\");\n+}\n+\n+/* Setting the best available algorithm */\n+RTE_INIT(rte_hash_crc_init_alg)\n+{\n+#if defined(RTE_ARCH_X86)\n+\trte_hash_crc_set_alg(CRC32_SSE42_x64);\n+#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)\n+\trte_hash_crc_set_alg(CRC32_ARM64);\n+#else\n+\trte_hash_crc_set_alg(CRC32_SW);\n+#endif\n+}\ndiff --git a/lib/hash/rte_hash_crc.h b/lib/hash/rte_hash_crc.h\nindex 0249ad16c5b6..e8145ee44204 100644\n--- a/lib/hash/rte_hash_crc.h\n+++ b/lib/hash/rte_hash_crc.h\n@@ -20,8 +20,6 @@ extern \"C\" {\n #include <rte_branch_prediction.h>\n #include <rte_common.h>\n #include <rte_config.h>\n-#include <rte_cpuflags.h>\n-#include <rte_log.h>\n \n #include \"rte_crc_sw.h\"\n \n@@ -31,7 +29,7 @@ extern \"C\" {\n #define CRC32_SSE42_x64     (CRC32_x64|CRC32_SSE42)\n #define CRC32_ARM64         (1U << 3)\n \n-static uint8_t crc32_alg = CRC32_SW;\n+extern uint8_t rte_hash_crc32_alg;\n \n #if defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)\n #include \"rte_crc_arm64.h\"\n@@ -53,48 +51,8 @@ static uint8_t crc32_alg = CRC32_SW;\n  *   - (CRC32_ARM64) Use ARMv8 CRC intrinsic if available (default ARMv8)\n  *\n  */\n-static inline void\n-rte_hash_crc_set_alg(uint8_t alg)\n-{\n-\tcrc32_alg = CRC32_SW;\n-\n-\tif (alg == CRC32_SW)\n-\t\treturn;\n-\n-#if defined RTE_ARCH_X86\n-\tif (!(alg & CRC32_SSE42_x64))\n-\t\tRTE_LOG(WARNING, HASH,\n-\t\t\t\"Unsupported CRC32 algorithm requested using CRC32_x64/CRC32_SSE42\\n\");\n-\tif (!rte_cpu_get_flag_enabled(RTE_CPUFLAG_EM64T) || alg == CRC32_SSE42)\n-\t\tcrc32_alg = CRC32_SSE42;\n-\telse\n-\t\tcrc32_alg = CRC32_SSE42_x64;\n-#endif\n-\n-#if defined RTE_ARCH_ARM64\n-\tif (!(alg & CRC32_ARM64))\n-\t\tRTE_LOG(WARNING, HASH,\n-\t\t\t\"Unsupported CRC32 algorithm requested using CRC32_ARM64\\n\");\n-\tif (rte_cpu_get_flag_enabled(RTE_CPUFLAG_CRC32))\n-\t\tcrc32_alg = CRC32_ARM64;\n-#endif\n-\n-\tif (crc32_alg == CRC32_SW)\n-\t\tRTE_LOG(WARNING, HASH,\n-\t\t\t\"Unsupported CRC32 algorithm requested using CRC32_SW\\n\");\n-}\n-\n-/* Setting the best available algorithm */\n-RTE_INIT(rte_hash_crc_init_alg)\n-{\n-#if defined(RTE_ARCH_X86)\n-\trte_hash_crc_set_alg(CRC32_SSE42_x64);\n-#elif defined(RTE_ARCH_ARM64) && defined(__ARM_FEATURE_CRC32)\n-\trte_hash_crc_set_alg(CRC32_ARM64);\n-#else\n-\trte_hash_crc_set_alg(CRC32_SW);\n-#endif\n-}\n+void\n+rte_hash_crc_set_alg(uint8_t alg);\n \n #ifdef __DOXYGEN__\n \ndiff --git a/lib/hash/version.map b/lib/hash/version.map\nindex f03b047b2eec..8b22aad5626b 100644\n--- a/lib/hash/version.map\n+++ b/lib/hash/version.map\n@@ -9,6 +9,7 @@ DPDK_23 {\n \trte_hash_add_key_with_hash;\n \trte_hash_add_key_with_hash_data;\n \trte_hash_count;\n+\trte_hash_crc_set_alg;\n \trte_hash_create;\n \trte_hash_del_key;\n \trte_hash_del_key_with_hash;\n@@ -56,3 +57,9 @@ EXPERIMENTAL {\n \trte_thash_gfni;\n \trte_thash_gfni_bulk;\n };\n+\n+INTERNAL {\n+\tglobal:\n+\n+\trte_hash_crc32_alg;\n+};\n",
    "prefixes": [
        "v12",
        "18/22"
    ]
}