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GET /api/patches/124769/?format=api
{ "id": 124769, "url": "http://patches.dpdk.org/api/patches/124769/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230303081013.589868-12-ndabilpuram@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230303081013.589868-12-ndabilpuram@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230303081013.589868-12-ndabilpuram@marvell.com", "date": "2023-03-03T08:10:10", "name": "[12/15] common/cnxk: enable one to one SQ QINT mapping", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": true, "hash": "daf7a54fd21a6616200e5ec1be84cf9a0b0265a8", "submitter": { "id": 1202, "url": "http://patches.dpdk.org/api/people/1202/?format=api", "name": "Nithin Dabilpuram", "email": "ndabilpuram@marvell.com" }, "delegate": { "id": 310, "url": "http://patches.dpdk.org/api/users/310/?format=api", "username": "jerin", "first_name": "Jerin", "last_name": "Jacob", "email": "jerinj@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230303081013.589868-12-ndabilpuram@marvell.com/mbox/", "series": [ { "id": 27237, "url": "http://patches.dpdk.org/api/series/27237/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=27237", "date": "2023-03-03T08:09:59", "name": "[01/15] net/cnxk: resolve sefgault caused during transmit completion", "version": 1, "mbox": "http://patches.dpdk.org/series/27237/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/124769/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/124769/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id BE40A41DC3;\n\tFri, 3 Mar 2023 09:12:11 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id D104142D3B;\n\tFri, 3 Mar 2023 09:11:28 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 2AA85410EC\n for <dev@dpdk.org>; Fri, 3 Mar 2023 09:11:27 +0100 (CET)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 3236qKH8004462 for <dev@dpdk.org>; Fri, 3 Mar 2023 00:11:26 -0800", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3p1wr9xbks-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Fri, 03 Mar 2023 00:11:26 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42;\n Fri, 3 Mar 2023 00:11:24 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend\n Transport; Fri, 3 Mar 2023 00:11:24 -0800", "from hyd1588t430.caveonetworks.com (unknown [10.29.52.204])\n by maili.marvell.com (Postfix) with ESMTP id 7BF0A5B6969;\n Fri, 3 Mar 2023 00:11:18 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=d4BpF/zqhL1mGI/ErZXODUDNh+F9Oe0cCNJcGWYxFK0=;\n b=hfRZJoAf0VRDKhARxR5YQkLM7iLWk0DMnR+IPQbxvswfZu4q/JrB79O/hKtsuwh7OxWg\n JhuZGBdkIKH0XZhPFzDcqNW4KblBC5AgKWtAZSXWh7gss7Svzgbhb13WK1uaVxJjr2Hp\n r9EuPnA9d5MTa2srGbIqGdqn5ybSbu0T5AvBpMGiPPpmsjQuyjwm0blgmRjaeZCuBh36\n JZq6sWxlu8LdT9M/73VTF0Z427ufyjyyhpoERmk+ljrCQq8EzwayybDugj3w/ZFl9GDz\n 0PuUwU8TvBG0n+Q8sRo8DCf/RO+gRjOaX20WODqtRtvOpGWHIa9YhvoEYoSMvvCjvi3t 8Q==", "From": "Nithin Dabilpuram <ndabilpuram@marvell.com>", "To": "Nithin Dabilpuram <ndabilpuram@marvell.com>, Kiran Kumar K\n <kirankumark@marvell.com>, Sunil Kumar Kori <skori@marvell.com>, Satha Rao\n <skoteshwar@marvell.com>", "CC": "<jerinj@marvell.com>, <dev@dpdk.org>, Harman Kalra <hkalra@marvell.com>", "Subject": "[PATCH 12/15] common/cnxk: enable one to one SQ QINT mapping", "Date": "Fri, 3 Mar 2023 13:40:10 +0530", "Message-ID": "<20230303081013.589868-12-ndabilpuram@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230303081013.589868-1-ndabilpuram@marvell.com>", "References": "<20230303081013.589868-1-ndabilpuram@marvell.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "SCb5lKg2lSSslX2s4M3NC3et1hO63HL-", "X-Proofpoint-GUID": "SCb5lKg2lSSslX2s4M3NC3et1hO63HL-", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.219,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22\n definitions=2023-03-03_01,2023-03-02_02,2023-02-09_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "From: Harman Kalra <hkalra@marvell.com>\n\nEnabling one to one mapping between SQ to 64 QINTs per LF. So in case of\nSQ interrupt event NIX can deliver associated QINT MSI-X interrupt to\nsoftware and increment respective QINT count CSR.\n\nWhile for some cn10k chip models keeping the workaround (i.e. all SQs\nassigned to same QINT index), for errata where NIX may use an incorrect\nQINT_IDX for SQ interrupts.\n\nSigned-off-by: Harman Kalra <hkalra@marvell.com>\n---\n drivers/common/cnxk/roc_errata.h | 8 ++++++++\n drivers/common/cnxk/roc_nix_queue.c | 21 +++++++++++----------\n 2 files changed, 19 insertions(+), 10 deletions(-)", "diff": "diff --git a/drivers/common/cnxk/roc_errata.h b/drivers/common/cnxk/roc_errata.h\nindex 36e6db467a..356f9ca626 100644\n--- a/drivers/common/cnxk/roc_errata.h\n+++ b/drivers/common/cnxk/roc_errata.h\n@@ -98,4 +98,12 @@ roc_errata_nix_sdp_send_has_mtu_size_16k(void)\n \t\troc_model_is_cn96_a0() || roc_model_is_cn96_b0());\n }\n \n+/* Errata IPBUNIXTX-39300 */\n+static inline bool\n+roc_errata_nix_assign_incorrect_qint(void)\n+{\n+\treturn (roc_model_is_cn10ka_a0() || roc_model_is_cnf10ka_a0() ||\n+\t\troc_model_is_cnf10kb_a0() || roc_model_is_cn10ka_a1());\n+}\n+\n #endif /* _ROC_ERRATA_H_ */\ndiff --git a/drivers/common/cnxk/roc_nix_queue.c b/drivers/common/cnxk/roc_nix_queue.c\nindex 464ee0b984..21bfe7d498 100644\n--- a/drivers/common/cnxk/roc_nix_queue.c\n+++ b/drivers/common/cnxk/roc_nix_queue.c\n@@ -1103,11 +1103,8 @@ sq_cn9k_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum,\n \taq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);\n \n \t/* Many to one reduction */\n-\t/* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can\n-\t * send incorrect QINT_IDX when reporting queue interrupt (QINT). This\n-\t * might result in software missing the interrupt.\n-\t */\n-\taq->sq.qint_idx = 0;\n+\taq->sq.qint_idx = sq->qid % nix->qints;\n+\n \treturn 0;\n }\n \n@@ -1237,11 +1234,15 @@ sq_init(struct nix *nix, struct roc_nix_sq *sq, uint32_t rr_quantum, uint16_t sm\n \taq->sq.sq_int_ena |= BIT(NIX_SQINT_SEND_ERR);\n \taq->sq.sq_int_ena |= BIT(NIX_SQINT_MNQ_ERR);\n \n-\t/* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can\n-\t * send incorrect QINT_IDX when reporting queue interrupt (QINT). This\n-\t * might result in software missing the interrupt.\n-\t */\n-\taq->sq.qint_idx = 0;\n+\t/* Many to one reduction */\n+\taq->sq.qint_idx = sq->qid % nix->qints;\n+\tif (roc_errata_nix_assign_incorrect_qint()) {\n+\t\t/* Assigning QINT 0 to all the SQs, an errata exists where NIXTX can\n+\t\t * send incorrect QINT_IDX when reporting queue interrupt (QINT). This\n+\t\t * might result in software missing the interrupt.\n+\t\t */\n+\t\taq->sq.qint_idx = 0;\n+\t}\n \treturn 0;\n }\n \n", "prefixes": [ "12/15" ] }