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GET /api/patches/122973/?format=api
{ "id": 122973, "url": "http://patches.dpdk.org/api/patches/122973/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230202162537.1067595-4-michaelba@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230202162537.1067595-4-michaelba@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230202162537.1067595-4-michaelba@nvidia.com", "date": "2023-02-02T16:25:32", "name": "[v2,3/8] compress/mlx5: fix QP setup for partial transformations", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "1d982fe48c108d2e47eff8e87f0eace34aea92a0", "submitter": { "id": 1949, "url": "http://patches.dpdk.org/api/people/1949/?format=api", "name": "Michael Baum", "email": "michaelba@nvidia.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230202162537.1067595-4-michaelba@nvidia.com/mbox/", "series": [ { "id": 26766, "url": "http://patches.dpdk.org/api/series/26766/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26766", "date": "2023-02-02T16:25:29", "name": "compress/mlx5: add LZ4 support", "version": 2, "mbox": "http://patches.dpdk.org/series/26766/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/122973/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/122973/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 929B541BAE;\n\tThu, 2 Feb 2023 17:26:15 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4F7A442FD6;\n\tThu, 2 Feb 2023 17:26:02 +0100 (CET)", "from NAM02-BN1-obe.outbound.protection.outlook.com\n (mail-bn1nam02on2050.outbound.protection.outlook.com [40.107.212.50])\n by mails.dpdk.org (Postfix) with ESMTP id 1A6D642FD0;\n Thu, 2 Feb 2023 17:26:01 +0100 (CET)", "from DS7PR03CA0149.namprd03.prod.outlook.com (2603:10b6:5:3b4::34)\n by DM4PR12MB6184.namprd12.prod.outlook.com (2603:10b6:8:a6::8) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.6043.38; 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helo=mail.nvidia.com; pr=C", "From": "Michael Baum <michaelba@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "Matan Azrad <matan@nvidia.com>, Akhil Goyal <gakhil@marvell.com>, \"Thomas\n Monjalon\" <thomas@monjalon.net>, <rzidane@nvidia.com>, <stable@dpdk.org>", "Subject": "[PATCH v2 3/8] compress/mlx5: fix QP setup for partial\n transformations", "Date": "Thu, 2 Feb 2023 18:25:32 +0200", "Message-ID": "<20230202162537.1067595-4-michaelba@nvidia.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20230202162537.1067595-1-michaelba@nvidia.com>", "References": "<20230109075838.2508039-1-michaelba@nvidia.com>\n <20230202162537.1067595-1-michaelba@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DM6NAM11FT035:EE_|DM4PR12MB6184:EE_", "X-MS-Office365-Filtering-Correlation-Id": "9f629455-78ea-4246-c1f5-08db053a2b5d", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n hZ6NqU7yW0pPaTFwOELN1i0h7vNue/W6+2dkxdZ8eP17Y/8fukjHCXrbB2MV1OTc/v/wau+6OUvTy1dS0tiVyvxMF1H7WFbcH8IjIRY7c98hPcnUUtpMfBhbN/E6auIN84IC1eGRQ5fcPKtSkxO/1mVgiW/rWCk61grHZlP48Eo3qybG321JRTwhHq9ZCA6Q+9L8n8SyjjHoVhWF6sZct8Cxd+OI+WXzLJc3Oqso9RUI8wkr4iJABQnRtgy7iC3zLzsfI7Cn8Gm1Q8iWPjgMFJpMfsFTEQWOkt1Ik9RVjjLv0VnaTinG80ntwSw/hOdq6klA15LjxM8xDzqTAW/MALvXOzCcSzZstBk8Ha69BYOAZJYKOBcJ3+qJcritFTH7jU9t/JEa8K04uAin853j9a1HzQLAejpTmuF0b6MHtfP0aQVuYPlOogjWjKQ4riD9lbQzbXD3zWs/ko41Uumj4iMlTL2zBIY1JTinr8vsOPructRUCQbVmakfgjGf4bEhPGGAqVMgAgm878T+2mj1s0DHbqA4zrOzuvbckv1l54le/pCXxo1sx2bpJhy8YI1gs+jMqKB4Ly7sSCN3+lnem11Ln+a5lzBxRZnPYEEidb/TEF3Z+QDUHKz4+7t5eUs9CIhFdhd92KnU6bPqvo968Zl50Ok3FjXeRd3jEnY8nOuA06NVfdeSnGL0dguwNR6qQS0AV9Lm73jn0DvzBv6uYg==", "X-Forefront-Antispam-Report": "CIP:216.228.117.161; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE;\n SFS:(13230025)(4636009)(376002)(396003)(346002)(39860400002)(136003)(451199018)(36840700001)(46966006)(40470700004)(2906002)(36756003)(336012)(82310400005)(54906003)(83380400001)(426003)(6666004)(316002)(47076005)(186003)(478600001)(40460700003)(26005)(356005)(6286002)(7696005)(70586007)(55016003)(8936002)(4326008)(70206006)(41300700001)(8676002)(5660300002)(36860700001)(40480700001)(86362001)(1076003)(82740400003)(7636003)(6916009)(2616005);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "02 Feb 2023 16:25:59.5301 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 9f629455-78ea-4246-c1f5-08db053a2b5d", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT035.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DM4PR12MB6184", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The mlx5_compress_qp_setup() function creates QP for compress,\ndecompress and DMA. Thus, the MMO flag is turned on only when all\noperations are supported.\n\nHowever, since partial transformations have been allowed, it should be\nturn on for part of them.\n\nThis patch removes the compress MMO support requirement.\n\nFixes: 2efd26544554 (\"compress/mlx5: support partial transformation\")\nCc: rzidane@nvidia.com\nCc: stable@dpdk.org\n\nSigned-off-by: Michael Baum <michaelba@nvidia.com>\n---\n drivers/compress/mlx5/mlx5_compress.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)", "diff": "diff --git a/drivers/compress/mlx5/mlx5_compress.c b/drivers/compress/mlx5/mlx5_compress.c\nindex c46fb4eb89..c4bf62ed41 100644\n--- a/drivers/compress/mlx5/mlx5_compress.c\n+++ b/drivers/compress/mlx5/mlx5_compress.c\n@@ -243,8 +243,8 @@ mlx5_compress_qp_setup(struct rte_compressdev *dev, uint16_t qp_id,\n \t\tmlx5_ts_format_conv(priv->cdev->config.hca_attr.qp_ts_format);\n \tqp_attr.num_of_receive_wqes = 0;\n \tqp_attr.num_of_send_wqbbs = RTE_BIT32(log_ops_n);\n-\tqp_attr.mmo = priv->mmo_decomp_qp && priv->mmo_comp_qp\n-\t\t\t&& priv->mmo_dma_qp;\n+\tqp_attr.mmo = priv->mmo_decomp_qp || priv->mmo_comp_qp ||\n+\t\t priv->mmo_dma_qp;\n \tret = mlx5_devx_qp_create(priv->cdev->ctx, &qp->qp,\n \t\t\t\t\tqp_attr.num_of_send_wqbbs *\n \t\t\t\t\tMLX5_WQE_SIZE, &qp_attr, socket_id);\n", "prefixes": [ "v2", "3/8" ] }