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GET /api/patches/122820/?format=api
{ "id": 122820, "url": "http://patches.dpdk.org/api/patches/122820/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230201092310.23252-11-syalavarthi@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20230201092310.23252-11-syalavarthi@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20230201092310.23252-11-syalavarthi@marvell.com", "date": "2023-02-01T09:22:41", "name": "[v4,10/39] ml/cnxk: add support to create device queue-pairs", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "9d0f8ad21ed14839e7a55cba671f028286762622", "submitter": { "id": 2480, "url": "http://patches.dpdk.org/api/people/2480/?format=api", "name": "Srikanth Yalavarthi", "email": "syalavarthi@marvell.com" }, "delegate": { "id": 1, "url": "http://patches.dpdk.org/api/users/1/?format=api", "username": "tmonjalo", "first_name": "Thomas", "last_name": "Monjalon", "email": "thomas@monjalon.net" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230201092310.23252-11-syalavarthi@marvell.com/mbox/", "series": [ { "id": 26732, "url": "http://patches.dpdk.org/api/series/26732/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26732", "date": "2023-02-01T09:22:31", "name": "Implementation of ML CNXK driver", "version": 4, "mbox": "http://patches.dpdk.org/series/26732/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/122820/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/122820/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 6C3F241B9D;\n\tWed, 1 Feb 2023 10:24:36 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id BEA4642D73;\n\tWed, 1 Feb 2023 10:23:30 +0100 (CET)", "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 8401942D40\n for <dev@dpdk.org>; Wed, 1 Feb 2023 10:23:19 +0100 (CET)", "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id\n 3116Lsmb026407 for <dev@dpdk.org>; Wed, 1 Feb 2023 01:23:18 -0800", "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3nfjr8rgv4-2\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Wed, 01 Feb 2023 01:23:18 -0800", "from DC5-EXCH01.marvell.com (10.69.176.38) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.42;\n Wed, 1 Feb 2023 01:23:17 -0800", "from maili.marvell.com (10.69.176.80) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server id 15.0.1497.42 via Frontend\n Transport; Wed, 1 Feb 2023 01:23:17 -0800", "from ml-host-33.caveonetworks.com (unknown [10.110.143.233])\n by maili.marvell.com (Postfix) with ESMTP id 009553F70F1;\n Wed, 1 Feb 2023 01:23:15 -0800 (PST)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-type; s=pfpt0220; bh=4Czt1mqXImdZ9FOTCvUNssRXwb9T6BKNeSdxzIAzqgI=;\n b=EkzQ56hnWviioDDohvFTvEvGsQ4G6nYRJbqouDW8IcLzluYr4OjMPQU9UuTm2+K+JaI3\n DN5GbIwWPSVyGSFFaKmhpJY5ltqTFySW41jRLfeWWptnkr7evYR3S2oJsmzuth3LmwCN\n 1X0hIO8cctdppFRRrVp9Z5qSE8OuNd836ommHkmnR1GldIjbdo+4kMtwZIBecKSTptuR\n CHnL8GFcKUe9+uu16yXQhF/4jptuTVahzgaMfwEZeHDAwj3VV8Oi6ZeBqbMy24jZrw7/\n K/hH1R2tNM+krjm8T6SngzkyJ89I6S8DgqWdOYebeXWnML7HUoVczawYWygME+oczA0G dg==", "From": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "To": "Srikanth Yalavarthi <syalavarthi@marvell.com>", "CC": "<dev@dpdk.org>, <sshankarnara@marvell.com>, <jerinj@marvell.com>,\n <aprabhu@marvell.com>", "Subject": "[PATCH v4 10/39] ml/cnxk: add support to create device queue-pairs", "Date": "Wed, 1 Feb 2023 01:22:41 -0800", "Message-ID": "<20230201092310.23252-11-syalavarthi@marvell.com>", "X-Mailer": "git-send-email 2.17.1", "In-Reply-To": "<20230201092310.23252-1-syalavarthi@marvell.com>", "References": "<20221208200220.20267-1-syalavarthi@marvell.com>\n <20230201092310.23252-1-syalavarthi@marvell.com>", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Proofpoint-GUID": "OmMefUofB159tI002xNsmOkZ1J86Xbyk", "X-Proofpoint-ORIG-GUID": "OmMefUofB159tI002xNsmOkZ1J86Xbyk", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.219,Aquarius:18.0.930,Hydra:6.0.562,FMLib:17.11.122.1\n definitions=2023-02-01_03,2023-01-31_01,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Enabled support to create and destroy device queue-pairs. Updated\nconfigure stage to create array to store queue-pair handles. Added\ninternal structure for queue-pair, queue and ML inference requests.\n\nSigned-off-by: Srikanth Yalavarthi <syalavarthi@marvell.com>\n---\n drivers/ml/cnxk/cn10k_ml_ops.c | 207 ++++++++++++++++++++++++++++++++-\n drivers/ml/cnxk/cn10k_ml_ops.h | 33 +++++-\n 2 files changed, 237 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/ml/cnxk/cn10k_ml_ops.c b/drivers/ml/cnxk/cn10k_ml_ops.c\nindex 3fea763caf..7c9c49ffda 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.c\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.c\n@@ -8,6 +8,97 @@\n #include \"cn10k_ml_dev.h\"\n #include \"cn10k_ml_ops.h\"\n \n+static void\n+qp_memzone_name_get(char *name, int size, int dev_id, int qp_id)\n+{\n+\tsnprintf(name, size, \"cn10k_ml_qp_mem_%u:%u\", dev_id, qp_id);\n+}\n+\n+static int\n+cn10k_ml_qp_destroy(const struct rte_ml_dev *dev, struct cn10k_ml_qp *qp)\n+{\n+\tconst struct rte_memzone *qp_mem;\n+\tchar name[RTE_MEMZONE_NAMESIZE];\n+\tint ret;\n+\n+\tqp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id, qp->id);\n+\tqp_mem = rte_memzone_lookup(name);\n+\tret = rte_memzone_free(qp_mem);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\trte_free(qp);\n+\n+\treturn 0;\n+}\n+\n+static int\n+cn10k_ml_dev_queue_pair_release(struct rte_ml_dev *dev, uint16_t queue_pair_id)\n+{\n+\tstruct cn10k_ml_qp *qp;\n+\tint ret;\n+\n+\tqp = dev->data->queue_pairs[queue_pair_id];\n+\tif (qp == NULL)\n+\t\treturn -EINVAL;\n+\n+\tret = cn10k_ml_qp_destroy(dev, qp);\n+\tif (ret) {\n+\t\tplt_err(\"Could not destroy queue pair %u\", queue_pair_id);\n+\t\treturn ret;\n+\t}\n+\n+\tdev->data->queue_pairs[queue_pair_id] = NULL;\n+\n+\treturn 0;\n+}\n+\n+static struct cn10k_ml_qp *\n+cn10k_ml_qp_create(const struct rte_ml_dev *dev, uint16_t qp_id, uint32_t nb_desc, int socket_id)\n+{\n+\tconst struct rte_memzone *qp_mem;\n+\tchar name[RTE_MEMZONE_NAMESIZE];\n+\tstruct cn10k_ml_qp *qp;\n+\tuint32_t len;\n+\tuint8_t *va;\n+\n+\t/* Allocate queue pair */\n+\tqp = rte_zmalloc_socket(\"cn10k_ml_pmd_queue_pair\", sizeof(struct cn10k_ml_qp), ROC_ALIGN,\n+\t\t\t\tsocket_id);\n+\tif (qp == NULL) {\n+\t\tplt_err(\"Could not allocate queue pair\");\n+\t\treturn NULL;\n+\t}\n+\n+\t/* For request queue */\n+\tlen = nb_desc * sizeof(struct cn10k_ml_req);\n+\tqp_memzone_name_get(name, RTE_MEMZONE_NAMESIZE, dev->data->dev_id, qp_id);\n+\tqp_mem = rte_memzone_reserve_aligned(\n+\t\tname, len, socket_id, RTE_MEMZONE_SIZE_HINT_ONLY | RTE_MEMZONE_256MB, ROC_ALIGN);\n+\tif (qp_mem == NULL) {\n+\t\tplt_err(\"Could not reserve memzone: %s\", name);\n+\t\tgoto qp_free;\n+\t}\n+\n+\tva = qp_mem->addr;\n+\tmemset(va, 0, len);\n+\n+\t/* Initialize Request queue */\n+\tqp->id = qp_id;\n+\tqp->queue.reqs = (struct cn10k_ml_req *)va;\n+\tqp->queue.head = 0;\n+\tqp->queue.tail = 0;\n+\tqp->queue.wait_cycles = ML_CN10K_CMD_TIMEOUT * plt_tsc_hz();\n+\tqp->nb_desc = nb_desc;\n+\n+\treturn qp;\n+\n+qp_free:\n+\trte_free(qp);\n+\n+\treturn NULL;\n+}\n+\n static int\n cn10k_ml_dev_info_get(struct rte_ml_dev *dev, struct rte_ml_dev_info *dev_info)\n {\n@@ -30,6 +121,9 @@ cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *c\n {\n \tstruct rte_ml_dev_info dev_info;\n \tstruct cn10k_ml_dev *mldev;\n+\tstruct cn10k_ml_qp *qp;\n+\tuint32_t mz_size;\n+\tuint16_t qp_id;\n \tint ret;\n \n \tif (dev == NULL || conf == NULL)\n@@ -68,21 +162,83 @@ cn10k_ml_dev_configure(struct rte_ml_dev *dev, const struct rte_ml_dev_config *c\n \t\treturn -ENOTSUP;\n \t}\n \n+\t/* Configure queue-pairs */\n+\tif (dev->data->queue_pairs == NULL) {\n+\t\tmz_size = sizeof(dev->data->queue_pairs[0]) * conf->nb_queue_pairs;\n+\t\tdev->data->queue_pairs =\n+\t\t\trte_zmalloc(\"cn10k_mldev_queue_pairs\", mz_size, RTE_CACHE_LINE_SIZE);\n+\t\tif (dev->data->queue_pairs == NULL) {\n+\t\t\tdev->data->nb_queue_pairs = 0;\n+\t\t\tplt_err(\"Failed to get memory for queue_pairs, nb_queue_pairs %u\",\n+\t\t\t\tconf->nb_queue_pairs);\n+\t\t\treturn -ENOMEM;\n+\t\t}\n+\t} else { /* Re-configure */\n+\t\tvoid **queue_pairs;\n+\n+\t\t/* Release all queue pairs as ML spec doesn't support queue_pair_destroy. */\n+\t\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {\n+\t\t\tqp = dev->data->queue_pairs[qp_id];\n+\t\t\tif (qp != NULL) {\n+\t\t\t\tret = cn10k_ml_dev_queue_pair_release(dev, qp_id);\n+\t\t\t\tif (ret < 0)\n+\t\t\t\t\treturn ret;\n+\t\t\t}\n+\t\t}\n+\n+\t\tqueue_pairs = dev->data->queue_pairs;\n+\t\tqueue_pairs =\n+\t\t\trte_realloc(queue_pairs, sizeof(queue_pairs[0]) * conf->nb_queue_pairs,\n+\t\t\t\t RTE_CACHE_LINE_SIZE);\n+\t\tif (queue_pairs == NULL) {\n+\t\t\tdev->data->nb_queue_pairs = 0;\n+\t\t\tplt_err(\"Failed to realloc queue_pairs, nb_queue_pairs = %u\",\n+\t\t\t\tconf->nb_queue_pairs);\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto error;\n+\t\t}\n+\n+\t\tmemset(queue_pairs, 0, sizeof(queue_pairs[0]) * conf->nb_queue_pairs);\n+\t\tdev->data->queue_pairs = queue_pairs;\n+\t}\n+\tdev->data->nb_queue_pairs = conf->nb_queue_pairs;\n+\n \tmldev->state = ML_CN10K_DEV_STATE_CONFIGURED;\n \n \treturn 0;\n+\n+error:\n+\tif (dev->data->queue_pairs != NULL)\n+\t\trte_free(dev->data->queue_pairs);\n+\n+\treturn ret;\n }\n \n static int\n cn10k_ml_dev_close(struct rte_ml_dev *dev)\n {\n \tstruct cn10k_ml_dev *mldev;\n+\tstruct cn10k_ml_qp *qp;\n+\tuint16_t qp_id;\n \n \tif (dev == NULL)\n \t\treturn -EINVAL;\n \n \tmldev = dev->data->dev_private;\n \n+\t/* Destroy all queue pairs */\n+\tfor (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {\n+\t\tqp = dev->data->queue_pairs[qp_id];\n+\t\tif (qp != NULL) {\n+\t\t\tif (cn10k_ml_qp_destroy(dev, qp) != 0)\n+\t\t\t\tplt_err(\"Could not destroy queue pair %u\", qp_id);\n+\t\t\tdev->data->queue_pairs[qp_id] = NULL;\n+\t\t}\n+\t}\n+\n+\tif (dev->data->queue_pairs)\n+\t\trte_free(dev->data->queue_pairs);\n+\n \t/* Unload firmware */\n \tcn10k_ml_fw_unload(mldev);\n \n@@ -140,9 +296,56 @@ cn10k_ml_dev_stop(struct rte_ml_dev *dev)\n \treturn 0;\n }\n \n+static int\n+cn10k_ml_dev_queue_pair_setup(struct rte_ml_dev *dev, uint16_t queue_pair_id,\n+\t\t\t const struct rte_ml_dev_qp_conf *qp_conf, int socket_id)\n+{\n+\tstruct rte_ml_dev_info dev_info;\n+\tstruct cn10k_ml_qp *qp;\n+\tuint32_t nb_desc;\n+\n+\tif (queue_pair_id >= dev->data->nb_queue_pairs) {\n+\t\tplt_err(\"Queue-pair id = %u (>= max queue pairs supported, %u)\\n\", queue_pair_id,\n+\t\t\tdev->data->nb_queue_pairs);\n+\t\treturn -EINVAL;\n+\t}\n+\n+\tif (dev->data->queue_pairs[queue_pair_id] != NULL)\n+\t\tcn10k_ml_dev_queue_pair_release(dev, queue_pair_id);\n+\n+\tcn10k_ml_dev_info_get(dev, &dev_info);\n+\tif ((qp_conf->nb_desc > dev_info.max_desc) || (qp_conf->nb_desc == 0)) {\n+\t\tplt_err(\"Could not setup queue pair for %u descriptors\", qp_conf->nb_desc);\n+\t\treturn -EINVAL;\n+\t}\n+\tplt_ml_dbg(\"Creating queue-pair, queue_pair_id = %u, nb_desc = %u\", queue_pair_id,\n+\t\t qp_conf->nb_desc);\n+\n+\t/* As the number of usable descriptors is 1 less than the queue size being created, we\n+\t * increment the size of queue by 1 than the requested size, except when the requested size\n+\t * is equal to the maximum possible size.\n+\t */\n+\tnb_desc =\n+\t\t(qp_conf->nb_desc == dev_info.max_desc) ? dev_info.max_desc : qp_conf->nb_desc + 1;\n+\tqp = cn10k_ml_qp_create(dev, queue_pair_id, nb_desc, socket_id);\n+\tif (qp == NULL) {\n+\t\tplt_err(\"Could not create queue pair %u\", queue_pair_id);\n+\t\treturn -ENOMEM;\n+\t}\n+\tdev->data->queue_pairs[queue_pair_id] = qp;\n+\n+\treturn 0;\n+}\n+\n struct rte_ml_dev_ops cn10k_ml_ops = {\n \t/* Device control ops */\n-\t.dev_info_get = cn10k_ml_dev_info_get, .dev_configure = cn10k_ml_dev_configure,\n-\t.dev_close = cn10k_ml_dev_close, .dev_start = cn10k_ml_dev_start,\n+\t.dev_info_get = cn10k_ml_dev_info_get,\n+\t.dev_configure = cn10k_ml_dev_configure,\n+\t.dev_close = cn10k_ml_dev_close,\n+\t.dev_start = cn10k_ml_dev_start,\n \t.dev_stop = cn10k_ml_dev_stop,\n+\n+\t/* Queue-pair handling ops */\n+\t.dev_queue_pair_setup = cn10k_ml_dev_queue_pair_setup,\n+\t.dev_queue_pair_release = cn10k_ml_dev_queue_pair_release,\n };\ndiff --git a/drivers/ml/cnxk/cn10k_ml_ops.h b/drivers/ml/cnxk/cn10k_ml_ops.h\nindex fe18730aca..289c7c5587 100644\n--- a/drivers/ml/cnxk/cn10k_ml_ops.h\n+++ b/drivers/ml/cnxk/cn10k_ml_ops.h\n@@ -5,9 +5,13 @@\n #ifndef _CN10K_ML_OPS_H_\n #define _CN10K_ML_OPS_H_\n \n+#include <rte_mldev.h>\n+\n+#include <roc_api.h>\n+\n #include \"cn10k_ml_dev.h\"\n \n-/* ML request */\n+/* Request structure */\n struct cn10k_ml_req {\n \t/* Job descriptor */\n \tstruct cn10k_ml_jd jd;\n@@ -19,6 +23,33 @@ struct cn10k_ml_req {\n \tvolatile uint64_t status;\n } __rte_aligned(ROC_ALIGN);\n \n+/* Request queue */\n+struct cn10k_ml_queue {\n+\t/* Array of requests */\n+\tstruct cn10k_ml_req *reqs;\n+\n+\t/* Head of the queue, used for enqueue */\n+\tuint64_t head;\n+\n+\t/* Tail of the queue, used for dequeue */\n+\tuint64_t tail;\n+\n+\t/* Wait cycles before timeout */\n+\tuint64_t wait_cycles;\n+};\n+\n+/* Queue-pair structure */\n+struct cn10k_ml_qp {\n+\t/* ID */\n+\tuint32_t id;\n+\n+\t/* Number of descriptors */\n+\tuint64_t nb_desc;\n+\n+\t/* Request queue */\n+\tstruct cn10k_ml_queue queue;\n+};\n+\n /* Device ops */\n extern struct rte_ml_dev_ops cn10k_ml_ops;\n \n", "prefixes": [ "v4", "10/39" ] }