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GET /api/patches/122142/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 122142,
    "url": "http://patches.dpdk.org/api/patches/122142/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230117072626.93796-3-beilei.xing@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230117072626.93796-3-beilei.xing@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230117072626.93796-3-beilei.xing@intel.com",
    "date": "2023-01-17T07:26:09",
    "name": "[v3,02/15] common/idpf: add vport structure",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "3951ebe2cc72d04db03ba651e36d994d02457694",
    "submitter": {
        "id": 410,
        "url": "http://patches.dpdk.org/api/people/410/?format=api",
        "name": "Xing, Beilei",
        "email": "beilei.xing@intel.com"
    },
    "delegate": {
        "id": 1540,
        "url": "http://patches.dpdk.org/api/users/1540/?format=api",
        "username": "qzhan15",
        "first_name": "Qi",
        "last_name": "Zhang",
        "email": "qi.z.zhang@intel.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230117072626.93796-3-beilei.xing@intel.com/mbox/",
    "series": [
        {
            "id": 26568,
            "url": "http://patches.dpdk.org/api/series/26568/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26568",
            "date": "2023-01-17T07:26:07",
            "name": "net/idpf: introduce idpf common modle",
            "version": 3,
            "mbox": "http://patches.dpdk.org/series/26568/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/122142/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/122142/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 0D972423FA;\n\tTue, 17 Jan 2023 08:51:00 +0100 (CET)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 4E2B342D26;\n\tTue, 17 Jan 2023 08:50:56 +0100 (CET)",
            "from mga02.intel.com (mga02.intel.com [134.134.136.20])\n by mails.dpdk.org (Postfix) with ESMTP id 7962842670\n for <dev@dpdk.org>; Tue, 17 Jan 2023 08:50:54 +0100 (CET)",
            "from fmsmga002.fm.intel.com ([10.253.24.26])\n by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 16 Jan 2023 23:50:49 -0800",
            "from dpdk-beileix-3.sh.intel.com ([10.67.110.253])\n by fmsmga002.fm.intel.com with ESMTP; 16 Jan 2023 23:50:45 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1673941854; x=1705477854;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=t3ToJ/eq/e8N4Df7XaszeBsLXpC8uy08uwHHXQQuEuI=;\n b=KeTvlIx4Fmal+N2vcepc9EyhjHTWP7CLxhEM/DpW6X+3grIgASPaUo9F\n O8/Zc8ufQgwltcJ1/ydfXgHK9aT5eL02ydfQQr2EkW67mBdvZhbg5Ll8f\n LorBOigmSW66R/rOV6FOhkKQMX/VLbb2uLRvmnQqaZU2FM5ZWrO9J3j27\n g822G3Zbp3psiNEMPtIxQiMLqP1xJrs/OJXiBNIKfeHh1Hxc/f8/aP053\n 8laoE2aCmVQJ/UUzFlKjN/a1UtWjhVDyU/5f0FmdXPUYCEJ4LjQvBpZNs\n XnpkPcfuwu1V/vDh53wAFh6VScGoJRJMRllUk8T2y5UjSvuip7SDEy9XN Q==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10592\"; a=\"312496987\"",
            "E=Sophos;i=\"5.97,222,1669104000\"; d=\"scan'208\";a=\"312496987\"",
            "E=McAfee;i=\"6500,9779,10592\"; a=\"767174474\"",
            "E=Sophos;i=\"5.97,222,1669104000\"; d=\"scan'208\";a=\"767174474\""
        ],
        "X-ExtLoop1": "1",
        "From": "beilei.xing@intel.com",
        "To": "jingjing.wu@intel.com",
        "Cc": "dev@dpdk.org, qi.z.zhang@intel.com, Beilei Xing <beilei.xing@intel.com>,\n Wenjun Wu <wenjun1.wu@intel.com>",
        "Subject": "[PATCH v3 02/15] common/idpf: add vport structure",
        "Date": "Tue, 17 Jan 2023 07:26:09 +0000",
        "Message-Id": "<20230117072626.93796-3-beilei.xing@intel.com>",
        "X-Mailer": "git-send-email 2.26.2",
        "In-Reply-To": "<20230117072626.93796-1-beilei.xing@intel.com>",
        "References": "\n <https://patches.dpdk.org/project/dpdk/cover/20230106091627.13530-1-beilei.xing@intel.com/>\n <20230117072626.93796-1-beilei.xing@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "From: Beilei Xing <beilei.xing@intel.com>\n\nMove idpf_vport structure to common module, remove ethdev dependency.\nAlso remove unused functions.\n\nSigned-off-by: Wenjun Wu <wenjun1.wu@intel.com>\nSigned-off-by: Beilei Xing <beilei.xing@intel.com>\n---\n drivers/common/idpf/idpf_common_device.h |  59 ++++++\n drivers/net/idpf/idpf_ethdev.c           |  10 +-\n drivers/net/idpf/idpf_ethdev.h           |  66 +-----\n drivers/net/idpf/idpf_rxtx.c             |   4 +-\n drivers/net/idpf/idpf_rxtx.h             |   3 +\n drivers/net/idpf/idpf_vchnl.c            | 252 +++--------------------\n 6 files changed, 96 insertions(+), 298 deletions(-)",
    "diff": "diff --git a/drivers/common/idpf/idpf_common_device.h b/drivers/common/idpf/idpf_common_device.h\nindex 4f548a7185..b7fff84b25 100644\n--- a/drivers/common/idpf/idpf_common_device.h\n+++ b/drivers/common/idpf/idpf_common_device.h\n@@ -17,4 +17,63 @@ struct idpf_adapter {\n \tuint8_t *mbx_resp; /* buffer to store the mailbox response from cp */\n };\n \n+struct idpf_chunks_info {\n+\tuint32_t tx_start_qid;\n+\tuint32_t rx_start_qid;\n+\t/* Valid only if split queue model */\n+\tuint32_t tx_compl_start_qid;\n+\tuint32_t rx_buf_start_qid;\n+\n+\tuint64_t tx_qtail_start;\n+\tuint32_t tx_qtail_spacing;\n+\tuint64_t rx_qtail_start;\n+\tuint32_t rx_qtail_spacing;\n+\tuint64_t tx_compl_qtail_start;\n+\tuint32_t tx_compl_qtail_spacing;\n+\tuint64_t rx_buf_qtail_start;\n+\tuint32_t rx_buf_qtail_spacing;\n+};\n+\n+struct idpf_vport {\n+\tstruct idpf_adapter *adapter; /* Backreference to associated adapter */\n+\tstruct virtchnl2_create_vport *vport_info; /* virtchnl response info handling */\n+\tuint16_t sw_idx; /* SW index in adapter->vports[]*/\n+\tuint16_t vport_id;\n+\tuint32_t txq_model;\n+\tuint32_t rxq_model;\n+\tuint16_t num_tx_q;\n+\t/* valid only if txq_model is split Q */\n+\tuint16_t num_tx_complq;\n+\tuint16_t num_rx_q;\n+\t/* valid only if rxq_model is split Q */\n+\tuint16_t num_rx_bufq;\n+\n+\tuint16_t max_mtu;\n+\tuint8_t default_mac_addr[VIRTCHNL_ETH_LENGTH_OF_ADDRESS];\n+\n+\tenum virtchnl_rss_algorithm rss_algorithm;\n+\tuint16_t rss_key_size;\n+\tuint16_t rss_lut_size;\n+\n+\tvoid *dev_data; /* Pointer to the device data */\n+\tuint16_t max_pkt_len; /* Maximum packet length */\n+\n+\t/* RSS info */\n+\tuint32_t *rss_lut;\n+\tuint8_t *rss_key;\n+\tuint64_t rss_hf;\n+\n+\t/* MSIX info*/\n+\tstruct virtchnl2_queue_vector *qv_map; /* queue vector mapping */\n+\tuint16_t max_vectors;\n+\tstruct virtchnl2_alloc_vectors *recv_vectors;\n+\n+\t/* Chunk info */\n+\tstruct idpf_chunks_info chunks_info;\n+\n+\tuint16_t devarg_id;\n+\n+\tbool stopped;\n+};\n+\n #endif /* _IDPF_COMMON_DEVICE_H_ */\ndiff --git a/drivers/net/idpf/idpf_ethdev.c b/drivers/net/idpf/idpf_ethdev.c\nindex 1b13d081a7..72a5c9f39b 100644\n--- a/drivers/net/idpf/idpf_ethdev.c\n+++ b/drivers/net/idpf/idpf_ethdev.c\n@@ -275,11 +275,13 @@ static int\n idpf_init_rss(struct idpf_vport *vport)\n {\n \tstruct rte_eth_rss_conf *rss_conf;\n+\tstruct rte_eth_dev_data *dev_data;\n \tuint16_t i, nb_q, lut_size;\n \tint ret = 0;\n \n-\trss_conf = &vport->dev_data->dev_conf.rx_adv_conf.rss_conf;\n-\tnb_q = vport->dev_data->nb_rx_queues;\n+\tdev_data = vport->dev_data;\n+\trss_conf = &dev_data->dev_conf.rx_adv_conf.rss_conf;\n+\tnb_q = dev_data->nb_rx_queues;\n \n \tvport->rss_key = rte_zmalloc(\"rss_key\",\n \t\t\t\t     vport->rss_key_size, 0);\n@@ -466,7 +468,7 @@ idpf_config_rx_queues_irqs(struct rte_eth_dev *dev)\n \t}\n \tvport->qv_map = qv_map;\n \n-\tif (idpf_vc_config_irq_map_unmap(vport, true) != 0) {\n+\tif (idpf_vc_config_irq_map_unmap(vport, dev->data->nb_rx_queues, true) != 0) {\n \t\tPMD_DRV_LOG(ERR, \"config interrupt mapping failed\");\n \t\tgoto config_irq_map_err;\n \t}\n@@ -582,7 +584,7 @@ idpf_dev_stop(struct rte_eth_dev *dev)\n \n \tidpf_stop_queues(dev);\n \n-\tidpf_vc_config_irq_map_unmap(vport, false);\n+\tidpf_vc_config_irq_map_unmap(vport, dev->data->nb_rx_queues, false);\n \n \tif (vport->recv_vectors != NULL)\n \t\tidpf_vc_dealloc_vectors(vport);\ndiff --git a/drivers/net/idpf/idpf_ethdev.h b/drivers/net/idpf/idpf_ethdev.h\nindex e956fa989c..8c29019667 100644\n--- a/drivers/net/idpf/idpf_ethdev.h\n+++ b/drivers/net/idpf/idpf_ethdev.h\n@@ -74,71 +74,12 @@ enum idpf_vc_result {\n \tIDPF_MSG_CMD,      /* Read async command result */\n };\n \n-struct idpf_chunks_info {\n-\tuint32_t tx_start_qid;\n-\tuint32_t rx_start_qid;\n-\t/* Valid only if split queue model */\n-\tuint32_t tx_compl_start_qid;\n-\tuint32_t rx_buf_start_qid;\n-\n-\tuint64_t tx_qtail_start;\n-\tuint32_t tx_qtail_spacing;\n-\tuint64_t rx_qtail_start;\n-\tuint32_t rx_qtail_spacing;\n-\tuint64_t tx_compl_qtail_start;\n-\tuint32_t tx_compl_qtail_spacing;\n-\tuint64_t rx_buf_qtail_start;\n-\tuint32_t rx_buf_qtail_spacing;\n-};\n-\n struct idpf_vport_param {\n \tstruct idpf_adapter_ext *adapter;\n \tuint16_t devarg_id; /* arg id from user */\n \tuint16_t idx;       /* index in adapter->vports[]*/\n };\n \n-struct idpf_vport {\n-\tstruct idpf_adapter *adapter; /* Backreference to associated adapter */\n-\tstruct virtchnl2_create_vport *vport_info; /* virtchnl response info handling */\n-\tuint16_t sw_idx; /* SW index in adapter->vports[]*/\n-\tuint16_t vport_id;\n-\tuint32_t txq_model;\n-\tuint32_t rxq_model;\n-\tuint16_t num_tx_q;\n-\t/* valid only if txq_model is split Q */\n-\tuint16_t num_tx_complq;\n-\tuint16_t num_rx_q;\n-\t/* valid only if rxq_model is split Q */\n-\tuint16_t num_rx_bufq;\n-\n-\tuint16_t max_mtu;\n-\tuint8_t default_mac_addr[VIRTCHNL_ETH_LENGTH_OF_ADDRESS];\n-\n-\tenum virtchnl_rss_algorithm rss_algorithm;\n-\tuint16_t rss_key_size;\n-\tuint16_t rss_lut_size;\n-\n-\tstruct rte_eth_dev_data *dev_data; /* Pointer to the device data */\n-\tuint16_t max_pkt_len; /* Maximum packet length */\n-\n-\t/* RSS info */\n-\tuint32_t *rss_lut;\n-\tuint8_t *rss_key;\n-\tuint64_t rss_hf;\n-\n-\t/* MSIX info*/\n-\tstruct virtchnl2_queue_vector *qv_map; /* queue vector mapping */\n-\tuint16_t max_vectors;\n-\tstruct virtchnl2_alloc_vectors *recv_vectors;\n-\n-\t/* Chunk info */\n-\tstruct idpf_chunks_info chunks_info;\n-\n-\tuint16_t devarg_id;\n-\n-\tbool stopped;\n-};\n-\n /* Struct used when parse driver specific devargs */\n struct idpf_devargs {\n \tuint16_t req_vports[IDPF_MAX_VPORT_NUM];\n@@ -242,15 +183,12 @@ int idpf_vc_destroy_vport(struct idpf_vport *vport);\n int idpf_vc_set_rss_key(struct idpf_vport *vport);\n int idpf_vc_set_rss_lut(struct idpf_vport *vport);\n int idpf_vc_set_rss_hash(struct idpf_vport *vport);\n-int idpf_vc_config_rxqs(struct idpf_vport *vport);\n-int idpf_vc_config_rxq(struct idpf_vport *vport, uint16_t rxq_id);\n-int idpf_vc_config_txqs(struct idpf_vport *vport);\n-int idpf_vc_config_txq(struct idpf_vport *vport, uint16_t txq_id);\n int idpf_switch_queue(struct idpf_vport *vport, uint16_t qid,\n \t\t      bool rx, bool on);\n int idpf_vc_ena_dis_queues(struct idpf_vport *vport, bool enable);\n int idpf_vc_ena_dis_vport(struct idpf_vport *vport, bool enable);\n-int idpf_vc_config_irq_map_unmap(struct idpf_vport *vport, bool map);\n+int idpf_vc_config_irq_map_unmap(struct idpf_vport *vport,\n+\t\t\t\t uint16_t nb_rxq, bool map);\n int idpf_vc_alloc_vectors(struct idpf_vport *vport, uint16_t num_vectors);\n int idpf_vc_dealloc_vectors(struct idpf_vport *vport);\n int idpf_vc_query_ptype_info(struct idpf_adapter *adapter);\ndiff --git a/drivers/net/idpf/idpf_rxtx.c b/drivers/net/idpf/idpf_rxtx.c\nindex 4845f2ea0a..918d156e03 100644\n--- a/drivers/net/idpf/idpf_rxtx.c\n+++ b/drivers/net/idpf/idpf_rxtx.c\n@@ -1066,7 +1066,7 @@ idpf_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)\n \t\tdev->data->rx_queues[rx_queue_id];\n \tint err = 0;\n \n-\terr = idpf_vc_config_rxq(vport, rx_queue_id);\n+\terr = idpf_vc_config_rxq(vport, rxq);\n \tif (err != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Fail to configure Rx queue %u\", rx_queue_id);\n \t\treturn err;\n@@ -1117,7 +1117,7 @@ idpf_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)\n \t\tdev->data->tx_queues[tx_queue_id];\n \tint err = 0;\n \n-\terr = idpf_vc_config_txq(vport, tx_queue_id);\n+\terr = idpf_vc_config_txq(vport, txq);\n \tif (err != 0) {\n \t\tPMD_DRV_LOG(ERR, \"Fail to configure Tx queue %u\", tx_queue_id);\n \t\treturn err;\ndiff --git a/drivers/net/idpf/idpf_rxtx.h b/drivers/net/idpf/idpf_rxtx.h\nindex 047fc03614..9417651b3f 100644\n--- a/drivers/net/idpf/idpf_rxtx.h\n+++ b/drivers/net/idpf/idpf_rxtx.h\n@@ -243,6 +243,9 @@ void idpf_stop_queues(struct rte_eth_dev *dev);\n void idpf_set_rx_function(struct rte_eth_dev *dev);\n void idpf_set_tx_function(struct rte_eth_dev *dev);\n \n+int idpf_vc_config_rxq(struct idpf_vport *vport, struct idpf_rx_queue *rxq);\n+int idpf_vc_config_txq(struct idpf_vport *vport, struct idpf_tx_queue *txq);\n+\n #define IDPF_TIMESYNC_REG_WRAP_GUARD_BAND  10000\n /* Helper function to convert a 32b nanoseconds timestamp to 64b. */\n static inline uint64_t\ndiff --git a/drivers/net/idpf/idpf_vchnl.c b/drivers/net/idpf/idpf_vchnl.c\nindex ca481bb915..633d3295d3 100644\n--- a/drivers/net/idpf/idpf_vchnl.c\n+++ b/drivers/net/idpf/idpf_vchnl.c\n@@ -742,121 +742,9 @@ idpf_vc_set_rss_hash(struct idpf_vport *vport)\n \n #define IDPF_RX_BUF_STRIDE\t\t64\n int\n-idpf_vc_config_rxqs(struct idpf_vport *vport)\n-{\n-\tstruct idpf_adapter *base = vport->adapter;\n-\tstruct idpf_adapter_ext *adapter = IDPF_ADAPTER_TO_EXT(base);\n-\tstruct idpf_rx_queue **rxq =\n-\t\t(struct idpf_rx_queue **)vport->dev_data->rx_queues;\n-\tstruct virtchnl2_config_rx_queues *vc_rxqs = NULL;\n-\tstruct virtchnl2_rxq_info *rxq_info;\n-\tstruct idpf_cmd_info args;\n-\tuint16_t total_qs, num_qs;\n-\tint size, i, j;\n-\tint err = 0;\n-\tint k = 0;\n-\n-\ttotal_qs = vport->num_rx_q + vport->num_rx_bufq;\n-\twhile (total_qs) {\n-\t\tif (total_qs > adapter->max_rxq_per_msg) {\n-\t\t\tnum_qs = adapter->max_rxq_per_msg;\n-\t\t\ttotal_qs -= adapter->max_rxq_per_msg;\n-\t\t} else {\n-\t\t\tnum_qs = total_qs;\n-\t\t\ttotal_qs = 0;\n-\t\t}\n-\n-\t\tsize = sizeof(*vc_rxqs) + (num_qs - 1) *\n-\t\t\tsizeof(struct virtchnl2_rxq_info);\n-\t\tvc_rxqs = rte_zmalloc(\"cfg_rxqs\", size, 0);\n-\t\tif (vc_rxqs == NULL) {\n-\t\t\tPMD_DRV_LOG(ERR, \"Failed to allocate virtchnl2_config_rx_queues\");\n-\t\t\terr = -ENOMEM;\n-\t\t\tbreak;\n-\t\t}\n-\t\tvc_rxqs->vport_id = vport->vport_id;\n-\t\tvc_rxqs->num_qinfo = num_qs;\n-\t\tif (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {\n-\t\t\tfor (i = 0; i < num_qs; i++, k++) {\n-\t\t\t\trxq_info = &vc_rxqs->qinfo[i];\n-\t\t\t\trxq_info->dma_ring_addr = rxq[k]->rx_ring_phys_addr;\n-\t\t\t\trxq_info->type = VIRTCHNL2_QUEUE_TYPE_RX;\n-\t\t\t\trxq_info->queue_id = rxq[k]->queue_id;\n-\t\t\t\trxq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;\n-\t\t\t\trxq_info->data_buffer_size = rxq[k]->rx_buf_len;\n-\t\t\t\trxq_info->max_pkt_size = vport->max_pkt_len;\n-\n-\t\t\t\trxq_info->desc_ids = VIRTCHNL2_RXDID_2_FLEX_SQ_NIC_M;\n-\t\t\t\trxq_info->qflags |= VIRTCHNL2_RX_DESC_SIZE_32BYTE;\n-\n-\t\t\t\trxq_info->ring_len = rxq[k]->nb_rx_desc;\n-\t\t\t}\n-\t\t} else {\n-\t\t\tfor (i = 0; i < num_qs / 3; i++, k++) {\n-\t\t\t\t/* Rx queue */\n-\t\t\t\trxq_info = &vc_rxqs->qinfo[i * 3];\n-\t\t\t\trxq_info->dma_ring_addr =\n-\t\t\t\t\trxq[k]->rx_ring_phys_addr;\n-\t\t\t\trxq_info->type = VIRTCHNL2_QUEUE_TYPE_RX;\n-\t\t\t\trxq_info->queue_id = rxq[k]->queue_id;\n-\t\t\t\trxq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;\n-\t\t\t\trxq_info->data_buffer_size = rxq[k]->rx_buf_len;\n-\t\t\t\trxq_info->max_pkt_size = vport->max_pkt_len;\n-\n-\t\t\t\trxq_info->desc_ids = VIRTCHNL2_RXDID_2_FLEX_SPLITQ_M;\n-\t\t\t\trxq_info->qflags |= VIRTCHNL2_RX_DESC_SIZE_32BYTE;\n-\n-\t\t\t\trxq_info->ring_len = rxq[k]->nb_rx_desc;\n-\t\t\t\trxq_info->rx_bufq1_id = rxq[k]->bufq1->queue_id;\n-\t\t\t\trxq_info->rx_bufq2_id = rxq[k]->bufq2->queue_id;\n-\t\t\t\trxq_info->rx_buffer_low_watermark = 64;\n-\n-\t\t\t\t/* Buffer queue */\n-\t\t\t\tfor (j = 1; j <= IDPF_RX_BUFQ_PER_GRP; j++) {\n-\t\t\t\t\tstruct idpf_rx_queue *bufq = j == 1 ?\n-\t\t\t\t\t\trxq[k]->bufq1 : rxq[k]->bufq2;\n-\t\t\t\t\trxq_info = &vc_rxqs->qinfo[i * 3 + j];\n-\t\t\t\t\trxq_info->dma_ring_addr =\n-\t\t\t\t\t\tbufq->rx_ring_phys_addr;\n-\t\t\t\t\trxq_info->type =\n-\t\t\t\t\t\tVIRTCHNL2_QUEUE_TYPE_RX_BUFFER;\n-\t\t\t\t\trxq_info->queue_id = bufq->queue_id;\n-\t\t\t\t\trxq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;\n-\t\t\t\t\trxq_info->data_buffer_size = bufq->rx_buf_len;\n-\t\t\t\t\trxq_info->desc_ids =\n-\t\t\t\t\t\tVIRTCHNL2_RXDID_2_FLEX_SPLITQ_M;\n-\t\t\t\t\trxq_info->ring_len = bufq->nb_rx_desc;\n-\n-\t\t\t\t\trxq_info->buffer_notif_stride =\n-\t\t\t\t\t\tIDPF_RX_BUF_STRIDE;\n-\t\t\t\t\trxq_info->rx_buffer_low_watermark = 64;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t}\n-\t\tmemset(&args, 0, sizeof(args));\n-\t\targs.ops = VIRTCHNL2_OP_CONFIG_RX_QUEUES;\n-\t\targs.in_args = (uint8_t *)vc_rxqs;\n-\t\targs.in_args_size = size;\n-\t\targs.out_buffer = base->mbx_resp;\n-\t\targs.out_size = IDPF_DFLT_MBX_BUF_SIZE;\n-\n-\t\terr = idpf_execute_vc_cmd(base, &args);\n-\t\trte_free(vc_rxqs);\n-\t\tif (err != 0) {\n-\t\t\tPMD_DRV_LOG(ERR, \"Failed to execute command of VIRTCHNL2_OP_CONFIG_RX_QUEUES\");\n-\t\t\tbreak;\n-\t\t}\n-\t}\n-\n-\treturn err;\n-}\n-\n-int\n-idpf_vc_config_rxq(struct idpf_vport *vport, uint16_t rxq_id)\n+idpf_vc_config_rxq(struct idpf_vport *vport, struct idpf_rx_queue *rxq)\n {\n \tstruct idpf_adapter *adapter = vport->adapter;\n-\tstruct idpf_rx_queue **rxq =\n-\t\t(struct idpf_rx_queue **)vport->dev_data->rx_queues;\n \tstruct virtchnl2_config_rx_queues *vc_rxqs = NULL;\n \tstruct virtchnl2_rxq_info *rxq_info;\n \tstruct idpf_cmd_info args;\n@@ -880,39 +768,38 @@ idpf_vc_config_rxq(struct idpf_vport *vport, uint16_t rxq_id)\n \tvc_rxqs->num_qinfo = num_qs;\n \tif (vport->rxq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {\n \t\trxq_info = &vc_rxqs->qinfo[0];\n-\t\trxq_info->dma_ring_addr = rxq[rxq_id]->rx_ring_phys_addr;\n+\t\trxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;\n \t\trxq_info->type = VIRTCHNL2_QUEUE_TYPE_RX;\n-\t\trxq_info->queue_id = rxq[rxq_id]->queue_id;\n+\t\trxq_info->queue_id = rxq->queue_id;\n \t\trxq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;\n-\t\trxq_info->data_buffer_size = rxq[rxq_id]->rx_buf_len;\n+\t\trxq_info->data_buffer_size = rxq->rx_buf_len;\n \t\trxq_info->max_pkt_size = vport->max_pkt_len;\n \n \t\trxq_info->desc_ids = VIRTCHNL2_RXDID_2_FLEX_SQ_NIC_M;\n \t\trxq_info->qflags |= VIRTCHNL2_RX_DESC_SIZE_32BYTE;\n \n-\t\trxq_info->ring_len = rxq[rxq_id]->nb_rx_desc;\n+\t\trxq_info->ring_len = rxq->nb_rx_desc;\n \t}  else {\n \t\t/* Rx queue */\n \t\trxq_info = &vc_rxqs->qinfo[0];\n-\t\trxq_info->dma_ring_addr = rxq[rxq_id]->rx_ring_phys_addr;\n+\t\trxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;\n \t\trxq_info->type = VIRTCHNL2_QUEUE_TYPE_RX;\n-\t\trxq_info->queue_id = rxq[rxq_id]->queue_id;\n+\t\trxq_info->queue_id = rxq->queue_id;\n \t\trxq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;\n-\t\trxq_info->data_buffer_size = rxq[rxq_id]->rx_buf_len;\n+\t\trxq_info->data_buffer_size = rxq->rx_buf_len;\n \t\trxq_info->max_pkt_size = vport->max_pkt_len;\n \n \t\trxq_info->desc_ids = VIRTCHNL2_RXDID_2_FLEX_SPLITQ_M;\n \t\trxq_info->qflags |= VIRTCHNL2_RX_DESC_SIZE_32BYTE;\n \n-\t\trxq_info->ring_len = rxq[rxq_id]->nb_rx_desc;\n-\t\trxq_info->rx_bufq1_id = rxq[rxq_id]->bufq1->queue_id;\n-\t\trxq_info->rx_bufq2_id = rxq[rxq_id]->bufq2->queue_id;\n+\t\trxq_info->ring_len = rxq->nb_rx_desc;\n+\t\trxq_info->rx_bufq1_id = rxq->bufq1->queue_id;\n+\t\trxq_info->rx_bufq2_id = rxq->bufq2->queue_id;\n \t\trxq_info->rx_buffer_low_watermark = 64;\n \n \t\t/* Buffer queue */\n \t\tfor (i = 1; i <= IDPF_RX_BUFQ_PER_GRP; i++) {\n-\t\t\tstruct idpf_rx_queue *bufq =\n-\t\t\t\ti == 1 ? rxq[rxq_id]->bufq1 : rxq[rxq_id]->bufq2;\n+\t\t\tstruct idpf_rx_queue *bufq = i == 1 ? rxq->bufq1 : rxq->bufq2;\n \t\t\trxq_info = &vc_rxqs->qinfo[i];\n \t\t\trxq_info->dma_ring_addr = bufq->rx_ring_phys_addr;\n \t\t\trxq_info->type = VIRTCHNL2_QUEUE_TYPE_RX_BUFFER;\n@@ -943,99 +830,9 @@ idpf_vc_config_rxq(struct idpf_vport *vport, uint16_t rxq_id)\n }\n \n int\n-idpf_vc_config_txqs(struct idpf_vport *vport)\n-{\n-\tstruct idpf_adapter *base = vport->adapter;\n-\tstruct idpf_adapter_ext *adapter = IDPF_ADAPTER_TO_EXT(base);\n-\tstruct idpf_tx_queue **txq =\n-\t\t(struct idpf_tx_queue **)vport->dev_data->tx_queues;\n-\tstruct virtchnl2_config_tx_queues *vc_txqs = NULL;\n-\tstruct virtchnl2_txq_info *txq_info;\n-\tstruct idpf_cmd_info args;\n-\tuint16_t total_qs, num_qs;\n-\tint size, i;\n-\tint err = 0;\n-\tint k = 0;\n-\n-\ttotal_qs = vport->num_tx_q + vport->num_tx_complq;\n-\twhile (total_qs) {\n-\t\tif (total_qs > adapter->max_txq_per_msg) {\n-\t\t\tnum_qs = adapter->max_txq_per_msg;\n-\t\t\ttotal_qs -= adapter->max_txq_per_msg;\n-\t\t} else {\n-\t\t\tnum_qs = total_qs;\n-\t\t\ttotal_qs = 0;\n-\t\t}\n-\t\tsize = sizeof(*vc_txqs) + (num_qs - 1) *\n-\t\t\tsizeof(struct virtchnl2_txq_info);\n-\t\tvc_txqs = rte_zmalloc(\"cfg_txqs\", size, 0);\n-\t\tif (vc_txqs == NULL) {\n-\t\t\tPMD_DRV_LOG(ERR, \"Failed to allocate virtchnl2_config_tx_queues\");\n-\t\t\terr = -ENOMEM;\n-\t\t\tbreak;\n-\t\t}\n-\t\tvc_txqs->vport_id = vport->vport_id;\n-\t\tvc_txqs->num_qinfo = num_qs;\n-\t\tif (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {\n-\t\t\tfor (i = 0; i < num_qs; i++, k++) {\n-\t\t\t\ttxq_info = &vc_txqs->qinfo[i];\n-\t\t\t\ttxq_info->dma_ring_addr = txq[k]->tx_ring_phys_addr;\n-\t\t\t\ttxq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;\n-\t\t\t\ttxq_info->queue_id = txq[k]->queue_id;\n-\t\t\t\ttxq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;\n-\t\t\t\ttxq_info->sched_mode = VIRTCHNL2_TXQ_SCHED_MODE_QUEUE;\n-\t\t\t\ttxq_info->ring_len = txq[k]->nb_tx_desc;\n-\t\t\t}\n-\t\t} else {\n-\t\t\tfor (i = 0; i < num_qs / 2; i++, k++) {\n-\t\t\t\t/* txq info */\n-\t\t\t\ttxq_info = &vc_txqs->qinfo[2 * i];\n-\t\t\t\ttxq_info->dma_ring_addr = txq[k]->tx_ring_phys_addr;\n-\t\t\t\ttxq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;\n-\t\t\t\ttxq_info->queue_id = txq[k]->queue_id;\n-\t\t\t\ttxq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;\n-\t\t\t\ttxq_info->sched_mode = VIRTCHNL2_TXQ_SCHED_MODE_FLOW;\n-\t\t\t\ttxq_info->ring_len = txq[k]->nb_tx_desc;\n-\t\t\t\ttxq_info->tx_compl_queue_id =\n-\t\t\t\t\ttxq[k]->complq->queue_id;\n-\t\t\t\ttxq_info->relative_queue_id = txq_info->queue_id;\n-\n-\t\t\t\t/* tx completion queue info */\n-\t\t\t\ttxq_info = &vc_txqs->qinfo[2 * i + 1];\n-\t\t\t\ttxq_info->dma_ring_addr =\n-\t\t\t\t\ttxq[k]->complq->tx_ring_phys_addr;\n-\t\t\t\ttxq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;\n-\t\t\t\ttxq_info->queue_id = txq[k]->complq->queue_id;\n-\t\t\t\ttxq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;\n-\t\t\t\ttxq_info->sched_mode = VIRTCHNL2_TXQ_SCHED_MODE_FLOW;\n-\t\t\t\ttxq_info->ring_len = txq[k]->complq->nb_tx_desc;\n-\t\t\t}\n-\t\t}\n-\n-\t\tmemset(&args, 0, sizeof(args));\n-\t\targs.ops = VIRTCHNL2_OP_CONFIG_TX_QUEUES;\n-\t\targs.in_args = (uint8_t *)vc_txqs;\n-\t\targs.in_args_size = size;\n-\t\targs.out_buffer = base->mbx_resp;\n-\t\targs.out_size = IDPF_DFLT_MBX_BUF_SIZE;\n-\n-\t\terr = idpf_execute_vc_cmd(base, &args);\n-\t\trte_free(vc_txqs);\n-\t\tif (err != 0) {\n-\t\t\tPMD_DRV_LOG(ERR, \"Failed to execute command of VIRTCHNL2_OP_CONFIG_TX_QUEUES\");\n-\t\t\tbreak;\n-\t\t}\n-\t}\n-\n-\treturn err;\n-}\n-\n-int\n-idpf_vc_config_txq(struct idpf_vport *vport, uint16_t txq_id)\n+idpf_vc_config_txq(struct idpf_vport *vport, struct idpf_tx_queue *txq)\n {\n \tstruct idpf_adapter *adapter = vport->adapter;\n-\tstruct idpf_tx_queue **txq =\n-\t\t(struct idpf_tx_queue **)vport->dev_data->tx_queues;\n \tstruct virtchnl2_config_tx_queues *vc_txqs = NULL;\n \tstruct virtchnl2_txq_info *txq_info;\n \tstruct idpf_cmd_info args;\n@@ -1060,32 +857,32 @@ idpf_vc_config_txq(struct idpf_vport *vport, uint16_t txq_id)\n \n \tif (vport->txq_model == VIRTCHNL2_QUEUE_MODEL_SINGLE) {\n \t\ttxq_info = &vc_txqs->qinfo[0];\n-\t\ttxq_info->dma_ring_addr = txq[txq_id]->tx_ring_phys_addr;\n+\t\ttxq_info->dma_ring_addr = txq->tx_ring_phys_addr;\n \t\ttxq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;\n-\t\ttxq_info->queue_id = txq[txq_id]->queue_id;\n+\t\ttxq_info->queue_id = txq->queue_id;\n \t\ttxq_info->model = VIRTCHNL2_QUEUE_MODEL_SINGLE;\n \t\ttxq_info->sched_mode = VIRTCHNL2_TXQ_SCHED_MODE_QUEUE;\n-\t\ttxq_info->ring_len = txq[txq_id]->nb_tx_desc;\n+\t\ttxq_info->ring_len = txq->nb_tx_desc;\n \t} else {\n \t\t/* txq info */\n \t\ttxq_info = &vc_txqs->qinfo[0];\n-\t\ttxq_info->dma_ring_addr = txq[txq_id]->tx_ring_phys_addr;\n+\t\ttxq_info->dma_ring_addr = txq->tx_ring_phys_addr;\n \t\ttxq_info->type = VIRTCHNL2_QUEUE_TYPE_TX;\n-\t\ttxq_info->queue_id = txq[txq_id]->queue_id;\n+\t\ttxq_info->queue_id = txq->queue_id;\n \t\ttxq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;\n \t\ttxq_info->sched_mode = VIRTCHNL2_TXQ_SCHED_MODE_FLOW;\n-\t\ttxq_info->ring_len = txq[txq_id]->nb_tx_desc;\n-\t\ttxq_info->tx_compl_queue_id = txq[txq_id]->complq->queue_id;\n+\t\ttxq_info->ring_len = txq->nb_tx_desc;\n+\t\ttxq_info->tx_compl_queue_id = txq->complq->queue_id;\n \t\ttxq_info->relative_queue_id = txq_info->queue_id;\n \n \t\t/* tx completion queue info */\n \t\ttxq_info = &vc_txqs->qinfo[1];\n-\t\ttxq_info->dma_ring_addr = txq[txq_id]->complq->tx_ring_phys_addr;\n+\t\ttxq_info->dma_ring_addr = txq->complq->tx_ring_phys_addr;\n \t\ttxq_info->type = VIRTCHNL2_QUEUE_TYPE_TX_COMPLETION;\n-\t\ttxq_info->queue_id = txq[txq_id]->complq->queue_id;\n+\t\ttxq_info->queue_id = txq->complq->queue_id;\n \t\ttxq_info->model = VIRTCHNL2_QUEUE_MODEL_SPLIT;\n \t\ttxq_info->sched_mode = VIRTCHNL2_TXQ_SCHED_MODE_FLOW;\n-\t\ttxq_info->ring_len = txq[txq_id]->complq->nb_tx_desc;\n+\t\ttxq_info->ring_len = txq->complq->nb_tx_desc;\n \t}\n \n \tmemset(&args, 0, sizeof(args));\n@@ -1104,12 +901,11 @@ idpf_vc_config_txq(struct idpf_vport *vport, uint16_t txq_id)\n }\n \n int\n-idpf_vc_config_irq_map_unmap(struct idpf_vport *vport, bool map)\n+idpf_vc_config_irq_map_unmap(struct idpf_vport *vport, uint16_t nb_rxq, bool map)\n {\n \tstruct idpf_adapter *adapter = vport->adapter;\n \tstruct virtchnl2_queue_vector_maps *map_info;\n \tstruct virtchnl2_queue_vector *vecmap;\n-\tuint16_t nb_rxq = vport->dev_data->nb_rx_queues;\n \tstruct idpf_cmd_info args;\n \tint len, i, err = 0;\n \n",
    "prefixes": [
        "v3",
        "02/15"
    ]
}