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GET /api/patches/121851/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 121851,
    "url": "http://patches.dpdk.org/api/patches/121851/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20230111205608.87953-10-cristian.dumitrescu@intel.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20230111205608.87953-10-cristian.dumitrescu@intel.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20230111205608.87953-10-cristian.dumitrescu@intel.com",
    "date": "2023-01-11T20:56:06",
    "name": "[09/11] examples/pipeline: support blocks other than pipelines",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "0b45db65430763686742228ce1f56983f5d05250",
    "submitter": {
        "id": 19,
        "url": "http://patches.dpdk.org/api/people/19/?format=api",
        "name": "Cristian Dumitrescu",
        "email": "cristian.dumitrescu@intel.com"
    },
    "delegate": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/users/1/?format=api",
        "username": "tmonjalo",
        "first_name": "Thomas",
        "last_name": "Monjalon",
        "email": "thomas@monjalon.net"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20230111205608.87953-10-cristian.dumitrescu@intel.com/mbox/",
    "series": [
        {
            "id": 26482,
            "url": "http://patches.dpdk.org/api/series/26482/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=26482",
            "date": "2023-01-11T20:55:57",
            "name": "pipeline: add IPsec support",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/26482/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/121851/comments/",
    "check": "warning",
    "checks": "http://patches.dpdk.org/api/patches/121851/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
            "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id A7D4A423AF;\n\tWed, 11 Jan 2023 21:57:13 +0100 (CET)",
            "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1A8B042D5F;\n\tWed, 11 Jan 2023 21:56:24 +0100 (CET)",
            "from mga12.intel.com (mga12.intel.com [192.55.52.136])\n by mails.dpdk.org (Postfix) with ESMTP id 6CF8C42D55\n for <dev@dpdk.org>; Wed, 11 Jan 2023 21:56:21 +0100 (CET)",
            "from orsmga003.jf.intel.com ([10.7.209.27])\n by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Jan 2023 12:56:20 -0800",
            "from silpixa00400573.ir.intel.com (HELO\n silpixa00400573.ger.corp.intel.com) ([10.237.222.53])\n by orsmga003.jf.intel.com with ESMTP; 11 Jan 2023 12:56:19 -0800"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1673470581; x=1705006581;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=UP9jTOqMxRhx6NfOBL87d91uIW5MojZg8iAoGgb2WKU=;\n b=NkWypUxOQcqdemaDXud1VvM70r+u7cqnDRfPF2RI1VlU+17kTHp2MHrd\n 39C/tp5S1AGuqnQrcVJBPIcAXsgQ9qU5lSpIPWDCN39Fj33zDlf6aQoR1\n OvQCv/GQkxvbENt1oUqXi7TU4Xdch4o+SzPPaFQ5xKMTIAutaz8c52s+m\n i3RB2zBMZnm8MDn0r5EPtMGdigwmDzfjuZtAeoBiolSNGE2dRc0sfp07v\n P/3KCE7y99IDg+ipma8k8O2dfTxC8TKSraq1zPwYLyIyFs66hagtPhMdj\n jMTxxyeN6h6o6YEv8bqEdFN1N+IW8xmQjJTEDCNWLyErQHb7twlwbquo6 w==;",
        "X-IronPort-AV": [
            "E=McAfee;i=\"6500,9779,10586\"; a=\"303229795\"",
            "E=Sophos;i=\"5.96,317,1665471600\"; d=\"scan'208\";a=\"303229795\"",
            "E=McAfee;i=\"6500,9779,10586\"; a=\"607518898\"",
            "E=Sophos;i=\"5.96,317,1665471600\"; d=\"scan'208\";a=\"607518898\""
        ],
        "X-ExtLoop1": "1",
        "From": "Cristian Dumitrescu <cristian.dumitrescu@intel.com>",
        "To": "dev@dpdk.org",
        "Cc": "Kamalakannan R <kamalakannan.r@intel.com>",
        "Subject": "[PATCH 09/11] examples/pipeline: support blocks other than pipelines",
        "Date": "Wed, 11 Jan 2023 20:56:06 +0000",
        "Message-Id": "<20230111205608.87953-10-cristian.dumitrescu@intel.com>",
        "X-Mailer": "git-send-email 2.34.1",
        "In-Reply-To": "<20230111205608.87953-1-cristian.dumitrescu@intel.com>",
        "References": "<20230111205608.87953-1-cristian.dumitrescu@intel.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Previously, the data plane threads only supported the execution of\npipelines assigned to them through configuration updates. Now, the\ndata plane threads also support running blocks such as IPsec.\n\nSigned-off-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>\nSigned-off-by: Kamalakannan R <kamalakannan.r@intel.com>\n---\n examples/pipeline/thread.c | 145 +++++++++++++++++++++++++++++++++++++\n examples/pipeline/thread.h |   9 +++\n 2 files changed, 154 insertions(+)",
    "diff": "diff --git a/examples/pipeline/thread.c b/examples/pipeline/thread.c\nindex 3001bc0858..51d6d06a8b 100644\n--- a/examples/pipeline/thread.c\n+++ b/examples/pipeline/thread.c\n@@ -16,6 +16,10 @@\n #define THREAD_PIPELINES_MAX                               256\n #endif\n \n+#ifndef THREAD_BLOCKS_MAX\n+#define THREAD_BLOCKS_MAX                                  256\n+#endif\n+\n /* Pipeline instruction quanta: Needs to be big enough to do some meaningful\n  * work, but not too big to avoid starving any other pipelines mapped to the\n  * same thread. For a pipeline that executes 10 instructions per packet, a\n@@ -38,9 +42,16 @@\n  *  - Read-write by the CP thread;\n  *  - Read-only by the DP thread.\n  */\n+struct block {\n+\tblock_run_f block_func;\n+\tvoid *block;\n+};\n+\n struct thread {\n \tstruct rte_swx_pipeline *pipelines[THREAD_PIPELINES_MAX];\n+\tstruct block *blocks[THREAD_BLOCKS_MAX];\n \tvolatile uint64_t n_pipelines;\n+\tvolatile uint64_t n_blocks;\n \tint enabled;\n } __rte_cache_aligned;\n \n@@ -53,14 +64,43 @@ int\n thread_init(void)\n {\n \tuint32_t thread_id;\n+\tint status = 0;\n \n \tRTE_LCORE_FOREACH_WORKER(thread_id) {\n \t\tstruct thread *t = &threads[thread_id];\n+\t\tuint32_t i;\n \n \t\tt->enabled = 1;\n+\n+\t\tfor (i = 0; i < THREAD_BLOCKS_MAX; i++) {\n+\t\t\tstruct block *b;\n+\n+\t\t\tb = calloc(1, sizeof(struct block));\n+\t\t\tif (!b) {\n+\t\t\t\tstatus = -ENOMEM;\n+\t\t\t\tgoto error;\n+\t\t\t}\n+\n+\t\t\tt->blocks[i] = b;\n+\t\t}\n \t}\n \n \treturn 0;\n+\n+error:\n+\tRTE_LCORE_FOREACH_WORKER(thread_id) {\n+\t\tstruct thread *t = &threads[thread_id];\n+\t\tuint32_t i;\n+\n+\t\tt->enabled = 0;\n+\n+\t\tfor (i = 0; i < THREAD_BLOCKS_MAX; i++) {\n+\t\t\tfree(t->blocks[i]);\n+\t\t\tt->blocks[i] = NULL;\n+\t\t}\n+\t}\n+\n+\treturn status;\n }\n \n static uint32_t\n@@ -83,6 +123,26 @@ pipeline_find(struct rte_swx_pipeline *p)\n \treturn thread_id;\n }\n \n+static uint32_t\n+block_find(void *b)\n+{\n+\tuint32_t thread_id;\n+\n+\tfor (thread_id = 0; thread_id < RTE_MAX_LCORE; thread_id++) {\n+\t\tstruct thread *t = &threads[thread_id];\n+\t\tuint32_t i;\n+\n+\t\tif (!t->enabled)\n+\t\t\tcontinue;\n+\n+\t\tfor (i = 0; i < t->n_blocks; i++)\n+\t\t\tif (t->blocks[i]->block == b)\n+\t\t\t\tbreak;\n+\t}\n+\n+\treturn thread_id;\n+}\n+\n /**\n  * Enable a given pipeline to run on a specific DP thread.\n  *\n@@ -201,9 +261,87 @@ pipeline_disable(struct rte_swx_pipeline *p)\n \treturn;\n }\n \n+int\n+block_enable(block_run_f block_func, void *block, uint32_t thread_id)\n+{\n+\tstruct thread *t;\n+\tuint64_t n_blocks;\n+\n+\t/* Check input params */\n+\tif (!block_func || !block || thread_id >= RTE_MAX_LCORE)\n+\t\treturn -EINVAL;\n+\n+\tif (block_find(block) < RTE_MAX_LCORE)\n+\t\treturn -EEXIST;\n+\n+\tt = &threads[thread_id];\n+\tif (!t->enabled)\n+\t\treturn -EINVAL;\n+\n+\tn_blocks = t->n_blocks;\n+\n+\t/* Check there is room for at least one more block. */\n+\tif (n_blocks >= THREAD_BLOCKS_MAX)\n+\t\treturn -ENOSPC;\n+\n+\t/* Install the new block. */\n+\tt->blocks[n_blocks]->block_func = block_func;\n+\tt->blocks[n_blocks]->block = block;\n+\n+\trte_wmb();\n+\tt->n_blocks = n_blocks + 1;\n+\n+\treturn 0;\n+}\n+\n+void\n+block_disable(void *block)\n+{\n+\tstruct thread *t;\n+\tuint64_t n_blocks;\n+\tuint32_t thread_id, i;\n+\n+\t/* Check input params */\n+\tif (!block)\n+\t\treturn;\n+\n+\t/* Find the thread that runs this block. */\n+\tthread_id = block_find(block);\n+\tif (thread_id == RTE_MAX_LCORE)\n+\t\treturn;\n+\n+\tt = &threads[thread_id];\n+\tn_blocks = t->n_blocks;\n+\n+\tfor (i = 0; i < n_blocks; i++) {\n+\t\tstruct block *b = t->blocks[i];\n+\n+\t\tif (block != b->block)\n+\t\t\tcontinue;\n+\n+\t\tif (i < n_blocks - 1) {\n+\t\t\tstruct block *block_last = t->blocks[n_blocks - 1];\n+\n+\t\t\tt->blocks[i] = block_last;\n+\t\t}\n+\n+\t\trte_wmb();\n+\t\tt->n_blocks = n_blocks - 1;\n+\n+\t\trte_wmb();\n+\t\tt->blocks[n_blocks - 1] = b;\n+\n+\t\treturn;\n+\t}\n+\n+\treturn;\n+}\n+\n /**\n  * Data plane (DP) threads.\n  *\n+\n+\n  * The t->n_pipelines variable is modified by the CP thread every time changes to the t->pipeline[]\n  * array are operated, so it is therefore very important that the latest value of t->n_pipelines is\n  * read by the DP thread at the beginning of every new dispatch loop iteration, otherwise a stale\n@@ -229,6 +367,13 @@ thread_main(void *arg __rte_unused)\n \t\t/* Pipelines. */\n \t\tfor (i = 0; i < t->n_pipelines; i++)\n \t\t\trte_swx_pipeline_run(t->pipelines[i], PIPELINE_INSTR_QUANTA);\n+\n+\t\t/* Blocks. */\n+\t\tfor (i = 0; i < t->n_blocks; i++) {\n+\t\t\tstruct block *b = t->blocks[i];\n+\n+\t\t\tb->block_func(b->block);\n+\t\t}\n \t}\n \n \treturn 0;\ndiff --git a/examples/pipeline/thread.h b/examples/pipeline/thread.h\nindex 338d480abb..f2e643def5 100644\n--- a/examples/pipeline/thread.h\n+++ b/examples/pipeline/thread.h\n@@ -21,6 +21,15 @@ pipeline_enable(struct rte_swx_pipeline *p, uint32_t thread_id);\n void\n pipeline_disable(struct rte_swx_pipeline *p);\n \n+typedef void\n+(*block_run_f)(void *block);\n+\n+int\n+block_enable(block_run_f block_func, void *block, uint32_t thread_id);\n+\n+void\n+block_disable(void *block);\n+\n /**\n  * Data plane (DP) threads.\n  */\n",
    "prefixes": [
        "09/11"
    ]
}