Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/120024/?format=api
{ "id": 120024, "url": "http://patches.dpdk.org/api/patches/120024/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221122051308.194-1-getelson@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221122051308.194-1-getelson@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221122051308.194-1-getelson@nvidia.com", "date": "2022-11-22T05:13:06", "name": "[v2,1/2] net/mlx5: fix port private max LRO msg size", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": true, "hash": "7c138020d0f5c18a654105c17bd66bbeb71bfc8a", "submitter": { "id": 1882, "url": "http://patches.dpdk.org/api/people/1882/?format=api", "name": "Gregory Etelson", "email": "getelson@nvidia.com" }, "delegate": { "id": 3268, "url": "http://patches.dpdk.org/api/users/3268/?format=api", "username": "rasland", "first_name": "Raslan", "last_name": "Darawsheh", "email": "rasland@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221122051308.194-1-getelson@nvidia.com/mbox/", "series": [ { "id": 25844, "url": "http://patches.dpdk.org/api/series/25844/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25844", "date": "2022-11-22T05:13:06", "name": "[v2,1/2] net/mlx5: fix port private max LRO msg size", "version": 2, "mbox": "http://patches.dpdk.org/series/25844/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/120024/comments/", "check": "warning", "checks": "http://patches.dpdk.org/api/patches/120024/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 06FCFA0577;\n\tTue, 22 Nov 2022 06:13:40 +0100 (CET)", "from mails.dpdk.org (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id AFF954114B;\n\tTue, 22 Nov 2022 06:13:39 +0100 (CET)", "from NAM11-BN8-obe.outbound.protection.outlook.com\n (mail-bn8nam11on2040.outbound.protection.outlook.com [40.107.236.40])\n by mails.dpdk.org (Postfix) with ESMTP id 3D00640A80\n for <dev@dpdk.org>; Tue, 22 Nov 2022 06:13:38 +0100 (CET)", "from MW4PR04CA0207.namprd04.prod.outlook.com (2603:10b6:303:86::32)\n by SA3PR12MB7951.namprd12.prod.outlook.com (2603:10b6:806:318::8)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5834.11; Tue, 22 Nov\n 2022 05:13:36 +0000", "from CO1NAM11FT111.eop-nam11.prod.protection.outlook.com\n (2603:10b6:303:86:cafe::5f) by MW4PR04CA0207.outlook.office365.com\n (2603:10b6:303:86::32) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5834.15 via Frontend\n Transport; Tue, 22 Nov 2022 05:13:36 +0000", "from mail.nvidia.com (216.228.117.160) by\n CO1NAM11FT111.mail.protection.outlook.com (10.13.174.61) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.5834.8 via Frontend Transport; Tue, 22 Nov 2022 05:13:36 +0000", "from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com\n (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 21 Nov\n 2022 21:13:26 -0800", "from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com\n (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 21 Nov\n 2022 21:13:24 -0800" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=Oisl+NGKC5JwXLByTtx1w1isXsjdsR0A631FttsEfbmlMheFWZoJ1yNYzVVpwdU51cSrKw4njPpOYcEm3feHWrNmyRNx2OPtzmIBhYK1twaxESaXrtJcQTtc4jX0PGSYShmazpu9mgAGCOt5cLeJexClrNLpCM24gkODjPc7PjjAKbk92rLr8yLb1D6X2vGlCIl7SmtNS2IvvT3TgN6LYH5iPtLb9kvnJSFauiyQWNzjBiRtSNb309lI+xbjnMxCnPg4qBJTNJbwBCXsA91x1b67Vbcegi7sWeOXL5RKIVaVT6Q8AH/nnM15EBioM4B7IoXgO5djbImKgB3YiE2rfQ==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=kwNncp8WkyzCBieBtlkts3i9s6ixLop5H9yrjZ0TEdQ=;\n b=JisvV+bCVpgiO4UtzKpk9UjCht/1UqkvKxOLeW4sA61YAvMav8nYkT9Z2LqNe/Zlzhj9Gajx9BNoFCWa6461MS1ua7fm7SqIqDZ6Tu9WFl2dWtikINYXcziCVJGy433noOhy8i7bAENNMkMFzCJhkCdVknxKPGnGAnO05PUVzM02vnTMGGRPAP8uJicUfqI3yhQvw6B5FSnB5IXbY46H1qEMLRmhY35GVCHN9NbuHxQH4e7rxWszZbkWV0S6Q8Cx7MxHMDQoZfeMAcfKqvzlwEq/CDwxV93CoSpaEua8759/5qq2jO7AJaBAUwOTlQgj9LyhCGDFtSHrxWMPFb2jIA==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.117.160) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=kwNncp8WkyzCBieBtlkts3i9s6ixLop5H9yrjZ0TEdQ=;\n b=iNBGPf5/hMxuAcen8nayQCU41tXLeFCb3/2rqy68mKkADCJfdrGm6MWHJYgLPwTAqTet9H+EgNexlwXqVIYWtTEiYcndxudVfftlfoE1JkLmYv+CO1E6dIPLVfBZrDBCPEJxq+Qu3dTiOyR4bJd22C9tejY53OmbiUsTc/98UnT0BhKUAl35CRMCVW9ivJpIn9PWqhOf+VUsJSQu0jj9PBDIewe4pbVIWihDOOuUaGJjQSvK3j79Kfo3t1pQFe8zj72VJkmHvtC5csEq/lshRmcD9vS8fL0Xcnv3SFfPtWFbrhwuOwLybqFO9dLYsXGjR/3iQhMRK6/riD2xL56JbA==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.160)\n smtp.mailfrom=nvidia.com;\n dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.160 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C", "From": "Gregory Etelson <getelson@nvidia.com>", "To": "<dev@dpdk.org>", "CC": "<getelson@nvidia.com>, <matan@nvidia.com>, <rasland@nvidia.com>,\n Viacheslav Ovsiienko <viacheslavo@nvidia.com>", "Subject": "[PATCH v2 1/2] net/mlx5: fix port private max LRO msg size", "Date": "Tue, 22 Nov 2022 07:13:06 +0200", "Message-ID": "<20221122051308.194-1-getelson@nvidia.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20221117143901.27957-1-getelson@nvidia.com>", "References": "<20221117143901.27957-1-getelson@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail202.nvidia.com (10.129.68.7) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CO1NAM11FT111:EE_|SA3PR12MB7951:EE_", "X-MS-Office365-Filtering-Correlation-Id": "dcb9eca3-99f3-4c19-9e49-08dacc484f05", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n /VrUu6tuHXRFEOdx+lPKqwG7wMYsaNLXuDrF/dGgh2RXSTtgnMotQXsPnTmJeEBbmWgCr93dlCzH8ZjzZwbg+sEqdmTi9d/9VaiPR/TS8B8fuLXWbACMJmFOaWu+PC26PXja7qXITHn1fjde5HWLQrPo7Ieh+0mTQ5WlxPXoULxOXoBQOk4evKxUJolTrhrSes2cRngUiuUV08sGlft78ya4HwNn0EYcco2O/J3Ybz0n5sIo7UVZmSH+nzSJ5NwcWTEzy8Kg9WYGQrEdCHEOZkWO0/pxq0E3pYAQC2P6B4jhR5KvBpgzVtTKiB4gWq6N7SN1YRuxDbuMKrKSag40URnnlV4Vv6guDWDyGobS0sfgbS0YNye6ZSL0SFzBiT3GhA5e1kIo54Pu3N42uPMDsBu24wFNsIBZeiGRc5C8tQCBN3ypLRu0fW4IWw5cMPxaDOYlQv/BofGZ0FJ0yA9s+GyFXAUnoK91bWj6dkRX4/V/lmU7SRmqI2YoZeNpTS5MZ04qUP4N6YKXCWUfwYMINWeIlYjGYOQ+8Ij70kDDocS7embH/k5k3csf4XZzkNd8jlfyG3GyNuYs2F0L84fOTpBtsClu4a/dN0e9IVTd858fCTtoExTmMrCNI/YoPkFxxC8FY9/DCioJunF9Uh+3//br6bzcwWHTEnfxFoi1bFepK2/PV0fNlpbUA6zEKM6cx1MymdIq7BKrF7Wl3cN+cw==", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230022)(4636009)(396003)(346002)(376002)(39860400002)(136003)(451199015)(36840700001)(46966006)(40470700004)(70586007)(316002)(54906003)(8676002)(4326008)(70206006)(6916009)(186003)(107886003)(26005)(6286002)(2906002)(5660300002)(40460700003)(8936002)(36756003)(7696005)(478600001)(41300700001)(6666004)(55016003)(36860700001)(86362001)(40480700001)(83380400001)(82310400005)(1076003)(82740400003)(7636003)(16526019)(47076005)(336012)(2616005)(356005)(426003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "22 Nov 2022 05:13:36.0732 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n dcb9eca3-99f3-4c19-9e49-08dacc484f05", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT111.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SA3PR12MB7951", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The PMD analyzes each Rx queue maximal LRO size and selects one that\nfits all queues to configure TIR LRO attribute.\nTIR LRO attribute is number of 256 bytes chunks that match the\nselected maximal LRO size.\n\nPMD used `priv->max_lro_msg_size` for selected maximal LRO size and\nnumber of TIR chunks.\n\nFixes: b9f1f4c239 (\"net/mlx5: fix port initialization with small LRO\")\n\nSigned-off-by: Gregory Etelson <getelson@nvidia.com>\nAcked-by: Matan Azrad <matan@nvidia.com>\n---\n drivers/net/mlx5/mlx5.h | 2 +-\n drivers/net/mlx5/mlx5_devx.c | 3 ++-\n drivers/net/mlx5/mlx5_rxq.c | 4 +---\n 3 files changed, 4 insertions(+), 5 deletions(-)", "diff": "diff --git a/drivers/net/mlx5/mlx5.h b/drivers/net/mlx5/mlx5.h\nindex 02bee5808d..31982002ee 100644\n--- a/drivers/net/mlx5/mlx5.h\n+++ b/drivers/net/mlx5/mlx5.h\n@@ -1711,7 +1711,7 @@ struct mlx5_priv {\n \tuint32_t refcnt; /**< Reference counter. */\n \t/**< Verbs modify header action object. */\n \tuint8_t ft_type; /**< Flow table type, Rx or Tx. */\n-\tuint8_t max_lro_msg_size;\n+\tuint32_t max_lro_msg_size;\n \tuint32_t link_speed_capa; /* Link speed capabilities. */\n \tstruct mlx5_xstats_ctrl xstats_ctrl; /* Extended stats control. */\n \tstruct mlx5_stats_ctrl stats_ctrl; /* Stats control. */\ndiff --git a/drivers/net/mlx5/mlx5_devx.c b/drivers/net/mlx5/mlx5_devx.c\nindex c1305836cf..02deaac612 100644\n--- a/drivers/net/mlx5/mlx5_devx.c\n+++ b/drivers/net/mlx5/mlx5_devx.c\n@@ -870,7 +870,8 @@ mlx5_devx_tir_attr_set(struct rte_eth_dev *dev, const uint8_t *rss_key,\n \tif (lro) {\n \t\tMLX5_ASSERT(priv->sh->config.lro_allowed);\n \t\ttir_attr->lro_timeout_period_usecs = priv->config.lro_timeout;\n-\t\ttir_attr->lro_max_msg_sz = priv->max_lro_msg_size;\n+\t\ttir_attr->lro_max_msg_sz =\n+\t\t\tpriv->max_lro_msg_size / MLX5_LRO_SEG_CHUNK_SIZE;\n \t\ttir_attr->lro_enable_mask =\n \t\t\t\tMLX5_TIRC_LRO_ENABLE_MASK_IPV4_LRO |\n \t\t\t\tMLX5_TIRC_LRO_ENABLE_MASK_IPV6_LRO;\ndiff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c\nindex 724cd6c7e6..81aa3f074a 100644\n--- a/drivers/net/mlx5/mlx5_rxq.c\n+++ b/drivers/net/mlx5/mlx5_rxq.c\n@@ -1533,7 +1533,6 @@ mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,\n \t MLX5_MAX_TCP_HDR_OFFSET)\n \t\tmax_lro_size -= MLX5_MAX_TCP_HDR_OFFSET;\n \tmax_lro_size = RTE_MIN(max_lro_size, MLX5_MAX_LRO_SIZE);\n-\tmax_lro_size /= MLX5_LRO_SEG_CHUNK_SIZE;\n \tif (priv->max_lro_msg_size)\n \t\tpriv->max_lro_msg_size =\n \t\t\tRTE_MIN((uint32_t)priv->max_lro_msg_size, max_lro_size);\n@@ -1541,8 +1540,7 @@ mlx5_max_lro_msg_size_adjust(struct rte_eth_dev *dev, uint16_t idx,\n \t\tpriv->max_lro_msg_size = max_lro_size;\n \tDRV_LOG(DEBUG,\n \t\t\"port %u Rx Queue %u max LRO message size adjusted to %u bytes\",\n-\t\tdev->data->port_id, idx,\n-\t\tpriv->max_lro_msg_size * MLX5_LRO_SEG_CHUNK_SIZE);\n+\t\tdev->data->port_id, idx, priv->max_lro_msg_size);\n }\n \n /**\n", "prefixes": [ "v2", "1/2" ] }