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{
    "id": 118576,
    "url": "http://patches.dpdk.org/api/patches/118576/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221019141513.1969052-5-ktejasree@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221019141513.1969052-5-ktejasree@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221019141513.1969052-5-ktejasree@marvell.com",
    "date": "2022-10-19T14:15:04",
    "name": "[04/13] common/cnxk: support 103XX CPT",
    "commit_ref": null,
    "pull_url": null,
    "state": "accepted",
    "archived": true,
    "hash": "f83944166caf1b9c83272f42975fff2ca899250d",
    "submitter": {
        "id": 1789,
        "url": "http://patches.dpdk.org/api/people/1789/?format=api",
        "name": "Tejasree Kondoj",
        "email": "ktejasree@marvell.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221019141513.1969052-5-ktejasree@marvell.com/mbox/",
    "series": [
        {
            "id": 25309,
            "url": "http://patches.dpdk.org/api/series/25309/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25309",
            "date": "2022-10-19T14:15:02",
            "name": "[01/13] crypto/cnxk: fix length of AES-CMAC algo",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/25309/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/118576/comments/",
    "check": "success",
    "checks": "http://patches.dpdk.org/api/patches/118576/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
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        ],
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        "From": "Tejasree Kondoj <ktejasree@marvell.com>",
        "To": "Akhil Goyal <gakhil@marvell.com>",
        "CC": "Anoob Joseph <anoobj@marvell.com>, Vidya Sagar Velumuri\n <vvelumuri@marvell.com>, Pavan Nikhilesh <pbhagavatula@marvell.com>,\n \"Shijith Thotton\" <sthotton@marvell.com>, <dev@dpdk.org>",
        "Subject": "[PATCH 04/13] common/cnxk: support 103XX CPT",
        "Date": "Wed, 19 Oct 2022 19:45:04 +0530",
        "Message-ID": "<20221019141513.1969052-5-ktejasree@marvell.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20221019141513.1969052-1-ktejasree@marvell.com>",
        "References": "<20221019141513.1969052-1-ktejasree@marvell.com>",
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        "Content-Type": "text/plain",
        "X-Proofpoint-ORIG-GUID": "th9oBVsPUI0iMaJvlFHh9D8mDRMsmFgh",
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        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-10-19_08,2022-10-19_03,2022-06-22_01",
        "X-BeenThere": "dev@dpdk.org",
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        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
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        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Adding support for 103XX CPT.\n\nSigned-off-by: Tejasree Kondoj <ktejasree@marvell.com>\n---\n drivers/common/cnxk/hw/cpt.h              |   26 +-\n drivers/common/cnxk/roc_se.h              |   11 +\n drivers/crypto/cnxk/cn10k_cryptodev.c     |    2 +-\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c |   67 +-\n drivers/crypto/cnxk/cn10k_cryptodev_ops.h |    9 +-\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c  |    4 +-\n drivers/crypto/cnxk/cnxk_se.h             | 1602 +++++++++++----------\n drivers/crypto/cnxk/version.map           |    3 +-\n drivers/event/cnxk/cn10k_eventdev.c       |   13 +-\n 9 files changed, 926 insertions(+), 811 deletions(-)",
    "diff": "diff --git a/drivers/common/cnxk/hw/cpt.h b/drivers/common/cnxk/hw/cpt.h\nindex 3c87a0d1e4..ff5aa46f64 100644\n--- a/drivers/common/cnxk/hw/cpt.h\n+++ b/drivers/common/cnxk/hw/cpt.h\n@@ -157,6 +157,22 @@ union cpt_inst_w4 {\n \t} s;\n };\n \n+union cpt_inst_w5 {\n+\tuint64_t u64;\n+\tstruct {\n+\t\tuint64_t dptr : 60;\n+\t\tuint64_t gather_sz : 4;\n+\t} s;\n+};\n+\n+union cpt_inst_w6 {\n+\tuint64_t u64;\n+\tstruct {\n+\t\tuint64_t rptr : 60;\n+\t\tuint64_t scatter_sz : 4;\n+\t} s;\n+};\n+\n union cpt_inst_w7 {\n \tuint64_t u64;\n \tstruct {\n@@ -200,9 +216,15 @@ struct cpt_inst_s {\n \n \tunion cpt_inst_w4 w4;\n \n-\tuint64_t dptr;\n+\tunion {\n+\t\tunion cpt_inst_w5 w5;\n+\t\tuint64_t dptr;\n+\t};\n \n-\tuint64_t rptr;\n+\tunion {\n+\t\tunion cpt_inst_w6 w6;\n+\t\tuint64_t rptr;\n+\t};\n \n \tunion cpt_inst_w7 w7;\n };\ndiff --git a/drivers/common/cnxk/roc_se.h b/drivers/common/cnxk/roc_se.h\nindex e70a197d4f..c357c19c0b 100644\n--- a/drivers/common/cnxk/roc_se.h\n+++ b/drivers/common/cnxk/roc_se.h\n@@ -183,6 +183,17 @@ struct roc_se_sglist_comp {\n \tuint64_t ptr[4];\n };\n \n+struct roc_se_sg2list_comp {\n+\tunion {\n+\t\tuint64_t len;\n+\t\tstruct {\n+\t\t\tuint16_t len[3];\n+\t\t\tuint16_t valid_segs;\n+\t\t} s;\n+\t} u;\n+\tuint64_t ptr[3];\n+};\n+\n struct roc_se_enc_context {\n \tuint64_t iv_source : 1;\n \tuint64_t aes_key : 2;\ndiff --git a/drivers/crypto/cnxk/cn10k_cryptodev.c b/drivers/crypto/cnxk/cn10k_cryptodev.c\nindex db11ac7444..52de9b9657 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev.c\n@@ -99,7 +99,7 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,\n \tdev->driver_id = cn10k_cryptodev_driver_id;\n \tdev->feature_flags = cnxk_cpt_default_ff_get();\n \n-\tcn10k_cpt_set_enqdeq_fns(dev);\n+\tcn10k_cpt_set_enqdeq_fns(dev, vf);\n \tcn10k_sec_ops_override();\n \n \trte_cryptodev_pmd_probing_finish(dev);\ndiff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 2942617615..7dad370047 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -29,6 +29,7 @@ struct ops_burst {\n \tstruct cn10k_sso_hws *ws;\n \tstruct cnxk_cpt_qp *qp;\n \tuint16_t nb_ops;\n+\tbool is_sg_ver2;\n };\n \n /* Holds information required to send vector of operations */\n@@ -93,8 +94,8 @@ cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n }\n \n static inline int\n-cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],\n-\t\t    struct cpt_inst_s inst[], struct cpt_inflight_req *infl_req)\n+cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[], struct cpt_inst_s inst[],\n+\t\t    struct cpt_inflight_req *infl_req, const bool is_sg_ver2)\n {\n \tstruct cn10k_sec_session *sec_sess;\n \tstruct rte_crypto_asym_op *asym_op;\n@@ -126,8 +127,7 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],\n \t\t\tw7 = sec_sess->inst.w7;\n \t\t} else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tsess = CRYPTODEV_GET_SYM_SESS_PRIV(sym_op->session);\n-\t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req,\n-\t\t\t\t\t\t&inst[0]);\n+\t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, &inst[0], is_sg_ver2);\n \t\t\tif (unlikely(ret))\n \t\t\t\treturn 0;\n \t\t\tw7 = sess->cpt_inst_w7;\n@@ -138,8 +138,7 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],\n \t\t\t\treturn 0;\n \t\t\t}\n \n-\t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req,\n-\t\t\t\t\t\t&inst[0]);\n+\t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, &inst[0], is_sg_ver2);\n \t\t\tif (unlikely(ret)) {\n \t\t\t\tsym_session_clear(op->sym->session);\n \t\t\t\trte_mempool_put(qp->sess_mp, op->sym->session);\n@@ -177,7 +176,8 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],\n }\n \n static uint16_t\n-cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n+cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops,\n+\t\t\tconst bool is_sg_ver2)\n {\n \tuint64_t lmt_base, lmt_arg, io_addr;\n \tstruct cpt_inflight_req *infl_req;\n@@ -222,7 +222,7 @@ cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n \t\tinfl_req = &pend_q->req_queue[head];\n \t\tinfl_req->op_flags = 0;\n \n-\t\tret = cn10k_cpt_fill_inst(qp, ops + i, &inst[2 * i], infl_req);\n+\t\tret = cn10k_cpt_fill_inst(qp, ops + i, &inst[2 * i], infl_req, is_sg_ver2);\n \t\tif (unlikely(ret != 1)) {\n \t\t\tplt_dp_err(\"Could not process op: %p\", ops + i);\n \t\t\tif (i == 0)\n@@ -266,12 +266,22 @@ cn10k_cpt_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n \treturn count + i;\n }\n \n+static uint16_t\n+cn10k_cpt_sg_ver1_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n+{\n+\treturn cn10k_cpt_enqueue_burst(qptr, ops, nb_ops, false);\n+}\n+\n+static uint16_t\n+cn10k_cpt_sg_ver2_enqueue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n+{\n+\treturn cn10k_cpt_enqueue_burst(qptr, ops, nb_ops, true);\n+}\n+\n static int\n-cn10k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused,\n-\t\t\t\t      void *sess,\n+cn10k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused, void *sess,\n \t\t\t\t      enum rte_crypto_op_type op_type,\n-\t\t\t\t      enum rte_crypto_op_sess_type sess_type,\n-\t\t\t\t      void *mdata)\n+\t\t\t\t      enum rte_crypto_op_sess_type sess_type, void *mdata)\n {\n \tunion rte_event_crypto_metadata *ec_mdata = mdata;\n \tstruct rte_event *rsp_info;\n@@ -324,8 +334,7 @@ cn10k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused,\n }\n \n static inline int\n-cn10k_ca_meta_info_extract(struct rte_crypto_op *op,\n-\t\t\t struct cnxk_cpt_qp **qp, uint64_t *w2)\n+cn10k_ca_meta_info_extract(struct rte_crypto_op *op, struct cnxk_cpt_qp **qp, uint64_t *w2)\n {\n \tif (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n \t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n@@ -514,7 +523,7 @@ ca_lmtst_vec_submit(struct ops_burst *burst, struct vec_request vec_tbl[], uint1\n \t\tinfl_req = infl_reqs[i];\n \t\tinfl_req->op_flags = 0;\n \n-\t\tret = cn10k_cpt_fill_inst(qp, &burst->op[i], inst, infl_req);\n+\t\tret = cn10k_cpt_fill_inst(qp, &burst->op[i], inst, infl_req, burst->is_sg_ver2);\n \t\tif (unlikely(ret != 1)) {\n \t\t\tplt_cpt_dbg(\"Could not process op: %p\", burst->op[i]);\n \t\t\tif (i != 0)\n@@ -633,7 +642,7 @@ ca_lmtst_burst_submit(struct ops_burst *burst)\n \t\tinfl_req = infl_reqs[i];\n \t\tinfl_req->op_flags = 0;\n \n-\t\tret = cn10k_cpt_fill_inst(qp, &burst->op[i], inst, infl_req);\n+\t\tret = cn10k_cpt_fill_inst(qp, &burst->op[i], inst, infl_req, burst->is_sg_ver2);\n \t\tif (unlikely(ret != 1)) {\n \t\t\tplt_dp_dbg(\"Could not process op: %p\", burst->op[i]);\n \t\t\tif (i != 0)\n@@ -686,8 +695,9 @@ ca_lmtst_burst_submit(struct ops_burst *burst)\n \treturn i;\n }\n \n-uint16_t __rte_hot\n-cn10k_cpt_crypto_adapter_enqueue(void *ws, struct rte_event ev[], uint16_t nb_events)\n+static inline uint16_t __rte_hot\n+cn10k_cpt_crypto_adapter_enqueue(void *ws, struct rte_event ev[], uint16_t nb_events,\n+\t\t\t\t const bool is_sg_ver2)\n {\n \tuint16_t submitted, count = 0, vec_tbl_len = 0;\n \tstruct vec_request vec_tbl[nb_events];\n@@ -701,6 +711,7 @@ cn10k_cpt_crypto_adapter_enqueue(void *ws, struct rte_event ev[], uint16_t nb_ev\n \tburst.ws = ws;\n \tburst.qp = NULL;\n \tburst.nb_ops = 0;\n+\tburst.is_sg_ver2 = is_sg_ver2;\n \n \tfor (i = 0; i < nb_events; i++) {\n \t\top = ev[i].event_ptr;\n@@ -762,6 +773,18 @@ cn10k_cpt_crypto_adapter_enqueue(void *ws, struct rte_event ev[], uint16_t nb_ev\n \treturn count;\n }\n \n+uint16_t __rte_hot\n+cn10k_cpt_sg_ver1_crypto_adapter_enqueue(void *ws, struct rte_event ev[], uint16_t nb_events)\n+{\n+\treturn cn10k_cpt_crypto_adapter_enqueue(ws, ev, nb_events, false);\n+}\n+\n+uint16_t __rte_hot\n+cn10k_cpt_sg_ver2_crypto_adapter_enqueue(void *ws, struct rte_event ev[], uint16_t nb_events)\n+{\n+\treturn cn10k_cpt_crypto_adapter_enqueue(ws, ev, nb_events, true);\n+}\n+\n static inline void\n cn10k_cpt_sec_post_process(struct rte_crypto_op *cop, struct cpt_cn10k_res_s *res)\n {\n@@ -1012,9 +1035,13 @@ cn10k_cpt_dequeue_burst(void *qptr, struct rte_crypto_op **ops, uint16_t nb_ops)\n }\n \n void\n-cn10k_cpt_set_enqdeq_fns(struct rte_cryptodev *dev)\n+cn10k_cpt_set_enqdeq_fns(struct rte_cryptodev *dev, struct cnxk_cpt_vf *vf)\n {\n-\tdev->enqueue_burst = cn10k_cpt_enqueue_burst;\n+\tif (vf->cpt.cpt_revision > ROC_CPT_REVISION_ID_106XX)\n+\t\tdev->enqueue_burst = cn10k_cpt_sg_ver2_enqueue_burst;\n+\telse\n+\t\tdev->enqueue_burst = cn10k_cpt_sg_ver1_enqueue_burst;\n+\n \tdev->dequeue_burst = cn10k_cpt_dequeue_burst;\n \n \trte_mb();\ndiff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.h b/drivers/crypto/cnxk/cn10k_cryptodev_ops.h\nindex 8104310c30..3d7c6d195a 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.h\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.h\n@@ -9,12 +9,17 @@\n #include <rte_cryptodev.h>\n #include <rte_eventdev.h>\n \n+#include \"cnxk_cryptodev.h\"\n+\n extern struct rte_cryptodev_ops cn10k_cpt_ops;\n \n-void cn10k_cpt_set_enqdeq_fns(struct rte_cryptodev *dev);\n+void cn10k_cpt_set_enqdeq_fns(struct rte_cryptodev *dev, struct cnxk_cpt_vf *vf);\n \n __rte_internal\n-uint16_t __rte_hot cn10k_cpt_crypto_adapter_enqueue(void *ws, struct rte_event ev[],\n+uint16_t __rte_hot cn10k_cpt_sg_ver1_crypto_adapter_enqueue(void *ws, struct rte_event ev[],\n+\t\tuint16_t nb_events);\n+__rte_internal\n+uint16_t __rte_hot cn10k_cpt_sg_ver2_crypto_adapter_enqueue(void *ws, struct rte_event ev[],\n \t\tuint16_t nb_events);\n __rte_internal\n uintptr_t cn10k_cpt_crypto_adapter_dequeue(uintptr_t get_work1);\ndiff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nindex 289601330e..2a5c00eadd 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -91,7 +91,7 @@ cn9k_cpt_inst_prep(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n \t\tif (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tsym_op = op->sym;\n \t\t\tsess = CRYPTODEV_GET_SYM_SESS_PRIV(sym_op->session);\n-\t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, inst);\n+\t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, inst, false);\n \t\t\tinst->w7.u64 = sess->cpt_inst_w7;\n \t\t} else if (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION)\n \t\t\tret = cn9k_cpt_sec_inst_fill(op, infl_req, inst);\n@@ -102,7 +102,7 @@ cn9k_cpt_inst_prep(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n \t\t\t\treturn -1;\n \t\t\t}\n \n-\t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, inst);\n+\t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req, inst, false);\n \t\t\tif (unlikely(ret)) {\n \t\t\t\tsym_session_clear(op->sym->session);\n \t\t\t\trte_mempool_put(qp->sess_mp, op->sym->session);\ndiff --git a/drivers/crypto/cnxk/cnxk_se.h b/drivers/crypto/cnxk/cnxk_se.h\nindex c92e2cca2f..9ce75c07e0 100644\n--- a/drivers/crypto/cnxk/cnxk_se.h\n+++ b/drivers/crypto/cnxk/cnxk_se.h\n@@ -9,12 +9,10 @@\n #include \"cnxk_cryptodev.h\"\n #include \"cnxk_cryptodev_ops.h\"\n \n-#define SRC_IOV_SIZE                                                           \\\n-\t(sizeof(struct roc_se_iov_ptr) +                                       \\\n-\t (sizeof(struct roc_se_buf_ptr) * ROC_SE_MAX_SG_CNT))\n-#define DST_IOV_SIZE                                                           \\\n-\t(sizeof(struct roc_se_iov_ptr) +                                       \\\n-\t (sizeof(struct roc_se_buf_ptr) * ROC_SE_MAX_SG_CNT))\n+#define SRC_IOV_SIZE                                                                               \\\n+\t(sizeof(struct roc_se_iov_ptr) + (sizeof(struct roc_se_buf_ptr) * ROC_SE_MAX_SG_CNT))\n+#define DST_IOV_SIZE                                                                               \\\n+\t(sizeof(struct roc_se_iov_ptr) + (sizeof(struct roc_se_buf_ptr) * ROC_SE_MAX_SG_CNT))\n \n enum cpt_dp_thread_type {\n \tCPT_DP_THREAD_TYPE_FC_CHAIN = 0x1,\n@@ -319,9 +317,506 @@ fill_sg_comp_from_iov(struct roc_se_sglist_comp *list, uint32_t i,\n \treturn (uint32_t)i;\n }\n \n+static __rte_always_inline uint32_t\n+fill_sg2_comp(struct roc_se_sg2list_comp *list, uint32_t i, phys_addr_t dma_addr, uint32_t size)\n+{\n+\tstruct roc_se_sg2list_comp *to = &list[i / 3];\n+\n+\tto->u.s.len[i % 3] = (size);\n+\tto->ptr[i % 3] = (dma_addr);\n+\tto->u.s.valid_segs = (i % 3) + 1;\n+\ti++;\n+\treturn i;\n+}\n+\n+static __rte_always_inline uint32_t\n+fill_sg2_comp_from_buf(struct roc_se_sg2list_comp *list, uint32_t i, struct roc_se_buf_ptr *from)\n+{\n+\tstruct roc_se_sg2list_comp *to = &list[i / 3];\n+\n+\tto->u.s.len[i % 3] = (from->size);\n+\tto->ptr[i % 3] = ((uint64_t)from->vaddr);\n+\tto->u.s.valid_segs = (i % 3) + 1;\n+\ti++;\n+\treturn i;\n+}\n+\n+static __rte_always_inline uint32_t\n+fill_sg2_comp_from_buf_min(struct roc_se_sg2list_comp *list, uint32_t i,\n+\t\t\t   struct roc_se_buf_ptr *from, uint32_t *psize)\n+{\n+\tstruct roc_se_sg2list_comp *to = &list[i / 3];\n+\tuint32_t size = *psize;\n+\tuint32_t e_len;\n+\n+\te_len = (size > from->size) ? from->size : size;\n+\tto->u.s.len[i % 3] = (e_len);\n+\tto->ptr[i % 3] = ((uint64_t)from->vaddr);\n+\tto->u.s.valid_segs = (i % 3) + 1;\n+\t*psize -= e_len;\n+\ti++;\n+\treturn i;\n+}\n+\n+static __rte_always_inline uint32_t\n+fill_sg2_comp_from_iov(struct roc_se_sg2list_comp *list, uint32_t i, struct roc_se_iov_ptr *from,\n+\t\t       uint32_t from_offset, uint32_t *psize, struct roc_se_buf_ptr *extra_buf,\n+\t\t       uint32_t extra_offset)\n+{\n+\tint32_t j;\n+\tuint32_t extra_len = extra_buf ? extra_buf->size : 0;\n+\tuint32_t size = *psize;\n+\n+\tfor (j = 0; (j < from->buf_cnt) && size; j++) {\n+\t\tstruct roc_se_sg2list_comp *to = &list[i / 3];\n+\t\tuint32_t buf_sz = from->bufs[j].size;\n+\t\tvoid *vaddr = from->bufs[j].vaddr;\n+\t\tuint64_t e_vaddr;\n+\t\tuint32_t e_len;\n+\n+\t\tif (unlikely(from_offset)) {\n+\t\t\tif (from_offset >= buf_sz) {\n+\t\t\t\tfrom_offset -= buf_sz;\n+\t\t\t\tcontinue;\n+\t\t\t}\n+\t\t\te_vaddr = (uint64_t)vaddr + from_offset;\n+\t\t\te_len = (size > (buf_sz - from_offset)) ? (buf_sz - from_offset) : size;\n+\t\t\tfrom_offset = 0;\n+\t\t} else {\n+\t\t\te_vaddr = (uint64_t)vaddr;\n+\t\t\te_len = (size > buf_sz) ? buf_sz : size;\n+\t\t}\n+\n+\t\tto->u.s.len[i % 3] = (e_len);\n+\t\tto->ptr[i % 3] = (e_vaddr);\n+\t\tto->u.s.valid_segs = (i % 3) + 1;\n+\n+\t\tif (extra_len && (e_len >= extra_offset)) {\n+\t\t\t/* Break the data at given offset */\n+\t\t\tuint32_t next_len = e_len - extra_offset;\n+\t\t\tuint64_t next_vaddr = e_vaddr + extra_offset;\n+\n+\t\t\tif (!extra_offset) {\n+\t\t\t\ti--;\n+\t\t\t} else {\n+\t\t\t\te_len = extra_offset;\n+\t\t\t\tsize -= e_len;\n+\t\t\t\tto->u.s.len[i % 3] = (e_len);\n+\t\t\t}\n+\n+\t\t\textra_len = RTE_MIN(extra_len, size);\n+\t\t\t/* Insert extra data ptr */\n+\t\t\tif (extra_len) {\n+\t\t\t\ti++;\n+\t\t\t\tto = &list[i / 3];\n+\t\t\t\tto->u.s.len[i % 3] = (extra_len);\n+\t\t\t\tto->ptr[i % 3] = ((uint64_t)extra_buf->vaddr);\n+\t\t\t\tto->u.s.valid_segs = (i % 3) + 1;\n+\t\t\t\tsize -= extra_len;\n+\t\t\t}\n+\n+\t\t\tnext_len = RTE_MIN(next_len, size);\n+\t\t\t/* insert the rest of the data */\n+\t\t\tif (next_len) {\n+\t\t\t\ti++;\n+\t\t\t\tto = &list[i / 3];\n+\t\t\t\tto->u.s.len[i % 3] = (next_len);\n+\t\t\t\tto->ptr[i % 3] = (next_vaddr);\n+\t\t\t\tto->u.s.valid_segs = (i % 3) + 1;\n+\t\t\t\tsize -= next_len;\n+\t\t\t}\n+\t\t\textra_len = 0;\n+\n+\t\t} else {\n+\t\t\tsize -= e_len;\n+\t\t}\n+\t\tif (extra_offset)\n+\t\t\textra_offset -= size;\n+\t\ti++;\n+\t}\n+\n+\t*psize = size;\n+\treturn (uint32_t)i;\n+}\n+\n+static __rte_always_inline int\n+sg_inst_prep(struct roc_se_fc_params *params, struct cpt_inst_s *inst, uint64_t offset_ctrl,\n+\t     uint8_t *iv_s, int iv_len, uint8_t pack_iv, uint8_t pdcp_alg_type, int32_t inputlen,\n+\t     int32_t outputlen, uint32_t passthrough_len, uint32_t req_flags, int pdcp_flag,\n+\t     int decrypt)\n+{\n+\tvoid *m_vaddr = params->meta_buf.vaddr;\n+\tstruct roc_se_sglist_comp *gather_comp;\n+\tstruct roc_se_sglist_comp *scatter_comp;\n+\tstruct roc_se_buf_ptr *aad_buf = NULL;\n+\tuint32_t mac_len = 0, aad_len = 0;\n+\tstruct roc_se_ctx *se_ctx;\n+\tuint32_t i, g_size_bytes;\n+\tuint64_t *offset_vaddr;\n+\tuint32_t s_size_bytes;\n+\tuint8_t *in_buffer;\n+\tint zsk_flags;\n+\tuint32_t size;\n+\tuint8_t *iv_d;\n+\n+\tse_ctx = params->ctx;\n+\tzsk_flags = se_ctx->zsk_flags;\n+\tmac_len = se_ctx->mac_len;\n+\n+\tif (unlikely(req_flags & ROC_SE_VALID_AAD_BUF)) {\n+\t\t/* We don't support both AAD and auth data separately */\n+\t\taad_len = params->aad_buf.size;\n+\t\taad_buf = &params->aad_buf;\n+\t}\n+\n+\t/* save space for iv */\n+\toffset_vaddr = m_vaddr;\n+\n+\tm_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + RTE_ALIGN_CEIL(iv_len, 8);\n+\n+\tinst->w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;\n+\n+\t/* iv offset is 0 */\n+\t*offset_vaddr = offset_ctrl;\n+\n+\tiv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN);\n+\n+\tif (pdcp_flag) {\n+\t\tif (likely(iv_len))\n+\t\t\tpdcp_iv_copy(iv_d, iv_s, pdcp_alg_type, pack_iv);\n+\t} else {\n+\t\tif (likely(iv_len))\n+\t\t\tmemcpy(iv_d, iv_s, iv_len);\n+\t}\n+\n+\t/* DPTR has SG list */\n+\n+\t/* TODO Add error check if space will be sufficient */\n+\tgather_comp = (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);\n+\n+\t/*\n+\t * Input Gather List\n+\t */\n+\ti = 0;\n+\n+\t/* Offset control word followed by iv */\n+\n+\ti = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr, ROC_SE_OFF_CTRL_LEN + iv_len);\n+\n+\t/* Add input data */\n+\tif (decrypt && (req_flags & ROC_SE_VALID_MAC_BUF)) {\n+\t\tsize = inputlen - iv_len - mac_len;\n+\t\tif (likely(size)) {\n+\t\t\tuint32_t aad_offset = aad_len ? passthrough_len : 0;\n+\t\t\t/* input data only */\n+\t\t\tif (unlikely(req_flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n+\t\t\t\ti = fill_sg_comp_from_buf_min(gather_comp, i, params->bufs, &size);\n+\t\t\t} else {\n+\t\t\t\ti = fill_sg_comp_from_iov(gather_comp, i, params->src_iov, 0, &size,\n+\t\t\t\t\t\t\t  aad_buf, aad_offset);\n+\t\t\t}\n+\t\t\tif (unlikely(size)) {\n+\t\t\t\tplt_dp_err(\"Insufficient buffer\"\n+\t\t\t\t\t   \" space, size %d needed\",\n+\t\t\t\t\t   size);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\n+\t\tif (mac_len)\n+\t\t\ti = fill_sg_comp_from_buf(gather_comp, i, &params->mac_buf);\n+\t} else {\n+\t\t/* input data */\n+\t\tsize = inputlen - iv_len;\n+\t\tif (size) {\n+\t\t\tuint32_t aad_offset = aad_len ? passthrough_len : 0;\n+\t\t\tif (unlikely(req_flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n+\t\t\t\ti = fill_sg_comp_from_buf_min(gather_comp, i, params->bufs, &size);\n+\t\t\t} else {\n+\t\t\t\ti = fill_sg_comp_from_iov(gather_comp, i, params->src_iov, 0, &size,\n+\t\t\t\t\t\t\t  aad_buf, aad_offset);\n+\t\t\t}\n+\t\t\tif (unlikely(size)) {\n+\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n+\t\t\t\t\t   \" size %d needed\",\n+\t\t\t\t\t   size);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tin_buffer = m_vaddr;\n+\n+\t((uint16_t *)in_buffer)[0] = 0;\n+\t((uint16_t *)in_buffer)[1] = 0;\n+\t((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);\n+\n+\tg_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n+\t/*\n+\t * Output Scatter List\n+\t */\n+\n+\ti = 0;\n+\tscatter_comp = (struct roc_se_sglist_comp *)((uint8_t *)gather_comp + g_size_bytes);\n+\n+\tif (zsk_flags == 0x1) {\n+\t\t/* IV in SLIST only for EEA3 & UEA2 or for F8 */\n+\t\tiv_len = 0;\n+\t}\n+\n+\tif (iv_len) {\n+\t\ti = fill_sg_comp(scatter_comp, i, (uint64_t)offset_vaddr + ROC_SE_OFF_CTRL_LEN,\n+\t\t\t\t iv_len);\n+\t}\n+\n+\t/* Add output data */\n+\tif ((!decrypt) && (req_flags & ROC_SE_VALID_MAC_BUF)) {\n+\t\tsize = outputlen - iv_len - mac_len;\n+\t\tif (size) {\n+\n+\t\t\tuint32_t aad_offset = aad_len ? passthrough_len : 0;\n+\n+\t\t\tif (unlikely(req_flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n+\t\t\t\ti = fill_sg_comp_from_buf_min(scatter_comp, i, params->bufs, &size);\n+\t\t\t} else {\n+\t\t\t\ti = fill_sg_comp_from_iov(scatter_comp, i, params->dst_iov, 0,\n+\t\t\t\t\t\t\t  &size, aad_buf, aad_offset);\n+\t\t\t}\n+\t\t\tif (unlikely(size)) {\n+\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n+\t\t\t\t\t   \" size %d needed\",\n+\t\t\t\t\t   size);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\n+\t\t/* mac data */\n+\t\tif (mac_len)\n+\t\t\ti = fill_sg_comp_from_buf(scatter_comp, i, &params->mac_buf);\n+\t} else {\n+\t\t/* Output including mac */\n+\t\tsize = outputlen - iv_len;\n+\t\tif (size) {\n+\t\t\tuint32_t aad_offset = aad_len ? passthrough_len : 0;\n+\n+\t\t\tif (unlikely(req_flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n+\t\t\t\ti = fill_sg_comp_from_buf_min(scatter_comp, i, params->bufs, &size);\n+\t\t\t} else {\n+\t\t\t\ti = fill_sg_comp_from_iov(scatter_comp, i, params->dst_iov, 0,\n+\t\t\t\t\t\t\t  &size, aad_buf, aad_offset);\n+\t\t\t}\n+\n+\t\t\tif (unlikely(size)) {\n+\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n+\t\t\t\t\t   \" size %d needed\",\n+\t\t\t\t\t   size);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\t}\n+\t((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);\n+\ts_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n+\n+\tsize = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;\n+\n+\t/* This is DPTR len in case of SG mode */\n+\tinst->w4.s.dlen = size;\n+\n+\tinst->dptr = (uint64_t)in_buffer;\n+\treturn 0;\n+}\n+\n+static __rte_always_inline int\n+sg2_inst_prep(struct roc_se_fc_params *params, struct cpt_inst_s *inst, uint64_t offset_ctrl,\n+\t      uint8_t *iv_s, int iv_len, uint8_t pack_iv, uint8_t pdcp_alg_type, int32_t inputlen,\n+\t      int32_t outputlen, uint32_t passthrough_len, uint32_t req_flags, int pdcp_flag,\n+\t      int decrypt)\n+{\n+\tvoid *m_vaddr = params->meta_buf.vaddr;\n+\tuint32_t i, g_size_bytes;\n+\tstruct roc_se_sg2list_comp *gather_comp;\n+\tstruct roc_se_sg2list_comp *scatter_comp;\n+\tstruct roc_se_buf_ptr *aad_buf = NULL;\n+\tstruct roc_se_ctx *se_ctx;\n+\tuint64_t *offset_vaddr;\n+\tuint32_t mac_len = 0, aad_len = 0;\n+\tint zsk_flags;\n+\tuint32_t size;\n+\tunion cpt_inst_w5 cpt_inst_w5;\n+\tunion cpt_inst_w6 cpt_inst_w6;\n+\tuint8_t *iv_d;\n+\n+\tse_ctx = params->ctx;\n+\tzsk_flags = se_ctx->zsk_flags;\n+\tmac_len = se_ctx->mac_len;\n+\n+\tif (unlikely(req_flags & ROC_SE_VALID_AAD_BUF)) {\n+\t\t/* We don't support both AAD and auth data separately */\n+\t\taad_len = params->aad_buf.size;\n+\t\taad_buf = &params->aad_buf;\n+\t}\n+\n+\t/* save space for iv */\n+\toffset_vaddr = m_vaddr;\n+\n+\tm_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + RTE_ALIGN_CEIL(iv_len, 8);\n+\n+\tinst->w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;\n+\n+\t/* iv offset is 0 */\n+\t*offset_vaddr = offset_ctrl;\n+\n+\tiv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN);\n+\tif (pdcp_flag) {\n+\t\tif (likely(iv_len))\n+\t\t\tpdcp_iv_copy(iv_d, iv_s, pdcp_alg_type, pack_iv);\n+\t} else {\n+\t\tif (likely(iv_len))\n+\t\t\tmemcpy(iv_d, iv_s, iv_len);\n+\t}\n+\n+\t/* DPTR has SG list */\n+\n+\t/* TODO Add error check if space will be sufficient */\n+\tgather_comp = (struct roc_se_sg2list_comp *)((uint8_t *)m_vaddr);\n+\n+\t/*\n+\t * Input Gather List\n+\t */\n+\ti = 0;\n+\n+\t/* Offset control word followed by iv */\n+\n+\ti = fill_sg2_comp(gather_comp, i, (uint64_t)offset_vaddr, ROC_SE_OFF_CTRL_LEN + iv_len);\n+\n+\t/* Add input data */\n+\tif (decrypt && (req_flags & ROC_SE_VALID_MAC_BUF)) {\n+\t\tsize = inputlen - iv_len - mac_len;\n+\t\tif (size) {\n+\t\t\t/* input data only */\n+\t\t\tif (unlikely(req_flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n+\t\t\t\ti = fill_sg2_comp_from_buf_min(gather_comp, i, params->bufs, &size);\n+\t\t\t} else {\n+\t\t\t\tuint32_t aad_offset = aad_len ? passthrough_len : 0;\n+\n+\t\t\t\ti = fill_sg2_comp_from_iov(gather_comp, i, params->src_iov, 0,\n+\t\t\t\t\t\t\t   &size, aad_buf, aad_offset);\n+\t\t\t}\n+\t\t\tif (unlikely(size)) {\n+\t\t\t\tplt_dp_err(\"Insufficient buffer\"\n+\t\t\t\t\t   \" space, size %d needed\",\n+\t\t\t\t\t   size);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\n+\t\t/* mac data */\n+\t\tif (mac_len)\n+\t\t\ti = fill_sg2_comp_from_buf(gather_comp, i, &params->mac_buf);\n+\t} else {\n+\t\t/* input data */\n+\t\tsize = inputlen - iv_len;\n+\t\tif (size) {\n+\t\t\tuint32_t aad_offset = aad_len ? passthrough_len : 0;\n+\t\t\tif (unlikely(req_flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n+\t\t\t\ti = fill_sg2_comp_from_buf_min(gather_comp, i, params->bufs, &size);\n+\t\t\t} else {\n+\t\t\t\ti = fill_sg2_comp_from_iov(gather_comp, i, params->src_iov, 0,\n+\t\t\t\t\t\t\t   &size, aad_buf, aad_offset);\n+\t\t\t}\n+\t\t\tif (unlikely(size)) {\n+\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n+\t\t\t\t\t   \" size %d needed\",\n+\t\t\t\t\t   size);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tcpt_inst_w5.s.gather_sz = ((i + 2) / 3);\n+\n+\tg_size_bytes = ((i + 2) / 3) * sizeof(struct roc_se_sg2list_comp);\n+\t/*\n+\t * Output Scatter List\n+\t */\n+\n+\ti = 0;\n+\tscatter_comp = (struct roc_se_sg2list_comp *)((uint8_t *)gather_comp + g_size_bytes);\n+\n+\tif (zsk_flags == 0x1) {\n+\t\t/* IV in SLIST only for EEA3 & UEA2 or for F8 */\n+\t\tiv_len = 0;\n+\t}\n+\n+\tif (iv_len) {\n+\t\ti = fill_sg2_comp(scatter_comp, i, (uint64_t)offset_vaddr + ROC_SE_OFF_CTRL_LEN,\n+\t\t\t\t  iv_len);\n+\t}\n+\n+\t/* Add output data */\n+\tif ((!decrypt) && (req_flags & ROC_SE_VALID_MAC_BUF)) {\n+\t\tsize = outputlen - iv_len - mac_len;\n+\t\tif (size) {\n+\n+\t\t\tuint32_t aad_offset = aad_len ? passthrough_len : 0;\n+\n+\t\t\tif (unlikely(req_flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n+\t\t\t\ti = fill_sg2_comp_from_buf_min(scatter_comp, i, params->bufs,\n+\t\t\t\t\t\t\t       &size);\n+\t\t\t} else {\n+\t\t\t\ti = fill_sg2_comp_from_iov(scatter_comp, i, params->dst_iov, 0,\n+\t\t\t\t\t\t\t   &size, aad_buf, aad_offset);\n+\t\t\t}\n+\t\t\tif (unlikely(size)) {\n+\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n+\t\t\t\t\t   \" size %d needed\",\n+\t\t\t\t\t   size);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\n+\t\t/* mac data */\n+\t\tif (mac_len)\n+\t\t\ti = fill_sg2_comp_from_buf(scatter_comp, i, &params->mac_buf);\n+\t} else {\n+\t\t/* Output including mac */\n+\t\tsize = outputlen - iv_len;\n+\t\tif (size) {\n+\t\t\tuint32_t aad_offset = aad_len ? passthrough_len : 0;\n+\n+\t\t\tif (unlikely(req_flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n+\t\t\t\ti = fill_sg2_comp_from_buf_min(scatter_comp, i, params->bufs,\n+\t\t\t\t\t\t\t       &size);\n+\t\t\t} else {\n+\t\t\t\ti = fill_sg2_comp_from_iov(scatter_comp, i, params->dst_iov, 0,\n+\t\t\t\t\t\t\t   &size, aad_buf, aad_offset);\n+\t\t\t}\n+\n+\t\t\tif (unlikely(size)) {\n+\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n+\t\t\t\t\t   \" size %d needed\",\n+\t\t\t\t\t   size);\n+\t\t\t\treturn -1;\n+\t\t\t}\n+\t\t}\n+\t}\n+\n+\tcpt_inst_w6.s.scatter_sz = ((i + 2) / 3);\n+\n+\t/* This is DPTR len in case of SG mode */\n+\tinst->w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;\n+\n+\tcpt_inst_w5.s.dptr = (uint64_t)gather_comp;\n+\tcpt_inst_w6.s.rptr = (uint64_t)scatter_comp;\n+\n+\tinst->w5.u64 = cpt_inst_w5.u64;\n+\tinst->w6.u64 = cpt_inst_w6.u64;\n+\treturn 0;\n+}\n+\n static __rte_always_inline int\n-cpt_digest_gen_prep(uint32_t flags, uint64_t d_lens,\n-\t\t    struct roc_se_fc_params *params, struct cpt_inst_s *inst)\n+cpt_digest_gen_sg_ver1_prep(uint32_t flags, uint64_t d_lens, struct roc_se_fc_params *params,\n+\t\t\t    struct cpt_inst_s *inst)\n {\n \tvoid *m_vaddr = params->meta_buf.vaddr;\n \tuint32_t size, i;\n@@ -449,23 +944,145 @@ cpt_digest_gen_prep(uint32_t flags, uint64_t d_lens,\n \treturn 0;\n }\n \n+static __rte_always_inline int\n+cpt_digest_gen_sg_ver2_prep(uint32_t flags, uint64_t d_lens, struct roc_se_fc_params *params,\n+\t\t\t    struct cpt_inst_s *inst)\n+{\n+\tvoid *m_vaddr = params->meta_buf.vaddr;\n+\tuint32_t size, i;\n+\tuint16_t data_len, mac_len, key_len;\n+\troc_se_auth_type hash_type;\n+\tstruct roc_se_ctx *ctx;\n+\tstruct roc_se_sg2list_comp *gather_comp;\n+\tstruct roc_se_sg2list_comp *scatter_comp;\n+\tunion cpt_inst_w5 cpt_inst_w5;\n+\tunion cpt_inst_w6 cpt_inst_w6;\n+\tuint32_t g_size_bytes;\n+\tunion cpt_inst_w4 cpt_inst_w4;\n+\n+\tctx = params->ctx;\n+\n+\thash_type = ctx->hash_type;\n+\tmac_len = ctx->mac_len;\n+\tkey_len = ctx->auth_key_len;\n+\tdata_len = ROC_SE_AUTH_DLEN(d_lens);\n+\n+\t/*GP op header */\n+\tcpt_inst_w4.s.opcode_minor = 0;\n+\tcpt_inst_w4.s.param2 = ((uint16_t)hash_type << 8);\n+\tif (ctx->hmac) {\n+\t\tcpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_HMAC;\n+\t\tcpt_inst_w4.s.param1 = key_len;\n+\t\tcpt_inst_w4.s.dlen = data_len + RTE_ALIGN_CEIL(key_len, 8);\n+\t} else {\n+\t\tcpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_HASH;\n+\t\tcpt_inst_w4.s.param1 = 0;\n+\t\tcpt_inst_w4.s.dlen = data_len;\n+\t}\n+\n+\t/* Null auth only case enters the if */\n+\tif (unlikely(!hash_type && !ctx->enc_cipher)) {\n+\t\tcpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_MISC;\n+\t\t/* Minor op is passthrough */\n+\t\tcpt_inst_w4.s.opcode_minor = 0x03;\n+\t\t/* Send out completion code only */\n+\t\tcpt_inst_w4.s.param2 = 0x1;\n+\t}\n+\n+\t/* DPTR has SG list */\n+\n+\t/* TODO Add error check if space will be sufficient */\n+\tgather_comp = (struct roc_se_sg2list_comp *)((uint8_t *)m_vaddr + 0);\n+\n+\t/*\n+\t * Input gather list\n+\t */\n+\n+\ti = 0;\n+\n+\tif (ctx->hmac) {\n+\t\tuint64_t k_vaddr = (uint64_t)ctx->auth_key;\n+\t\t/* Key */\n+\t\ti = fill_sg2_comp(gather_comp, i, k_vaddr, RTE_ALIGN_CEIL(key_len, 8));\n+\t}\n+\n+\t/* input data */\n+\tsize = data_len;\n+\tif (size) {\n+\t\ti = fill_sg2_comp_from_iov(gather_comp, i, params->src_iov, 0, &size, NULL, 0);\n+\t\tif (unlikely(size)) {\n+\t\t\tplt_dp_err(\"Insufficient dst IOV size, short by %dB\", size);\n+\t\t\treturn -1;\n+\t\t}\n+\t} else {\n+\t\t/*\n+\t\t * Looks like we need to support zero data\n+\t\t * gather ptr in case of hash & hmac\n+\t\t */\n+\t\ti++;\n+\t}\n+\tcpt_inst_w5.s.gather_sz = ((i + 2) / 3);\n+\n+\tg_size_bytes = ((i + 2) / 3) * sizeof(struct roc_se_sg2list_comp);\n+\n+\t/*\n+\t * Output Gather list\n+\t */\n+\n+\ti = 0;\n+\tscatter_comp = (struct roc_se_sg2list_comp *)((uint8_t *)gather_comp + g_size_bytes);\n+\n+\tif (flags & ROC_SE_VALID_MAC_BUF) {\n+\t\tif (unlikely(params->mac_buf.size < mac_len)) {\n+\t\t\tplt_dp_err(\"Insufficient MAC size\");\n+\t\t\treturn -1;\n+\t\t}\n+\n+\t\tsize = mac_len;\n+\t\ti = fill_sg2_comp_from_buf_min(scatter_comp, i, &params->mac_buf, &size);\n+\t} else {\n+\t\tsize = mac_len;\n+\t\ti = fill_sg2_comp_from_iov(scatter_comp, i, params->src_iov, data_len, &size, NULL,\n+\t\t\t\t\t   0);\n+\t\tif (unlikely(size)) {\n+\t\t\tplt_dp_err(\"Insufficient dst IOV size, short by %dB\", size);\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n+\n+\tcpt_inst_w6.s.scatter_sz = ((i + 2) / 3);\n+\n+\tcpt_inst_w5.s.dptr = (uint64_t)gather_comp;\n+\tcpt_inst_w6.s.rptr = (uint64_t)scatter_comp;\n+\n+\tinst->w5.u64 = cpt_inst_w5.u64;\n+\tinst->w6.u64 = cpt_inst_w6.u64;\n+\n+\tinst->w4.u64 = cpt_inst_w4.u64;\n+\n+\treturn 0;\n+}\n+\n static __rte_always_inline int\n cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n-\t\t  struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst)\n+\t\t  struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst,\n+\t\t  const bool is_sg_ver2)\n {\n \tuint32_t iv_offset = 0;\n \tint32_t inputlen, outputlen, enc_dlen, auth_dlen;\n \tstruct roc_se_ctx *se_ctx;\n \tuint32_t cipher_type, hash_type;\n-\tuint32_t mac_len, size;\n+\tuint32_t mac_len;\n \tuint8_t iv_len = 16;\n-\tstruct roc_se_buf_ptr *aad_buf = NULL;\n \tuint32_t encr_offset, auth_offset;\n+\tuint64_t offset_ctrl;\n \tuint32_t encr_data_len, auth_data_len, aad_len = 0;\n \tuint32_t passthrough_len = 0;\n \tunion cpt_inst_w4 cpt_inst_w4;\n \tvoid *offset_vaddr;\n \tuint8_t op_minor;\n+\tuint8_t *src = NULL;\n+\tint ret;\n \n \tencr_offset = ROC_SE_ENCR_OFFSET(d_offs);\n \tauth_offset = ROC_SE_AUTH_OFFSET(d_offs);\n@@ -476,7 +1093,6 @@ cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n \t\tauth_data_len = 0;\n \t\tauth_offset = 0;\n \t\taad_len = fc_params->aad_buf.size;\n-\t\taad_buf = &fc_params->aad_buf;\n \t}\n \n \tse_ctx = fc_params->ctx;\n@@ -550,6 +1166,17 @@ cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n \tcpt_inst_w4.s.param1 = encr_data_len;\n \tcpt_inst_w4.s.param2 = auth_data_len;\n \n+\tif (unlikely((encr_offset >> 16) || (iv_offset >> 8) || (auth_offset >> 8))) {\n+\t\tplt_dp_err(\"Offset not supported\");\n+\t\tplt_dp_err(\"enc_offset: %d\", encr_offset);\n+\t\tplt_dp_err(\"iv_offset : %d\", iv_offset);\n+\t\tplt_dp_err(\"auth_offset: %d\", auth_offset);\n+\t\treturn -1;\n+\t}\n+\n+\toffset_ctrl = rte_cpu_to_be_64(((uint64_t)encr_offset << 16) | ((uint64_t)iv_offset << 8) |\n+\t\t\t\t       ((uint64_t)auth_offset));\n+\n \t/*\n \t * In cn9k, cn10k since we have a limitation of\n \t * IV & Offset control word not part of instruction\n@@ -562,8 +1189,11 @@ cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n \n \t\t/* Use Direct mode */\n \n-\t\toffset_vaddr =\n-\t\t\t(uint8_t *)dm_vaddr - ROC_SE_OFF_CTRL_LEN - iv_len;\n+\t\toffset_vaddr = (uint8_t *)dm_vaddr - ROC_SE_OFF_CTRL_LEN - iv_len;\n+\n+\t\t*(uint64_t *)offset_vaddr =\n+\t\t\trte_cpu_to_be_64(((uint64_t)encr_offset << 16) |\n+\t\t\t\t\t ((uint64_t)iv_offset << 8) | ((uint64_t)auth_offset));\n \n \t\t/* DPTR */\n \t\tinst->dptr = (uint64_t)offset_vaddr;\n@@ -571,199 +1201,58 @@ cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n \t\t/* RPTR should just exclude offset control word */\n \t\tinst->rptr = (uint64_t)dm_vaddr - iv_len;\n \n-\t\tcpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;\n-\n-\t\tif (likely(iv_len)) {\n-\t\t\tuint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +\n-\t\t\t\t\t\t      ROC_SE_OFF_CTRL_LEN);\n-\t\t\tuint64_t *src = fc_params->iv_buf;\n-\t\t\tdest[0] = src[0];\n-\t\t\tdest[1] = src[1];\n-\t\t}\n-\n-\t} else {\n-\t\tvoid *m_vaddr = fc_params->meta_buf.vaddr;\n-\t\tuint32_t i, g_size_bytes, s_size_bytes;\n-\t\tstruct roc_se_sglist_comp *gather_comp;\n-\t\tstruct roc_se_sglist_comp *scatter_comp;\n-\t\tuint8_t *in_buffer;\n-\n-\t\t/* This falls under strict SG mode */\n-\t\toffset_vaddr = m_vaddr;\n-\t\tsize = ROC_SE_OFF_CTRL_LEN + iv_len;\n-\n-\t\tm_vaddr = (uint8_t *)m_vaddr + size;\n-\n-\t\tcpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;\n-\n-\t\tif (likely(iv_len)) {\n-\t\t\tuint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +\n-\t\t\t\t\t\t      ROC_SE_OFF_CTRL_LEN);\n-\t\t\tuint64_t *src = fc_params->iv_buf;\n-\t\t\tdest[0] = src[0];\n-\t\t\tdest[1] = src[1];\n-\t\t}\n-\n-\t\t/* DPTR has SG list */\n-\t\tin_buffer = m_vaddr;\n-\n-\t\t((uint16_t *)in_buffer)[0] = 0;\n-\t\t((uint16_t *)in_buffer)[1] = 0;\n-\n-\t\t/* TODO Add error check if space will be sufficient */\n-\t\tgather_comp =\n-\t\t\t(struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);\n-\n-\t\t/*\n-\t\t * Input Gather List\n-\t\t */\n-\n-\t\ti = 0;\n-\n-\t\t/* Offset control word that includes iv */\n-\t\ti = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,\n-\t\t\t\t ROC_SE_OFF_CTRL_LEN + iv_len);\n-\n-\t\t/* Add input data */\n-\t\tsize = inputlen - iv_len;\n-\t\tif (likely(size)) {\n-\t\t\tuint32_t aad_offset = aad_len ? passthrough_len : 0;\n-\n-\t\t\tif (unlikely(flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n-\t\t\t\ti = fill_sg_comp_from_buf_min(\n-\t\t\t\t\tgather_comp, i, fc_params->bufs, &size);\n-\t\t\t} else {\n-\t\t\t\ti = fill_sg_comp_from_iov(\n-\t\t\t\t\tgather_comp, i, fc_params->src_iov, 0,\n-\t\t\t\t\t&size, aad_buf, aad_offset);\n-\t\t\t}\n-\n-\t\t\tif (unlikely(size)) {\n-\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t\t   \" size %d needed\",\n-\t\t\t\t\t   size);\n-\t\t\t\treturn -1;\n-\t\t\t}\n-\t\t}\n-\t\t((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);\n-\t\tg_size_bytes =\n-\t\t\t((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n-\n-\t\t/*\n-\t\t * Output Scatter list\n-\t\t */\n-\t\ti = 0;\n-\t\tscatter_comp =\n-\t\t\t(struct roc_se_sglist_comp *)((uint8_t *)gather_comp +\n-\t\t\t\t\t\t      g_size_bytes);\n-\n-\t\t/* Add IV */\n-\t\tif (likely(iv_len)) {\n-\t\t\ti = fill_sg_comp(scatter_comp, i,\n-\t\t\t\t\t (uint64_t)offset_vaddr +\n-\t\t\t\t\t\t ROC_SE_OFF_CTRL_LEN,\n-\t\t\t\t\t iv_len);\n-\t\t}\n-\n-\t\t/* output data or output data + digest*/\n-\t\tif (unlikely(flags & ROC_SE_VALID_MAC_BUF)) {\n-\t\t\tsize = outputlen - iv_len - mac_len;\n-\t\t\tif (size) {\n-\t\t\t\tuint32_t aad_offset =\n-\t\t\t\t\taad_len ? passthrough_len : 0;\n-\n-\t\t\t\tif (unlikely(flags &\n-\t\t\t\t\t     ROC_SE_SINGLE_BUF_INPLACE)) {\n-\t\t\t\t\ti = fill_sg_comp_from_buf_min(\n-\t\t\t\t\t\tscatter_comp, i,\n-\t\t\t\t\t\tfc_params->bufs, &size);\n-\t\t\t\t} else {\n-\t\t\t\t\ti = fill_sg_comp_from_iov(\n-\t\t\t\t\t\tscatter_comp, i,\n-\t\t\t\t\t\tfc_params->dst_iov, 0, &size,\n-\t\t\t\t\t\taad_buf, aad_offset);\n-\t\t\t\t}\n-\t\t\t\tif (unlikely(size)) {\n-\t\t\t\t\tplt_dp_err(\"Insufficient buffer\"\n-\t\t\t\t\t\t   \" space, size %d needed\",\n-\t\t\t\t\t\t   size);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n+\t\tcpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;\n \n-\t\t\t/* Digest buffer */\n-\t\t\ti = fill_sg_comp_from_buf(scatter_comp, i, &fc_params->mac_buf);\n-\t\t} else {\n-\t\t\t/* Output including mac */\n-\t\t\tsize = outputlen - iv_len;\n-\t\t\tif (likely(size)) {\n-\t\t\t\tuint32_t aad_offset =\n-\t\t\t\t\taad_len ? passthrough_len : 0;\n-\n-\t\t\t\tif (unlikely(flags &\n-\t\t\t\t\t     ROC_SE_SINGLE_BUF_INPLACE)) {\n-\t\t\t\t\ti = fill_sg_comp_from_buf_min(\n-\t\t\t\t\t\tscatter_comp, i,\n-\t\t\t\t\t\tfc_params->bufs, &size);\n-\t\t\t\t} else {\n-\t\t\t\t\ti = fill_sg_comp_from_iov(\n-\t\t\t\t\t\tscatter_comp, i,\n-\t\t\t\t\t\tfc_params->dst_iov, 0, &size,\n-\t\t\t\t\t\taad_buf, aad_offset);\n-\t\t\t\t}\n-\t\t\t\tif (unlikely(size)) {\n-\t\t\t\t\tplt_dp_err(\"Insufficient buffer\"\n-\t\t\t\t\t\t   \" space, size %d needed\",\n-\t\t\t\t\t\t   size);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n+\t\tif (likely(iv_len)) {\n+\t\t\tuint64_t *dest =\n+\t\t\t\t(uint64_t *)((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN);\n+\t\t\tuint64_t *src = fc_params->iv_buf;\n+\t\t\tdest[0] = src[0];\n+\t\t\tdest[1] = src[1];\n \t\t}\n-\t\t((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);\n-\t\ts_size_bytes =\n-\t\t\t((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n \n-\t\tsize = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;\n+\t\tinst->w4.u64 = cpt_inst_w4.u64;\n+\t} else {\n+\t\tif (likely(iv_len))\n+\t\t\tsrc = fc_params->iv_buf;\n \n-\t\t/* This is DPTR len in case of SG mode */\n-\t\tcpt_inst_w4.s.dlen = size;\n+\t\tinst->w4.u64 = cpt_inst_w4.u64;\n \n-\t\tinst->dptr = (uint64_t)in_buffer;\n-\t}\n+\t\tif (is_sg_ver2)\n+\t\t\tret = sg2_inst_prep(fc_params, inst, offset_ctrl, src, iv_len, 0, 0,\n+\t\t\t\t\t    inputlen, outputlen, passthrough_len, flags, 0, 0);\n+\t\telse\n+\t\t\tret = sg_inst_prep(fc_params, inst, offset_ctrl, src, iv_len, 0, 0,\n+\t\t\t\t\t   inputlen, outputlen, passthrough_len, flags, 0, 0);\n \n-\tif (unlikely((encr_offset >> 16) || (iv_offset >> 8) ||\n-\t\t     (auth_offset >> 8))) {\n-\t\tplt_dp_err(\"Offset not supported\");\n-\t\tplt_dp_err(\"enc_offset: %d\", encr_offset);\n-\t\tplt_dp_err(\"iv_offset : %d\", iv_offset);\n-\t\tplt_dp_err(\"auth_offset: %d\", auth_offset);\n-\t\treturn -1;\n+\t\tif (unlikely(ret)) {\n+\t\t\tplt_dp_err(\"sg prep failed\");\n+\t\t\treturn -1;\n+\t\t}\n \t}\n \n-\t*(uint64_t *)offset_vaddr = rte_cpu_to_be_64(\n-\t\t((uint64_t)encr_offset << 16) | ((uint64_t)iv_offset << 8) |\n-\t\t((uint64_t)auth_offset));\n-\n-\tinst->w4.u64 = cpt_inst_w4.u64;\n \treturn 0;\n }\n \n static __rte_always_inline int\n cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n-\t\t  struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst)\n+\t\t  struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst,\n+\t\t  const bool is_sg_ver2)\n {\n-\tuint32_t iv_offset = 0, size;\n+\tuint32_t iv_offset = 0;\n \tint32_t inputlen, outputlen, enc_dlen, auth_dlen;\n \tstruct roc_se_ctx *se_ctx;\n \tint32_t hash_type, mac_len;\n \tuint8_t iv_len = 16;\n-\tstruct roc_se_buf_ptr *aad_buf = NULL;\n \tuint32_t encr_offset, auth_offset;\n \tuint32_t encr_data_len, auth_data_len, aad_len = 0;\n \tuint32_t passthrough_len = 0;\n \tunion cpt_inst_w4 cpt_inst_w4;\n \tvoid *offset_vaddr;\n \tuint8_t op_minor;\n+\tuint64_t offset_ctrl;\n+\tuint8_t *src = NULL;\n+\tint ret;\n \n \tencr_offset = ROC_SE_ENCR_OFFSET(d_offs);\n \tauth_offset = ROC_SE_AUTH_OFFSET(d_offs);\n@@ -775,7 +1264,6 @@ cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n \t\tauth_data_len = 0;\n \t\tauth_offset = 0;\n \t\taad_len = fc_params->aad_buf.size;\n-\t\taad_buf = &fc_params->aad_buf;\n \t}\n \n \tse_ctx = fc_params->ctx;\n@@ -837,20 +1325,34 @@ cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n \tcpt_inst_w4.s.param1 = encr_data_len;\n \tcpt_inst_w4.s.param2 = auth_data_len;\n \n+\tif (unlikely((encr_offset >> 16) || (iv_offset >> 8) || (auth_offset >> 8))) {\n+\t\tplt_dp_err(\"Offset not supported\");\n+\t\tplt_dp_err(\"enc_offset: %d\", encr_offset);\n+\t\tplt_dp_err(\"iv_offset : %d\", iv_offset);\n+\t\tplt_dp_err(\"auth_offset: %d\", auth_offset);\n+\t\treturn -1;\n+\t}\n+\n+\toffset_ctrl = rte_cpu_to_be_64(((uint64_t)encr_offset << 16) | ((uint64_t)iv_offset << 8) |\n+\t\t\t\t       ((uint64_t)auth_offset));\n+\n \t/*\n \t * In cn9k, cn10k since we have a limitation of\n \t * IV & Offset control word not part of instruction\n \t * and need to be part of Data Buffer, we check if\n \t * head room is there and then only do the Direct mode processing\n \t */\n-\tif (likely((flags & ROC_SE_SINGLE_BUF_INPLACE) &&\n-\t\t   (flags & ROC_SE_SINGLE_BUF_HEADROOM))) {\n+\tif (likely((flags & ROC_SE_SINGLE_BUF_INPLACE) && (flags & ROC_SE_SINGLE_BUF_HEADROOM))) {\n \t\tvoid *dm_vaddr = fc_params->bufs[0].vaddr;\n \n \t\t/* Use Direct mode */\n \n-\t\toffset_vaddr =\n-\t\t\t(uint8_t *)dm_vaddr - ROC_SE_OFF_CTRL_LEN - iv_len;\n+\t\toffset_vaddr = (uint8_t *)dm_vaddr - ROC_SE_OFF_CTRL_LEN - iv_len;\n+\n+\t\t*(uint64_t *)offset_vaddr =\n+\t\t\trte_cpu_to_be_64(((uint64_t)encr_offset << 16) |\n+\t\t\t\t\t ((uint64_t)iv_offset << 8) | ((uint64_t)auth_offset));\n+\n \t\tinst->dptr = (uint64_t)offset_vaddr;\n \n \t\t/* RPTR should just exclude offset control word */\n@@ -859,197 +1361,33 @@ cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n \t\tcpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;\n \n \t\tif (likely(iv_len)) {\n-\t\t\tuint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +\n-\t\t\t\t\t\t      ROC_SE_OFF_CTRL_LEN);\n+\t\t\tuint64_t *dest =\n+\t\t\t\t(uint64_t *)((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN);\n \t\t\tuint64_t *src = fc_params->iv_buf;\n \t\t\tdest[0] = src[0];\n \t\t\tdest[1] = src[1];\n \t\t}\n+\t\tinst->w4.u64 = cpt_inst_w4.u64;\n \n \t} else {\n-\t\tvoid *m_vaddr = fc_params->meta_buf.vaddr;\n-\t\tuint32_t g_size_bytes, s_size_bytes;\n-\t\tstruct roc_se_sglist_comp *gather_comp;\n-\t\tstruct roc_se_sglist_comp *scatter_comp;\n-\t\tuint8_t *in_buffer;\n-\t\tuint8_t i = 0;\n-\n-\t\t/* This falls under strict SG mode */\n-\t\toffset_vaddr = m_vaddr;\n-\t\tsize = ROC_SE_OFF_CTRL_LEN + iv_len;\n-\n-\t\tm_vaddr = (uint8_t *)m_vaddr + size;\n-\n-\t\tcpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;\n-\n \t\tif (likely(iv_len)) {\n-\t\t\tuint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +\n-\t\t\t\t\t\t      ROC_SE_OFF_CTRL_LEN);\n-\t\t\tuint64_t *src = fc_params->iv_buf;\n-\t\t\tdest[0] = src[0];\n-\t\t\tdest[1] = src[1];\n-\t\t}\n-\n-\t\t/* DPTR has SG list */\n-\t\tin_buffer = m_vaddr;\n-\n-\t\t((uint16_t *)in_buffer)[0] = 0;\n-\t\t((uint16_t *)in_buffer)[1] = 0;\n-\n-\t\t/* TODO Add error check if space will be sufficient */\n-\t\tgather_comp =\n-\t\t\t(struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);\n-\n-\t\t/*\n-\t\t * Input Gather List\n-\t\t */\n-\t\ti = 0;\n-\n-\t\t/* Offset control word that includes iv */\n-\t\ti = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,\n-\t\t\t\t ROC_SE_OFF_CTRL_LEN + iv_len);\n-\n-\t\t/* Add input data */\n-\t\tif (flags & ROC_SE_VALID_MAC_BUF) {\n-\t\t\tsize = inputlen - iv_len - mac_len;\n-\t\t\tif (size) {\n-\t\t\t\t/* input data only */\n-\t\t\t\tif (unlikely(flags &\n-\t\t\t\t\t     ROC_SE_SINGLE_BUF_INPLACE)) {\n-\t\t\t\t\ti = fill_sg_comp_from_buf_min(\n-\t\t\t\t\t\tgather_comp, i, fc_params->bufs,\n-\t\t\t\t\t\t&size);\n-\t\t\t\t} else {\n-\t\t\t\t\tuint32_t aad_offset =\n-\t\t\t\t\t\taad_len ? passthrough_len : 0;\n-\n-\t\t\t\t\ti = fill_sg_comp_from_iov(\n-\t\t\t\t\t\tgather_comp, i,\n-\t\t\t\t\t\tfc_params->src_iov, 0, &size,\n-\t\t\t\t\t\taad_buf, aad_offset);\n-\t\t\t\t}\n-\t\t\t\tif (unlikely(size)) {\n-\t\t\t\t\tplt_dp_err(\"Insufficient buffer\"\n-\t\t\t\t\t\t   \" space, size %d needed\",\n-\t\t\t\t\t\t   size);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\n-\t\t\t/* mac data */\n-\t\t\tif (mac_len) {\n-\t\t\t\ti = fill_sg_comp_from_buf(gather_comp, i,\n-\t\t\t\t\t\t\t  &fc_params->mac_buf);\n-\t\t\t}\n-\t\t} else {\n-\t\t\t/* input data + mac */\n-\t\t\tsize = inputlen - iv_len;\n-\t\t\tif (size) {\n-\t\t\t\tif (unlikely(flags &\n-\t\t\t\t\t     ROC_SE_SINGLE_BUF_INPLACE)) {\n-\t\t\t\t\ti = fill_sg_comp_from_buf_min(\n-\t\t\t\t\t\tgather_comp, i, fc_params->bufs,\n-\t\t\t\t\t\t&size);\n-\t\t\t\t} else {\n-\t\t\t\t\tuint32_t aad_offset =\n-\t\t\t\t\t\taad_len ? passthrough_len : 0;\n-\n-\t\t\t\t\tif (unlikely(!fc_params->src_iov)) {\n-\t\t\t\t\t\tplt_dp_err(\"Bad input args\");\n-\t\t\t\t\t\treturn -1;\n-\t\t\t\t\t}\n-\n-\t\t\t\t\ti = fill_sg_comp_from_iov(\n-\t\t\t\t\t\tgather_comp, i,\n-\t\t\t\t\t\tfc_params->src_iov, 0, &size,\n-\t\t\t\t\t\taad_buf, aad_offset);\n-\t\t\t\t}\n-\n-\t\t\t\tif (unlikely(size)) {\n-\t\t\t\t\tplt_dp_err(\"Insufficient buffer\"\n-\t\t\t\t\t\t   \" space, size %d needed\",\n-\t\t\t\t\t\t   size);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t}\n-\t\t((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);\n-\t\tg_size_bytes =\n-\t\t\t((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n-\n-\t\t/*\n-\t\t * Output Scatter List\n-\t\t */\n-\n-\t\ti = 0;\n-\t\tscatter_comp =\n-\t\t\t(struct roc_se_sglist_comp *)((uint8_t *)gather_comp +\n-\t\t\t\t\t\t      g_size_bytes);\n-\n-\t\t/* Add iv */\n-\t\tif (iv_len) {\n-\t\t\ti = fill_sg_comp(scatter_comp, i,\n-\t\t\t\t\t (uint64_t)offset_vaddr +\n-\t\t\t\t\t\t ROC_SE_OFF_CTRL_LEN,\n-\t\t\t\t\t iv_len);\n+\t\t\tsrc = fc_params->iv_buf;\n \t\t}\n \n-\t\t/* Add output data */\n-\t\tsize = outputlen - iv_len;\n-\t\tif (size) {\n-\t\t\tif (unlikely(flags & ROC_SE_SINGLE_BUF_INPLACE)) {\n-\t\t\t\t/* handle single buffer here */\n-\t\t\t\ti = fill_sg_comp_from_buf_min(scatter_comp, i,\n-\t\t\t\t\t\t\t      fc_params->bufs,\n-\t\t\t\t\t\t\t      &size);\n-\t\t\t} else {\n-\t\t\t\tuint32_t aad_offset =\n-\t\t\t\t\taad_len ? passthrough_len : 0;\n-\n-\t\t\t\tif (unlikely(!fc_params->dst_iov)) {\n-\t\t\t\t\tplt_dp_err(\"Bad input args\");\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\n-\t\t\t\ti = fill_sg_comp_from_iov(\n-\t\t\t\t\tscatter_comp, i, fc_params->dst_iov, 0,\n-\t\t\t\t\t&size, aad_buf, aad_offset);\n-\t\t\t}\n+\t\tinst->w4.u64 = cpt_inst_w4.u64;\n \n-\t\t\tif (unlikely(size)) {\n-\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t\t   \" size %d needed\",\n-\t\t\t\t\t   size);\n-\t\t\t\treturn -1;\n-\t\t\t}\n+\t\tif (is_sg_ver2)\n+\t\t\tret = sg2_inst_prep(fc_params, inst, offset_ctrl, src, iv_len, 0, 0,\n+\t\t\t\t\t    inputlen, outputlen, passthrough_len, flags, 0, 1);\n+\t\telse\n+\t\t\tret = sg_inst_prep(fc_params, inst, offset_ctrl, src, iv_len, 0, 0,\n+\t\t\t\t\t   inputlen, outputlen, passthrough_len, flags, 0, 1);\n+\t\tif (unlikely(ret)) {\n+\t\t\tplt_dp_err(\"sg prep failed\");\n+\t\t\treturn -1;\n \t\t}\n-\n-\t\t((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);\n-\t\ts_size_bytes =\n-\t\t\t((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n-\n-\t\tsize = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;\n-\n-\t\t/* This is DPTR len in case of SG mode */\n-\t\tcpt_inst_w4.s.dlen = size;\n-\n-\t\tinst->dptr = (uint64_t)in_buffer;\n-\t}\n-\n-\tif (unlikely((encr_offset >> 16) || (iv_offset >> 8) ||\n-\t\t     (auth_offset >> 8))) {\n-\t\tplt_dp_err(\"Offset not supported\");\n-\t\tplt_dp_err(\"enc_offset: %d\", encr_offset);\n-\t\tplt_dp_err(\"iv_offset : %d\", iv_offset);\n-\t\tplt_dp_err(\"auth_offset: %d\", auth_offset);\n-\t\treturn -1;\n \t}\n \n-\t*(uint64_t *)offset_vaddr = rte_cpu_to_be_64(\n-\t\t((uint64_t)encr_offset << 16) | ((uint64_t)iv_offset << 8) |\n-\t\t((uint64_t)auth_offset));\n-\n-\tinst->w4.u64 = cpt_inst_w4.u64;\n \treturn 0;\n }\n \n@@ -1266,9 +1604,8 @@ cpt_pdcp_chain_alg_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,\n \n static __rte_always_inline int\n cpt_pdcp_alg_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,\n-\t\t  struct roc_se_fc_params *params, struct cpt_inst_s *inst)\n+\t\t  struct roc_se_fc_params *params, struct cpt_inst_s *inst, const bool is_sg_ver2)\n {\n-\tuint32_t size;\n \tint32_t inputlen, outputlen;\n \tstruct roc_se_ctx *se_ctx;\n \tuint32_t mac_len = 0;\n@@ -1281,6 +1618,7 @@ cpt_pdcp_alg_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,\n \tuint8_t *iv_s;\n \tuint8_t pack_iv = 0;\n \tunion cpt_inst_w4 cpt_inst_w4;\n+\tint ret;\n \n \tse_ctx = params->ctx;\n \tflags = se_ctx->zsk_flags;\n@@ -1343,223 +1681,99 @@ cpt_pdcp_alg_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,\n \t\t\troc_se_zuc_bytes_swap(iv_s, iv_len);\n \t\t\tiv_len -= 2;\n \t\t\tpack_iv = 1;\n-\t\t}\n-\n-\t\t/*\n-\t\t * Microcode expects offsets in bytes\n-\t\t * TODO: Rounding off\n-\t\t */\n-\t\tencr_data_len = ROC_SE_ENCR_DLEN(d_lens);\n-\n-\t\tencr_offset = ROC_SE_ENCR_OFFSET(d_offs);\n-\t\tencr_offset = encr_offset / 8;\n-\t\t/* consider iv len */\n-\t\tencr_offset += iv_len;\n-\n-\t\tinputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8);\n-\t\toutputlen = inputlen;\n-\n-\t\t/* iv offset is 0 */\n-\t\toffset_ctrl = rte_cpu_to_be_64((uint64_t)encr_offset << 16);\n-\n-\t\tauth_data_len = 0;\n-\t\tauth_offset = 0;\n-\t}\n-\n-\tif (unlikely((encr_offset >> 16) || (auth_offset >> 8))) {\n-\t\tplt_dp_err(\"Offset not supported\");\n-\t\tplt_dp_err(\"enc_offset: %d\", encr_offset);\n-\t\tplt_dp_err(\"auth_offset: %d\", auth_offset);\n-\t\treturn -1;\n-\t}\n-\n-\t/*\n-\t * GP op header, lengths are expected in bits.\n-\t */\n-\tcpt_inst_w4.s.param1 = encr_data_len;\n-\tcpt_inst_w4.s.param2 = auth_data_len;\n-\n-\t/*\n-\t * In cn9k, cn10k since we have a limitation of\n-\t * IV & Offset control word not part of instruction\n-\t * and need to be part of Data Buffer, we check if\n-\t * head room is there and then only do the Direct mode processing\n-\t */\n-\tif (likely((req_flags & ROC_SE_SINGLE_BUF_INPLACE) &&\n-\t\t   (req_flags & ROC_SE_SINGLE_BUF_HEADROOM))) {\n-\t\tvoid *dm_vaddr = params->bufs[0].vaddr;\n-\n-\t\t/* Use Direct mode */\n-\n-\t\toffset_vaddr = (uint64_t *)((uint8_t *)dm_vaddr -\n-\t\t\t\t\t    ROC_SE_OFF_CTRL_LEN - iv_len);\n-\n-\t\t/* DPTR */\n-\t\tinst->dptr = (uint64_t)offset_vaddr;\n-\t\t/* RPTR should just exclude offset control word */\n-\t\tinst->rptr = (uint64_t)dm_vaddr - iv_len;\n-\n-\t\tcpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;\n-\n-\t\tuint8_t *iv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN);\n-\t\tpdcp_iv_copy(iv_d, iv_s, pdcp_alg_type, pack_iv);\n-\n-\t\t*offset_vaddr = offset_ctrl;\n-\t} else {\n-\t\tvoid *m_vaddr = params->meta_buf.vaddr;\n-\t\tuint32_t i, g_size_bytes, s_size_bytes;\n-\t\tstruct roc_se_sglist_comp *gather_comp;\n-\t\tstruct roc_se_sglist_comp *scatter_comp;\n-\t\tuint8_t *in_buffer;\n-\t\tuint8_t *iv_d;\n-\n-\t\t/* save space for iv */\n-\t\toffset_vaddr = m_vaddr;\n-\n-\t\tm_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN +\n-\t\t\t  RTE_ALIGN_CEIL(iv_len, 8);\n-\n-\t\tcpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;\n-\n-\t\t/* DPTR has SG list */\n-\t\tin_buffer = m_vaddr;\n-\n-\t\t((uint16_t *)in_buffer)[0] = 0;\n-\t\t((uint16_t *)in_buffer)[1] = 0;\n-\n-\t\t/* TODO Add error check if space will be sufficient */\n-\t\tgather_comp =\n-\t\t\t(struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);\n-\n-\t\t/*\n-\t\t * Input Gather List\n-\t\t */\n-\t\ti = 0;\n-\n-\t\t/* Offset control word followed by iv */\n-\n-\t\ti = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,\n-\t\t\t\t ROC_SE_OFF_CTRL_LEN + iv_len);\n-\n-\t\t/* iv offset is 0 */\n-\t\t*offset_vaddr = offset_ctrl;\n-\n-\t\tiv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN);\n-\t\tpdcp_iv_copy(iv_d, iv_s, pdcp_alg_type, pack_iv);\n-\n-\t\t/* input data */\n-\t\tsize = inputlen - iv_len;\n-\t\tif (size) {\n-\t\t\ti = fill_sg_comp_from_iov(gather_comp, i,\n-\t\t\t\t\t\t  params->src_iov, 0, &size,\n-\t\t\t\t\t\t  NULL, 0);\n-\t\t\tif (unlikely(size)) {\n-\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t\t   \" size %d needed\",\n-\t\t\t\t\t   size);\n-\t\t\t\treturn -1;\n-\t\t\t}\n-\t\t}\n-\t\t((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);\n-\t\tg_size_bytes =\n-\t\t\t((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n+\t\t}\n \n \t\t/*\n-\t\t * Output Scatter List\n+\t\t * Microcode expects offsets in bytes\n+\t\t * TODO: Rounding off\n \t\t */\n+\t\tencr_data_len = ROC_SE_ENCR_DLEN(d_lens);\n \n-\t\ti = 0;\n-\t\tscatter_comp =\n-\t\t\t(struct roc_se_sglist_comp *)((uint8_t *)gather_comp +\n-\t\t\t\t\t\t      g_size_bytes);\n+\t\tencr_offset = ROC_SE_ENCR_OFFSET(d_offs);\n+\t\tencr_offset = encr_offset / 8;\n+\t\t/* consider iv len */\n+\t\tencr_offset += iv_len;\n \n-\t\tif (flags == 0x1) {\n-\t\t\t/* IV in SLIST only for EEA3 & UEA2 */\n-\t\t\tiv_len = 0;\n-\t\t}\n+\t\tinputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8);\n+\t\toutputlen = inputlen;\n \n-\t\tif (iv_len) {\n-\t\t\ti = fill_sg_comp(scatter_comp, i,\n-\t\t\t\t\t (uint64_t)offset_vaddr +\n-\t\t\t\t\t\t ROC_SE_OFF_CTRL_LEN,\n-\t\t\t\t\t iv_len);\n-\t\t}\n+\t\t/* iv offset is 0 */\n+\t\toffset_ctrl = rte_cpu_to_be_64((uint64_t)encr_offset << 16);\n \n-\t\t/* Add output data */\n-\t\tif (req_flags & ROC_SE_VALID_MAC_BUF) {\n-\t\t\tsize = outputlen - iv_len - mac_len;\n-\t\t\tif (size) {\n-\t\t\t\ti = fill_sg_comp_from_iov(scatter_comp, i,\n-\t\t\t\t\t\t\t  params->dst_iov, 0,\n-\t\t\t\t\t\t\t  &size, NULL, 0);\n-\n-\t\t\t\tif (unlikely(size)) {\n-\t\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t\t\t   \" size %d needed\",\n-\t\t\t\t\t\t   size);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n+\t\tauth_data_len = 0;\n+\t\tauth_offset = 0;\n+\t}\n \n-\t\t\t/* mac data */\n-\t\t\tif (mac_len) {\n-\t\t\t\ti = fill_sg_comp_from_buf(scatter_comp, i,\n-\t\t\t\t\t\t\t  &params->mac_buf);\n-\t\t\t}\n-\t\t} else {\n-\t\t\t/* Output including mac */\n-\t\t\tsize = outputlen - iv_len;\n-\t\t\tif (size) {\n-\t\t\t\ti = fill_sg_comp_from_iov(scatter_comp, i,\n-\t\t\t\t\t\t\t  params->dst_iov, 0,\n-\t\t\t\t\t\t\t  &size, NULL, 0);\n-\n-\t\t\t\tif (unlikely(size)) {\n-\t\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t\t\t   \" size %d needed\",\n-\t\t\t\t\t\t   size);\n-\t\t\t\t\treturn -1;\n-\t\t\t\t}\n-\t\t\t}\n-\t\t}\n-\t\t((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);\n-\t\ts_size_bytes =\n-\t\t\t((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n+\tif (unlikely((encr_offset >> 16) || (auth_offset >> 8))) {\n+\t\tplt_dp_err(\"Offset not supported\");\n+\t\tplt_dp_err(\"enc_offset: %d\", encr_offset);\n+\t\tplt_dp_err(\"auth_offset: %d\", auth_offset);\n+\t\treturn -1;\n+\t}\n \n-\t\tsize = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;\n+\t/*\n+\t * GP op header, lengths are expected in bits.\n+\t */\n+\tcpt_inst_w4.s.param1 = encr_data_len;\n+\tcpt_inst_w4.s.param2 = auth_data_len;\n \n-\t\t/* This is DPTR len in case of SG mode */\n-\t\tcpt_inst_w4.s.dlen = size;\n+\t/*\n+\t * In cn9k, cn10k since we have a limitation of\n+\t * IV & Offset control word not part of instruction\n+\t * and need to be part of Data Buffer, we check if\n+\t * head room is there and then only do the Direct mode processing\n+\t */\n+\tif (likely((req_flags & ROC_SE_SINGLE_BUF_INPLACE) &&\n+\t\t   (req_flags & ROC_SE_SINGLE_BUF_HEADROOM))) {\n+\t\tvoid *dm_vaddr = params->bufs[0].vaddr;\n \n-\t\tinst->dptr = (uint64_t)in_buffer;\n-\t}\n+\t\t/* Use Direct mode */\n \n-\tinst->w4.u64 = cpt_inst_w4.u64;\n+\t\toffset_vaddr = (uint64_t *)((uint8_t *)dm_vaddr - ROC_SE_OFF_CTRL_LEN - iv_len);\n+\n+\t\t/* DPTR */\n+\t\tinst->dptr = (uint64_t)offset_vaddr;\n+\t\t/* RPTR should just exclude offset control word */\n+\t\tinst->rptr = (uint64_t)dm_vaddr - iv_len;\n+\n+\t\tcpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;\n+\n+\t\tuint8_t *iv_d = ((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN);\n+\t\tpdcp_iv_copy(iv_d, iv_s, pdcp_alg_type, pack_iv);\n+\n+\t\t*offset_vaddr = offset_ctrl;\n+\t\tinst->w4.u64 = cpt_inst_w4.u64;\n+\t} else {\n+\t\tinst->w4.u64 = cpt_inst_w4.u64;\n+\t\tif (is_sg_ver2)\n+\t\t\tret = sg2_inst_prep(params, inst, offset_ctrl, iv_s, iv_len, pack_iv,\n+\t\t\t\t\t    pdcp_alg_type, inputlen, outputlen, 0, req_flags, 1, 0);\n+\t\telse\n+\t\t\tret = sg_inst_prep(params, inst, offset_ctrl, iv_s, iv_len, pack_iv,\n+\t\t\t\t\t   pdcp_alg_type, inputlen, outputlen, 0, req_flags, 1, 0);\n+\t\tif (unlikely(ret)) {\n+\t\t\tplt_dp_err(\"sg prep failed\");\n+\t\t\treturn -1;\n+\t\t}\n+\t}\n \n \treturn 0;\n }\n \n static __rte_always_inline int\n cpt_kasumi_enc_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,\n-\t\t    struct roc_se_fc_params *params, struct cpt_inst_s *inst)\n+\t\t    struct roc_se_fc_params *params, struct cpt_inst_s *inst, const bool is_sg_ver2)\n {\n-\tvoid *m_vaddr = params->meta_buf.vaddr;\n-\tuint32_t size;\n \tint32_t inputlen = 0, outputlen = 0;\n \tstruct roc_se_ctx *se_ctx;\n \tuint32_t mac_len = 0;\n-\tuint8_t i = 0;\n \tuint32_t encr_offset, auth_offset;\n \tuint32_t encr_data_len, auth_data_len;\n \tint flags;\n-\tuint8_t *iv_s, *iv_d, iv_len = 8;\n+\tuint8_t *iv_s, iv_len = 8;\n \tuint8_t dir = 0;\n-\tuint64_t *offset_vaddr;\n+\tuint64_t offset_ctrl;\n \tunion cpt_inst_w4 cpt_inst_w4;\n-\tuint8_t *in_buffer;\n-\tuint32_t g_size_bytes, s_size_bytes;\n-\tstruct roc_se_sglist_comp *gather_comp;\n-\tstruct roc_se_sglist_comp *scatter_comp;\n \n \tencr_offset = ROC_SE_ENCR_OFFSET(d_offs) / 8;\n \tauth_offset = ROC_SE_AUTH_OFFSET(d_offs) / 8;\n@@ -1595,32 +1809,11 @@ cpt_kasumi_enc_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,\n \t\tauth_offset += iv_len;\n \t}\n \n-\t/* save space for offset ctrl and iv */\n-\toffset_vaddr = m_vaddr;\n-\n-\tm_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len;\n-\n-\t/* DPTR has SG list */\n-\tin_buffer = m_vaddr;\n-\n-\t((uint16_t *)in_buffer)[0] = 0;\n-\t((uint16_t *)in_buffer)[1] = 0;\n-\n-\t/* TODO Add error check if space will be sufficient */\n-\tgather_comp = (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);\n-\n-\t/*\n-\t * Input Gather List\n-\t */\n-\ti = 0;\n-\n-\t/* Offset control word followed by iv */\n-\n \tif (flags == 0x0) {\n \t\tinputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8);\n \t\toutputlen = inputlen;\n \t\t/* iv offset is 0 */\n-\t\t*offset_vaddr = rte_cpu_to_be_64((uint64_t)encr_offset << 16);\n+\t\toffset_ctrl = rte_cpu_to_be_64((uint64_t)encr_offset << 16);\n \t\tif (unlikely((encr_offset >> 16))) {\n \t\t\tplt_dp_err(\"Offset not supported\");\n \t\t\tplt_dp_err(\"enc_offset: %d\", encr_offset);\n@@ -1630,7 +1823,7 @@ cpt_kasumi_enc_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,\n \t\tinputlen = auth_offset + (RTE_ALIGN(auth_data_len, 8) / 8);\n \t\toutputlen = mac_len;\n \t\t/* iv offset is 0 */\n-\t\t*offset_vaddr = rte_cpu_to_be_64((uint64_t)auth_offset);\n+\t\toffset_ctrl = rte_cpu_to_be_64((uint64_t)auth_offset);\n \t\tif (unlikely((auth_offset >> 8))) {\n \t\t\tplt_dp_err(\"Offset not supported\");\n \t\t\tplt_dp_err(\"auth_offset: %d\", auth_offset);\n@@ -1638,119 +1831,30 @@ cpt_kasumi_enc_prep(uint32_t req_flags, uint64_t d_offs, uint64_t d_lens,\n \t\t}\n \t}\n \n-\ti = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,\n-\t\t\t ROC_SE_OFF_CTRL_LEN + iv_len);\n-\n-\t/* IV */\n-\tiv_d = (uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN;\n-\tmemcpy(iv_d, iv_s, iv_len);\n-\n-\t/* input data */\n-\tsize = inputlen - iv_len;\n-\tif (size) {\n-\t\ti = fill_sg_comp_from_iov(gather_comp, i, params->src_iov, 0,\n-\t\t\t\t\t  &size, NULL, 0);\n-\n-\t\tif (unlikely(size)) {\n-\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t   \" size %d needed\",\n-\t\t\t\t   size);\n-\t\t\treturn -1;\n-\t\t}\n-\t}\n-\t((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);\n-\tg_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n-\n-\t/*\n-\t * Output Scatter List\n-\t */\n-\n-\ti = 0;\n-\tscatter_comp = (struct roc_se_sglist_comp *)((uint8_t *)gather_comp +\n-\t\t\t\t\t\t     g_size_bytes);\n-\n-\tif (flags == 0x1) {\n-\t\t/* IV in SLIST only for F8 */\n-\t\tiv_len = 0;\n-\t}\n-\n-\t/* IV */\n-\tif (iv_len) {\n-\t\ti = fill_sg_comp(scatter_comp, i,\n-\t\t\t\t (uint64_t)offset_vaddr + ROC_SE_OFF_CTRL_LEN,\n-\t\t\t\t iv_len);\n-\t}\n-\n-\t/* Add output data */\n-\tif (req_flags & ROC_SE_VALID_MAC_BUF) {\n-\t\tsize = outputlen - iv_len - mac_len;\n-\t\tif (size) {\n-\t\t\ti = fill_sg_comp_from_iov(scatter_comp, i,\n-\t\t\t\t\t\t  params->dst_iov, 0, &size,\n-\t\t\t\t\t\t  NULL, 0);\n-\n-\t\t\tif (unlikely(size)) {\n-\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t\t   \" size %d needed\",\n-\t\t\t\t\t   size);\n-\t\t\t\treturn -1;\n-\t\t\t}\n-\t\t}\n-\n-\t\t/* mac data */\n-\t\tif (mac_len) {\n-\t\t\ti = fill_sg_comp_from_buf(scatter_comp, i,\n-\t\t\t\t\t\t  &params->mac_buf);\n-\t\t}\n-\t} else {\n-\t\t/* Output including mac */\n-\t\tsize = outputlen - iv_len;\n-\t\tif (size) {\n-\t\t\ti = fill_sg_comp_from_iov(scatter_comp, i,\n-\t\t\t\t\t\t  params->dst_iov, 0, &size,\n-\t\t\t\t\t\t  NULL, 0);\n-\n-\t\t\tif (unlikely(size)) {\n-\t\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t\t   \" size %d needed\",\n-\t\t\t\t\t   size);\n-\t\t\t\treturn -1;\n-\t\t\t}\n-\t\t}\n-\t}\n-\t((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);\n-\ts_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n-\n-\tsize = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;\n-\n-\t/* This is DPTR len in case of SG mode */\n-\tcpt_inst_w4.s.dlen = size;\n-\n-\tinst->dptr = (uint64_t)in_buffer;\n \tinst->w4.u64 = cpt_inst_w4.u64;\n+\tif (is_sg_ver2)\n+\t\tsg2_inst_prep(params, inst, offset_ctrl, iv_s, iv_len, 0, 0, inputlen, outputlen, 0,\n+\t\t\t      req_flags, 0, 0);\n+\telse\n+\t\tsg_inst_prep(params, inst, offset_ctrl, iv_s, iv_len, 0, 0, inputlen, outputlen, 0,\n+\t\t\t     req_flags, 0, 0);\n \n \treturn 0;\n }\n \n static __rte_always_inline int\n-cpt_kasumi_dec_prep(uint64_t d_offs, uint64_t d_lens,\n-\t\t    struct roc_se_fc_params *params, struct cpt_inst_s *inst)\n+cpt_kasumi_dec_prep(uint64_t d_offs, uint64_t d_lens, struct roc_se_fc_params *params,\n+\t\t    struct cpt_inst_s *inst, const bool is_sg_ver2)\n {\n-\tvoid *m_vaddr = params->meta_buf.vaddr;\n-\tuint32_t size;\n \tint32_t inputlen = 0, outputlen;\n \tstruct roc_se_ctx *se_ctx;\n-\tuint8_t i = 0, iv_len = 8;\n+\tuint8_t iv_len = 8;\n \tuint32_t encr_offset;\n \tuint32_t encr_data_len;\n \tint flags;\n \tuint8_t dir = 0;\n-\tuint64_t *offset_vaddr;\n \tunion cpt_inst_w4 cpt_inst_w4;\n-\tuint8_t *in_buffer;\n-\tuint32_t g_size_bytes, s_size_bytes;\n-\tstruct roc_se_sglist_comp *gather_comp;\n-\tstruct roc_se_sglist_comp *scatter_comp;\n+\tuint64_t offset_ctrl;\n \n \tencr_offset = ROC_SE_ENCR_OFFSET(d_offs) / 8;\n \tencr_data_len = ROC_SE_ENCR_DLEN(d_lens);\n@@ -1776,96 +1880,28 @@ cpt_kasumi_dec_prep(uint64_t d_offs, uint64_t d_lens,\n \tinputlen = encr_offset + (RTE_ALIGN(encr_data_len, 8) / 8);\n \toutputlen = inputlen;\n \n-\t/* save space for offset ctrl & iv */\n-\toffset_vaddr = m_vaddr;\n-\n-\tm_vaddr = (uint8_t *)m_vaddr + ROC_SE_OFF_CTRL_LEN + iv_len;\n-\n-\t/* DPTR has SG list */\n-\tin_buffer = m_vaddr;\n-\n-\t((uint16_t *)in_buffer)[0] = 0;\n-\t((uint16_t *)in_buffer)[1] = 0;\n-\n-\t/* TODO Add error check if space will be sufficient */\n-\tgather_comp = (struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);\n-\n-\t/*\n-\t * Input Gather List\n-\t */\n-\ti = 0;\n-\n-\t/* Offset control word followed by iv */\n-\t*offset_vaddr = rte_cpu_to_be_64((uint64_t)encr_offset << 16);\n+\toffset_ctrl = rte_cpu_to_be_64((uint64_t)encr_offset << 16);\n \tif (unlikely((encr_offset >> 16))) {\n \t\tplt_dp_err(\"Offset not supported\");\n \t\tplt_dp_err(\"enc_offset: %d\", encr_offset);\n \t\treturn -1;\n \t}\n \n-\ti = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,\n-\t\t\t ROC_SE_OFF_CTRL_LEN + iv_len);\n-\n-\t/* IV */\n-\tmemcpy((uint8_t *)offset_vaddr + ROC_SE_OFF_CTRL_LEN, params->iv_buf,\n-\t       iv_len);\n-\n-\t/* Add input data */\n-\tsize = inputlen - iv_len;\n-\tif (size) {\n-\t\ti = fill_sg_comp_from_iov(gather_comp, i, params->src_iov, 0,\n-\t\t\t\t\t  &size, NULL, 0);\n-\t\tif (unlikely(size)) {\n-\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t   \" size %d needed\",\n-\t\t\t\t   size);\n-\t\t\treturn -1;\n-\t\t}\n-\t}\n-\t((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);\n-\tg_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n-\n-\t/*\n-\t * Output Scatter List\n-\t */\n-\n-\ti = 0;\n-\tscatter_comp = (struct roc_se_sglist_comp *)((uint8_t *)gather_comp +\n-\t\t\t\t\t\t     g_size_bytes);\n-\n-\t/* IV */\n-\ti = fill_sg_comp(scatter_comp, i,\n-\t\t\t (uint64_t)offset_vaddr + ROC_SE_OFF_CTRL_LEN, iv_len);\n-\n-\t/* Add output data */\n-\tsize = outputlen - iv_len;\n-\tif (size) {\n-\t\ti = fill_sg_comp_from_iov(scatter_comp, i, params->dst_iov, 0,\n-\t\t\t\t\t  &size, NULL, 0);\n-\t\tif (unlikely(size)) {\n-\t\t\tplt_dp_err(\"Insufficient buffer space,\"\n-\t\t\t\t   \" size %d needed\",\n-\t\t\t\t   size);\n-\t\t\treturn -1;\n-\t\t}\n-\t}\n-\t((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);\n-\ts_size_bytes = ((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);\n-\n-\tsize = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;\n-\n-\t/* This is DPTR len in case of SG mode */\n-\tcpt_inst_w4.s.dlen = size;\n-\n-\tinst->dptr = (uint64_t)in_buffer;\n \tinst->w4.u64 = cpt_inst_w4.u64;\n+\tif (is_sg_ver2)\n+\t\tsg2_inst_prep(params, inst, offset_ctrl, params->iv_buf, iv_len, 0, 0, inputlen,\n+\t\t\t      outputlen, 0, 0, 0, 1);\n+\telse\n+\t\tsg_inst_prep(params, inst, offset_ctrl, params->iv_buf, iv_len, 0, 0, inputlen,\n+\t\t\t     outputlen, 0, 0, 0, 1);\n \n \treturn 0;\n }\n \n static __rte_always_inline int\n cpt_fc_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n-\t\t     struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst)\n+\t\t     struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst,\n+\t\t     const bool is_sg_ver2)\n {\n \tstruct roc_se_ctx *ctx = fc_params->ctx;\n \tuint8_t fc_type;\n@@ -1874,13 +1910,16 @@ cpt_fc_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,\n \tfc_type = ctx->fc_type;\n \n \tif (likely(fc_type == ROC_SE_FC_GEN)) {\n-\t\tret = cpt_enc_hmac_prep(flags, d_offs, d_lens, fc_params, inst);\n+\t\tret = cpt_enc_hmac_prep(flags, d_offs, d_lens, fc_params, inst, is_sg_ver2);\n \t} else if (fc_type == ROC_SE_PDCP) {\n-\t\tret = cpt_pdcp_alg_prep(flags, d_offs, d_lens, fc_params, inst);\n+\t\tret = cpt_pdcp_alg_prep(flags, d_offs, d_lens, fc_params, inst, is_sg_ver2);\n \t} else if (fc_type == ROC_SE_KASUMI) {\n-\t\tret = cpt_kasumi_enc_prep(flags, d_offs, d_lens, fc_params, inst);\n+\t\tret = cpt_kasumi_enc_prep(flags, d_offs, d_lens, fc_params, inst, is_sg_ver2);\n \t} else if (fc_type == ROC_SE_HASH_HMAC) {\n-\t\tret = cpt_digest_gen_prep(flags, d_lens, fc_params, inst);\n+\t\tif (is_sg_ver2)\n+\t\t\tret = cpt_digest_gen_sg_ver2_prep(flags, d_lens, fc_params, inst);\n+\t\telse\n+\t\t\tret = cpt_digest_gen_sg_ver1_prep(flags, d_lens, fc_params, inst);\n \t}\n \n \treturn ret;\n@@ -2391,11 +2430,11 @@ prepare_iov_from_pkt_inplace(struct rte_mbuf *pkt,\n \tiovec->buf_cnt = index;\n \treturn;\n }\n-\n static __rte_always_inline int\n fill_fc_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,\n \t       struct cpt_qp_meta_info *m_info, struct cpt_inflight_req *infl_req,\n-\t       struct cpt_inst_s *inst, const bool is_kasumi, const bool is_aead)\n+\t       struct cpt_inst_s *inst, const bool is_kasumi, const bool is_aead,\n+\t       const bool is_sg_ver2)\n {\n \tstruct rte_crypto_sym_op *sym_op = cop->sym;\n \tvoid *mdata = NULL;\n@@ -2606,14 +2645,17 @@ fill_fc_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,\n \n \tif (is_kasumi) {\n \t\tif (cpt_op & ROC_SE_OP_ENCODE)\n-\t\t\tret = cpt_kasumi_enc_prep(flags, d_offs, d_lens, &fc_params, inst);\n+\t\t\tret = cpt_kasumi_enc_prep(flags, d_offs, d_lens, &fc_params, inst,\n+\t\t\t\t\t\t  is_sg_ver2);\n \t\telse\n-\t\t\tret = cpt_kasumi_dec_prep(d_offs, d_lens, &fc_params, inst);\n+\t\t\tret = cpt_kasumi_dec_prep(d_offs, d_lens, &fc_params, inst, is_sg_ver2);\n \t} else {\n \t\tif (cpt_op & ROC_SE_OP_ENCODE)\n-\t\t\tret = cpt_enc_hmac_prep(flags, d_offs, d_lens, &fc_params, inst);\n+\t\t\tret = cpt_enc_hmac_prep(flags, d_offs, d_lens, &fc_params, inst,\n+\t\t\t\t\t\tis_sg_ver2);\n \t\telse\n-\t\t\tret = cpt_dec_hmac_prep(flags, d_offs, d_lens, &fc_params, inst);\n+\t\t\tret = cpt_dec_hmac_prep(flags, d_offs, d_lens, &fc_params, inst,\n+\t\t\t\t\t\tis_sg_ver2);\n \t}\n \n \tif (unlikely(ret)) {\n@@ -2633,7 +2675,7 @@ fill_fc_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,\n static __rte_always_inline int\n fill_pdcp_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,\n \t\t struct cpt_qp_meta_info *m_info, struct cpt_inflight_req *infl_req,\n-\t\t struct cpt_inst_s *inst)\n+\t\t struct cpt_inst_s *inst, const bool is_sg_ver2)\n {\n \tstruct rte_crypto_sym_op *sym_op = cop->sym;\n \tstruct roc_se_fc_params fc_params;\n@@ -2712,6 +2754,7 @@ fill_pdcp_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,\n \t\t}\n \t}\n \n+\tfc_params.meta_buf.vaddr = NULL;\n \tif (unlikely(!((flags & ROC_SE_SINGLE_BUF_INPLACE) &&\n \t\t       (flags & ROC_SE_SINGLE_BUF_HEADROOM)))) {\n \t\tmdata = alloc_op_meta(&fc_params.meta_buf, m_info->mlen, m_info->pool, infl_req);\n@@ -2721,7 +2764,7 @@ fill_pdcp_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,\n \t\t}\n \t}\n \n-\tret = cpt_pdcp_alg_prep(flags, d_offs, d_lens, &fc_params, inst);\n+\tret = cpt_pdcp_alg_prep(flags, d_offs, d_lens, &fc_params, inst, is_sg_ver2);\n \tif (unlikely(ret)) {\n \t\tplt_dp_err(\"Could not prepare instruction\");\n \t\tgoto free_mdata_and_exit;\n@@ -2935,8 +2978,8 @@ find_kasumif9_direction_and_length(uint8_t *src, uint32_t counter_num_bytes,\n  */\n static __rte_always_inline int\n fill_digest_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,\n-\t\t   struct cpt_qp_meta_info *m_info,\n-\t\t   struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst)\n+\t\t   struct cpt_qp_meta_info *m_info, struct cpt_inflight_req *infl_req,\n+\t\t   struct cpt_inst_s *inst, const bool is_sg_ver2)\n {\n \tuint32_t space = 0;\n \tstruct rte_crypto_sym_op *sym_op = cop->sym;\n@@ -3066,7 +3109,7 @@ fill_digest_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,\n \t\tgoto free_mdata_and_exit;\n \t}\n \n-\tret = cpt_fc_enc_hmac_prep(flags, d_offs, d_lens, &params, inst);\n+\tret = cpt_fc_enc_hmac_prep(flags, d_offs, d_lens, &params, inst, is_sg_ver2);\n \tif (ret)\n \t\tgoto free_mdata_and_exit;\n \n@@ -3081,28 +3124,31 @@ fill_digest_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,\n \n static __rte_always_inline int __rte_hot\n cpt_sym_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op, struct cnxk_se_sess *sess,\n-\t\t  struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst)\n+\t\t  struct cpt_inflight_req *infl_req, struct cpt_inst_s *inst, const bool is_sg_ver2)\n {\n \tint ret;\n \n \tswitch (sess->dp_thr_type) {\n \tcase CPT_DP_THREAD_TYPE_PDCP:\n-\t\tret = fill_pdcp_params(op, sess, &qp->meta_info, infl_req, inst);\n+\t\tret = fill_pdcp_params(op, sess, &qp->meta_info, infl_req, inst, is_sg_ver2);\n \t\tbreak;\n \tcase CPT_DP_THREAD_TYPE_FC_CHAIN:\n-\t\tret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst, false, false);\n+\t\tret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst, false, false,\n+\t\t\t\t     is_sg_ver2);\n \t\tbreak;\n \tcase CPT_DP_THREAD_TYPE_FC_AEAD:\n-\t\tret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst, false, true);\n+\t\tret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst, false, true,\n+\t\t\t\t     is_sg_ver2);\n \t\tbreak;\n \tcase CPT_DP_THREAD_TYPE_PDCP_CHAIN:\n \t\tret = fill_pdcp_chain_params(op, sess, &qp->meta_info, infl_req, inst);\n \t\tbreak;\n \tcase CPT_DP_THREAD_TYPE_KASUMI:\n-\t\tret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst, true, false);\n+\t\tret = fill_fc_params(op, sess, &qp->meta_info, infl_req, inst, true, false,\n+\t\t\t\t     is_sg_ver2);\n \t\tbreak;\n \tcase CPT_DP_THREAD_AUTH_ONLY:\n-\t\tret = fill_digest_params(op, sess, &qp->meta_info, infl_req, inst);\n+\t\tret = fill_digest_params(op, sess, &qp->meta_info, infl_req, inst, is_sg_ver2);\n \t\tbreak;\n \tdefault:\n \t\tret = -EINVAL;\ndiff --git a/drivers/crypto/cnxk/version.map b/drivers/crypto/cnxk/version.map\nindex 4735e70550..d13209feec 100644\n--- a/drivers/crypto/cnxk/version.map\n+++ b/drivers/crypto/cnxk/version.map\n@@ -3,7 +3,8 @@ INTERNAL {\n \n \tcn9k_cpt_crypto_adapter_enqueue;\n \tcn9k_cpt_crypto_adapter_dequeue;\n-\tcn10k_cpt_crypto_adapter_enqueue;\n+\tcn10k_cpt_sg_ver1_crypto_adapter_enqueue;\n+\tcn10k_cpt_sg_ver2_crypto_adapter_enqueue;\n \tcn10k_cpt_crypto_adapter_dequeue;\n \tcn10k_cpt_crypto_adapter_vector_dequeue;\n \ndiff --git a/drivers/event/cnxk/cn10k_eventdev.c b/drivers/event/cnxk/cn10k_eventdev.c\nindex 742e43a5c6..30c922b5fc 100644\n--- a/drivers/event/cnxk/cn10k_eventdev.c\n+++ b/drivers/event/cnxk/cn10k_eventdev.c\n@@ -292,6 +292,7 @@ static void\n cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n {\n \tstruct cnxk_sso_evdev *dev = cnxk_sso_pmd_priv(event_dev);\n+\tstruct roc_cpt *cpt = roc_idev_cpt_get();\n \tconst event_dequeue_t sso_hws_deq[NIX_RX_OFFLOAD_MAX] = {\n #define R(name, flags)[flags] = cn10k_sso_hws_deq_##name,\n \t\tNIX_RX_FASTPATH_MODES\n@@ -594,14 +595,16 @@ cn10k_sso_fp_fns_set(struct rte_eventdev *event_dev)\n \t\t\t}\n \t\t}\n \t}\n-\tevent_dev->ca_enqueue = cn10k_cpt_crypto_adapter_enqueue;\n+\n+\tif ((cpt != NULL) && (cpt->cpt_revision > ROC_CPT_REVISION_ID_106XX))\n+\t\tevent_dev->ca_enqueue = cn10k_cpt_sg_ver2_crypto_adapter_enqueue;\n+\telse\n+\t\tevent_dev->ca_enqueue = cn10k_cpt_sg_ver1_crypto_adapter_enqueue;\n \n \tif (dev->tx_offloads & NIX_TX_MULTI_SEG_F)\n-\t\tCN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,\n-\t\t\t\t       sso_hws_tx_adptr_enq_seg);\n+\t\tCN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, sso_hws_tx_adptr_enq_seg);\n \telse\n-\t\tCN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue,\n-\t\t\t\t       sso_hws_tx_adptr_enq);\n+\t\tCN10K_SET_EVDEV_ENQ_OP(dev, event_dev->txa_enqueue, sso_hws_tx_adptr_enq);\n \n \tevent_dev->txa_enqueue_same_dest = event_dev->txa_enqueue;\n }\n",
    "prefixes": [
        "04/13"
    ]
}