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GET /api/patches/118022/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 118022,
    "url": "http://patches.dpdk.org/api/patches/118022/?format=api",
    "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221012060425.194-2-anoobj@marvell.com/",
    "project": {
        "id": 1,
        "url": "http://patches.dpdk.org/api/projects/1/?format=api",
        "name": "DPDK",
        "link_name": "dpdk",
        "list_id": "dev.dpdk.org",
        "list_email": "dev@dpdk.org",
        "web_url": "http://core.dpdk.org",
        "scm_url": "git://dpdk.org/dpdk",
        "webscm_url": "http://git.dpdk.org/dpdk",
        "list_archive_url": "https://inbox.dpdk.org/dev",
        "list_archive_url_format": "https://inbox.dpdk.org/dev/{}",
        "commit_url_format": ""
    },
    "msgid": "<20221012060425.194-2-anoobj@marvell.com>",
    "list_archive_url": "https://inbox.dpdk.org/dev/20221012060425.194-2-anoobj@marvell.com",
    "date": "2022-10-12T06:04:25",
    "name": "[2/2] crypto/cnxk: fix failure from session rework",
    "commit_ref": null,
    "pull_url": null,
    "state": "superseded",
    "archived": true,
    "hash": "b91992d6cea990574811da554ce7010336a912ff",
    "submitter": {
        "id": 1205,
        "url": "http://patches.dpdk.org/api/people/1205/?format=api",
        "name": "Anoob Joseph",
        "email": "anoobj@marvell.com"
    },
    "delegate": {
        "id": 6690,
        "url": "http://patches.dpdk.org/api/users/6690/?format=api",
        "username": "akhil",
        "first_name": "akhil",
        "last_name": "goyal",
        "email": "gakhil@marvell.com"
    },
    "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221012060425.194-2-anoobj@marvell.com/mbox/",
    "series": [
        {
            "id": 25160,
            "url": "http://patches.dpdk.org/api/series/25160/?format=api",
            "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25160",
            "date": "2022-10-12T06:04:24",
            "name": "[1/2] crypto/cnxk: align HW accessible field to ROC align",
            "version": 1,
            "mbox": "http://patches.dpdk.org/series/25160/mbox/"
        }
    ],
    "comments": "http://patches.dpdk.org/api/patches/118022/comments/",
    "check": "fail",
    "checks": "http://patches.dpdk.org/api/patches/118022/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<dev-bounces@dpdk.org>",
        "X-Original-To": "patchwork@inbox.dpdk.org",
        "Delivered-To": "patchwork@inbox.dpdk.org",
        "Received": [
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            "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0699D42D72;\n\tWed, 12 Oct 2022 08:04:39 +0200 (CEST)",
            "from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com\n [67.231.148.174])\n by mails.dpdk.org (Postfix) with ESMTP id 6585340691\n for <dev@dpdk.org>; Wed, 12 Oct 2022 08:04:37 +0200 (CEST)",
            "from pps.filterd (m0045849.ppops.net [127.0.0.1])\n by mx0a-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 29C2AOE0027074\n for <dev@dpdk.org>; Tue, 11 Oct 2022 23:04:36 -0700",
            "from dc5-exch01.marvell.com ([199.233.59.181])\n by mx0a-0016f401.pphosted.com (PPS) with ESMTPS id 3k5mjg0nnc-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 11 Oct 2022 23:04:36 -0700",
            "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH01.marvell.com\n (10.69.176.38) with Microsoft SMTP Server (TLS) id 15.0.1497.2;\n Tue, 11 Oct 2022 23:04:31 -0700",
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            "from BG-LT92004.corp.innovium.com (unknown [10.193.70.183])\n by maili.marvell.com (Postfix) with ESMTP id E57795B6969;\n Tue, 11 Oct 2022 23:04:28 -0700 (PDT)"
        ],
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : in-reply-to : references : mime-version :\n content-transfer-encoding : content-type; s=pfpt0220;\n bh=e5lRpjtHuHYYzcuxqGW/o6oDsIQzaLgSH6W1cDy8bDM=;\n b=k1+1RWeCd3D6B37QgjmAP9liuv/nq68bF3nsTd43xsV2w05bOWxXqoBA9kqHtJyQnd0Z\n S4rIZppMDQXWlQlGFntL8FIOAmilork7TkFmwFyjsTI4geZtQoLEQqVBsMjfrwcNi1K3\n ptj4gOxQQW4StiLbcIjE9lR1J1AVwNGIT/weunrFbX4sc1L1KLF3fehVGT5U2FzRF0Fw\n 4Q1er21SI0/y+A8KL1E/IVdL/nxALLUtjMfoam2WVcwUbXSbUJE1ysOZ/cnsBHa95kb6\n Fup0hv13Ylr1C7WoFz+JFZFbk9Wo7mzYUKvOeKGeWWHpAYezEm8pGaZvPvpAMFf4PYVf vA==",
        "From": "Anoob Joseph <anoobj@marvell.com>",
        "To": "Akhil Goyal <gakhil@marvell.com>, Jerin Jacob <jerinj@marvell.com>",
        "CC": "Ankur Dwivedi <adwivedi@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, <dev@dpdk.org>",
        "Subject": "[PATCH 2/2] crypto/cnxk: fix failure from session rework",
        "Date": "Wed, 12 Oct 2022 11:34:25 +0530",
        "Message-ID": "<20221012060425.194-2-anoobj@marvell.com>",
        "X-Mailer": "git-send-email 2.25.1",
        "In-Reply-To": "<20221012060425.194-1-anoobj@marvell.com>",
        "References": "<20221012060425.194-1-anoobj@marvell.com>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit",
        "Content-Type": "text/plain",
        "X-Proofpoint-ORIG-GUID": "SNL0tELLPWEbnGTCEdJWh2NW1hz-WKLR",
        "X-Proofpoint-GUID": "SNL0tELLPWEbnGTCEdJWh2NW1hz-WKLR",
        "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-10-12_03,2022-10-11_02,2022-06-22_01",
        "X-BeenThere": "dev@dpdk.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "DPDK patches and discussions <dev.dpdk.org>",
        "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>",
        "List-Archive": "<http://mails.dpdk.org/archives/dev/>",
        "List-Post": "<mailto:dev@dpdk.org>",
        "List-Help": "<mailto:dev-request@dpdk.org?subject=help>",
        "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>",
        "Errors-To": "dev-bounces@dpdk.org"
    },
    "content": "Post security session rework, CPTR got changed affecting cn9k IPsec\nfunctionality. Address the same. Also, move all s/w accessible\nfastpath fields to rte_security_session cacheline for better perf.\n\nFixes: 3f3fc3308bd0 (\"security: remove private mempool usage\")\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\n---\n drivers/crypto/cnxk/cn9k_cryptodev_ops.c | 46 ++++++++-----------\n drivers/crypto/cnxk/cn9k_ipsec.c         | 56 ++++++++++++------------\n drivers/crypto/cnxk/cn9k_ipsec.h         | 44 ++++++++++---------\n drivers/crypto/cnxk/cn9k_ipsec_la_ops.h  | 30 ++++++-------\n 4 files changed, 84 insertions(+), 92 deletions(-)",
    "diff": "diff --git a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\nindex 2ed298e01f..289601330e 100644\n--- a/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn9k_cryptodev_ops.c\n@@ -23,12 +23,10 @@ cn9k_cpt_sec_inst_fill(struct rte_crypto_op *op,\n \t\t       struct cpt_inst_s *inst)\n {\n \tstruct rte_crypto_sym_op *sym_op = op->sym;\n-\tstruct cn9k_sec_session *priv;\n-\tstruct cn9k_ipsec_sa *sa;\n+\tstruct cn9k_sec_session *sec_sess;\n \tint ret;\n \n-\tpriv = SECURITY_GET_SESS_PRIV(op->sym->session);\n-\tsa = &priv->sa;\n+\tsec_sess = (struct cn9k_sec_session *)(op->sym->session);\n \n \tif (unlikely(sym_op->m_dst && sym_op->m_dst != sym_op->m_src)) {\n \t\tplt_dp_err(\"Out of place is not supported\");\n@@ -40,12 +38,12 @@ cn9k_cpt_sec_inst_fill(struct rte_crypto_op *op,\n \t\treturn -ENOTSUP;\n \t}\n \n-\tif (sa->dir == RTE_SECURITY_IPSEC_SA_DIR_EGRESS)\n-\t\tret = process_outb_sa(op, sa, inst);\n+\tif (sec_sess->is_outbound)\n+\t\tret = process_outb_sa(op, sec_sess, inst);\n \telse {\n \t\tinfl_req->op_flags |= CPT_OP_FLAGS_IPSEC_DIR_INBOUND;\n-\t\tprocess_inb_sa(op, sa, inst);\n-\t\tif (unlikely(sa->replay_win_sz))\n+\t\tprocess_inb_sa(op, sec_sess, inst);\n+\t\tif (unlikely(sec_sess->replay_win_sz))\n \t\t\tinfl_req->op_flags |= CPT_OP_FLAGS_IPSEC_INB_REPLAY;\n \t\tret = 0;\n \t}\n@@ -335,12 +333,10 @@ cn9k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused,\n \tif (op_type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n \t\tif (sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n \t\t\tstruct cn9k_sec_session *priv;\n-\t\t\tstruct cn9k_ipsec_sa *sa;\n \n-\t\t\tpriv = SECURITY_GET_SESS_PRIV(sess);\n-\t\t\tsa = &priv->sa;\n-\t\t\tsa->qp = qp;\n-\t\t\tsa->inst.w2 = w2;\n+\t\t\tpriv = (struct cn9k_sec_session *)sess;\n+\t\t\tpriv->qp = qp;\n+\t\t\tpriv->inst.w2 = w2;\n \t\t} else if (sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tstruct cnxk_se_sess *priv;\n \n@@ -372,12 +368,10 @@ cn9k_ca_meta_info_extract(struct rte_crypto_op *op,\n \tif (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n \t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n \t\t\tstruct cn9k_sec_session *priv;\n-\t\t\tstruct cn9k_ipsec_sa *sa;\n \n-\t\t\tpriv = SECURITY_GET_SESS_PRIV(op->sym->session);\n-\t\t\tsa = &priv->sa;\n-\t\t\t*qp = sa->qp;\n-\t\t\tinst->w2.u64 = sa->inst.w2;\n+\t\t\tpriv = (struct cn9k_sec_session *)(op->sym->session);\n+\t\t\t*qp = priv->qp;\n+\t\t\tinst->w2.u64 = priv->inst.w2;\n \t\t} else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tstruct cnxk_se_sess *priv;\n \n@@ -480,7 +474,8 @@ cn9k_cpt_crypto_adapter_enqueue(uintptr_t base, struct rte_crypto_op *op)\n }\n \n static inline int\n-ipsec_antireplay_check(struct cn9k_ipsec_sa *sa, uint32_t win_sz, struct roc_ie_on_inb_hdr *data)\n+ipsec_antireplay_check(struct cn9k_sec_session *sess, uint32_t win_sz,\n+\t\t       struct roc_ie_on_inb_hdr *data)\n {\n \tuint32_t esn_low, esn_hi, seql, seqh = 0;\n \tstruct roc_ie_on_common_sa *common_sa;\n@@ -489,7 +484,7 @@ ipsec_antireplay_check(struct cn9k_ipsec_sa *sa, uint32_t win_sz, struct roc_ie_\n \tuint8_t esn;\n \tint ret;\n \n-\tin_sa = &sa->in_sa;\n+\tin_sa = &sess->sa.in_sa;\n \tcommon_sa = &in_sa->common_sa;\n \n \tesn = common_sa->ctl.esn_en;\n@@ -505,7 +500,7 @@ ipsec_antireplay_check(struct cn9k_ipsec_sa *sa, uint32_t win_sz, struct roc_ie_\n \tif (unlikely(seq == 0))\n \t\treturn IPSEC_ANTI_REPLAY_FAILED;\n \n-\tret = cnxk_on_anti_replay_check(seq, &sa->ar, win_sz);\n+\tret = cnxk_on_anti_replay_check(seq, &sess->ar, win_sz);\n \tif (esn && !ret) {\n \t\tesn_low = rte_be_to_cpu_32(common_sa->seq_t.tl);\n \t\tesn_hi = rte_be_to_cpu_32(common_sa->seq_t.th);\n@@ -526,7 +521,6 @@ cn9k_cpt_sec_post_process(struct rte_crypto_op *cop,\n \tstruct rte_crypto_sym_op *sym_op = cop->sym;\n \tstruct rte_mbuf *m = sym_op->m_src;\n \tstruct cn9k_sec_session *priv;\n-\tstruct cn9k_ipsec_sa *sa;\n \tstruct rte_ipv6_hdr *ip6;\n \tstruct rte_ipv4_hdr *ip;\n \tuint16_t m_len = 0;\n@@ -539,12 +533,10 @@ cn9k_cpt_sec_post_process(struct rte_crypto_op *cop,\n \t\t\t     CPT_OP_FLAGS_IPSEC_INB_REPLAY)) {\n \t\t\tint ret;\n \n-\t\t\tpriv = SECURITY_GET_SESS_PRIV(sym_op->session);\n-\t\t\tsa = &priv->sa;\n+\t\t\tpriv = (struct cn9k_sec_session *)(sym_op->session);\n \n-\t\t\tret = ipsec_antireplay_check(\n-\t\t\t\tsa, sa->replay_win_sz,\n-\t\t\t\t(struct roc_ie_on_inb_hdr *)data);\n+\t\t\tret = ipsec_antireplay_check(priv, priv->replay_win_sz,\n+\t\t\t\t\t\t     (struct roc_ie_on_inb_hdr *)data);\n \t\t\tif (unlikely(ret)) {\n \t\t\t\tcop->status = RTE_CRYPTO_OP_STATUS_ERROR;\n \t\t\t\treturn;\ndiff --git a/drivers/crypto/cnxk/cn9k_ipsec.c b/drivers/crypto/cnxk/cn9k_ipsec.c\nindex b56843f49b..66c450f941 100644\n--- a/drivers/crypto/cnxk/cn9k_ipsec.c\n+++ b/drivers/crypto/cnxk/cn9k_ipsec.c\n@@ -32,22 +32,23 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,\n \tuint8_t egrp;\n \tint ret;\n \n-\tsess = SECURITY_GET_SESS_PRIV(sec_sess);\n+\tsess = (struct cn9k_sec_session *)sec_sess;\n \tsa = &sess->sa;\n \n+\t/* Initialize lookaside IPsec private data */\n+\n \tmemset(sa, 0, sizeof(struct cn9k_ipsec_sa));\n \n-\t/* Initialize lookaside IPsec private data */\n-\tsa->dir = RTE_SECURITY_IPSEC_SA_DIR_EGRESS;\n+\tsess->is_outbound = 1;\n \n \tif (ipsec->esn.value)\n-\t\tsa->esn = ipsec->esn.value - 1;\n+\t\tsess->esn = ipsec->esn.value - 1;\n \n-\tret = cnxk_ipsec_outb_rlens_get(&sa->rlens, ipsec, crypto_xform);\n+\tret = cnxk_ipsec_outb_rlens_get(&sess->rlens, ipsec, crypto_xform);\n \tif (ret)\n \t\treturn ret;\n \n-\tsa->custom_hdr_len =\n+\tsess->custom_hdr_len =\n \t\tsizeof(struct roc_ie_on_outb_hdr) - ROC_IE_ON_MAX_IV_LEN;\n \n #ifdef LA_IPSEC_DEBUG\n@@ -80,8 +81,7 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,\n \n \tctx_len = ret;\n \tegrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE];\n-\tret = roc_on_cpt_ctx_write(&qp->lf, SECURITY_GET_SESS_PRIV_IOVA(sec_sess),\n-\t\t\t\t   false, ctx_len, egrp);\n+\tret = roc_on_cpt_ctx_write(&qp->lf, (uintptr_t)sa, false, ctx_len, egrp);\n \n \tif (ret)\n \t\treturn ret;\n@@ -108,9 +108,9 @@ cn9k_ipsec_outb_sa_create(struct cnxk_cpt_qp *qp,\n \n \tw7.u64 = 0;\n \tw7.s.egrp = egrp;\n-\tw7.s.cptr = SECURITY_GET_SESS_PRIV_IOVA(sec_sess);\n+\tw7.s.cptr = (uintptr_t)&sess->sa;\n \n-\tinst_tmpl = &sa->inst;\n+\tinst_tmpl = &sess->inst;\n \tinst_tmpl->w4 = w4.u64;\n \tinst_tmpl->w7 = w7.u64;\n \n@@ -134,31 +134,30 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,\n \tuint8_t egrp;\n \tint ret = 0;\n \n-\tsess = SECURITY_GET_SESS_PRIV(sec_sess);\n+\tsess = (struct cn9k_sec_session *)sec_sess;\n \tsa = &sess->sa;\n \n \tmemset(sa, 0, sizeof(struct cn9k_ipsec_sa));\n \n-\tsa->dir = RTE_SECURITY_IPSEC_SA_DIR_INGRESS;\n-\tsa->replay_win_sz = ipsec->replay_win_sz;\n+\tsess->is_outbound = 0;\n+\tsess->replay_win_sz = ipsec->replay_win_sz;\n \n-\tif (sa->replay_win_sz) {\n-\t\tif (sa->replay_win_sz > CNXK_ON_AR_WIN_SIZE_MAX) {\n-\t\t\tplt_err(\"Replay window size:%u is not supported\",\n-\t\t\t\tsa->replay_win_sz);\n+\tif (sess->replay_win_sz) {\n+\t\tif (sess->replay_win_sz > CNXK_ON_AR_WIN_SIZE_MAX) {\n+\t\t\tplt_err(\"Replay window size:%u is not supported\", sess->replay_win_sz);\n \t\t\treturn -ENOTSUP;\n \t\t}\n \n \t\t/* Set window bottom to 1, base and top to size of window */\n-\t\tsa->ar.winb = 1;\n-\t\tsa->ar.wint = sa->replay_win_sz;\n-\t\tsa->ar.base = sa->replay_win_sz;\n+\t\tsess->ar.winb = 1;\n+\t\tsess->ar.wint = sess->replay_win_sz;\n+\t\tsess->ar.base = sess->replay_win_sz;\n \n-\t\tsa->seq_lo = ipsec->esn.low;\n-\t\tsa->seq_hi = ipsec->esn.hi;\n+\t\tsess->seq_lo = ipsec->esn.low;\n+\t\tsess->seq_hi = ipsec->esn.hi;\n \n-\t\tsa->in_sa.common_sa.seq_t.tl = sa->seq_lo;\n-\t\tsa->in_sa.common_sa.seq_t.th = sa->seq_hi;\n+\t\tsess->sa.in_sa.common_sa.seq_t.tl = sess->seq_lo;\n+\t\tsess->sa.in_sa.common_sa.seq_t.th = sess->seq_hi;\n \t}\n \n \tret = cnxk_on_ipsec_inb_sa_create(ipsec, crypto_xform, &sa->in_sa);\n@@ -166,12 +165,11 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,\n \t\treturn ret;\n \n \tif (sa->in_sa.common_sa.ctl.esn_en)\n-\t\tsa->esn_en = 1;\n+\t\tsess->esn_en = 1;\n \n \tctx_len = ret;\n \tegrp = roc_cpt->eng_grp[CPT_ENG_TYPE_IE];\n-\tret = roc_on_cpt_ctx_write(&qp->lf, SECURITY_GET_SESS_PRIV_IOVA(sec_sess),\n-\t\t\t\t   true, ctx_len, egrp);\n+\tret = roc_on_cpt_ctx_write(&qp->lf, (uint64_t)sa, true, ctx_len, egrp);\n \tif (ret)\n \t\treturn ret;\n \n@@ -184,9 +182,9 @@ cn9k_ipsec_inb_sa_create(struct cnxk_cpt_qp *qp,\n \tw4.s.param2 = param2.u16;\n \n \tw7.s.egrp = egrp;\n-\tw7.s.cptr = SECURITY_GET_SESS_PRIV_IOVA(sec_sess);\n+\tw7.s.cptr = (uintptr_t)&sess->sa;\n \n-\tinst_tmpl = &sa->inst;\n+\tinst_tmpl = &sess->inst;\n \tinst_tmpl->w4 = w4.u64;\n \tinst_tmpl->w7 = w7.u64;\n \ndiff --git a/drivers/crypto/cnxk/cn9k_ipsec.h b/drivers/crypto/cnxk/cn9k_ipsec.h\nindex bed5976096..1ea946afd8 100644\n--- a/drivers/crypto/cnxk/cn9k_ipsec.h\n+++ b/drivers/crypto/cnxk/cn9k_ipsec.h\n@@ -5,6 +5,8 @@\n #ifndef __CN9K_IPSEC_H__\n #define __CN9K_IPSEC_H__\n \n+#include <rte_security_driver.h>\n+\n #include \"cnxk_ipsec.h\"\n #include \"cnxk_security.h\"\n #include \"cnxk_security_ar.h\"\n@@ -16,40 +18,42 @@ struct cn9k_ipsec_sa {\n \t\t/** Outbound SA */\n \t\tstruct roc_ie_on_outb_sa out_sa;\n \t};\n+} __rte_aligned(8);\n+\n+struct cn9k_sec_session {\n+\tstruct rte_security_session rte_sess;\n+\n+\t/** PMD private space */\n+\n+\t/** ESN */\n+\tunion {\n+\t\tuint64_t esn;\n+\t\tstruct {\n+\t\t\tuint32_t seq_lo;\n+\t\t\tuint32_t seq_hi;\n+\t\t};\n+\t};\n \t/** IPsec SA direction */\n-\tenum rte_security_ipsec_sa_direction dir;\n+\tuint8_t is_outbound;\n+\t/* ESN enable flag */\n+\tuint8_t esn_en;\n \t/** Pre-populated CPT inst words */\n \tstruct cnxk_cpt_inst_tmpl inst;\n+\t/** Response length calculation data */\n+\tstruct cnxk_ipsec_outb_rlens rlens;\n+\t/** Anti replay window size */\n+\tuint32_t replay_win_sz;\n \t/** Cipher IV offset in bytes */\n \tuint16_t cipher_iv_off;\n \t/** Cipher IV length in bytes */\n \tuint8_t cipher_iv_len;\n \t/** Outbound custom header length */\n \tuint8_t custom_hdr_len;\n-\t/** Response length calculation data */\n-\tstruct cnxk_ipsec_outb_rlens rlens;\n-\t/** ESN */\n-\tunion {\n-\t\tuint64_t esn;\n-\t\tstruct {\n-\t\t\tuint32_t seq_lo;\n-\t\t\tuint32_t seq_hi;\n-\t\t};\n-\t};\n \t/** Anti replay */\n \tstruct cnxk_on_ipsec_ar ar;\n-\t/** Anti replay window size */\n-\tuint32_t replay_win_sz;\n-\t/*\n-\t * ESN enable flag. Copy of in_sa ctl.esn_en to have single cache line\n-\t * access in the non-esn fastpath.\n-\t */\n-\tuint8_t esn_en;\n \t/** Queue pair */\n \tstruct cnxk_cpt_qp *qp;\n-};\n \n-struct cn9k_sec_session {\n \tstruct cn9k_ipsec_sa sa;\n } __rte_cache_aligned;\n \ndiff --git a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h\nindex 8b68e4c728..0763f3a42d 100644\n--- a/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h\n+++ b/drivers/crypto/cnxk/cn9k_ipsec_la_ops.h\n@@ -13,21 +13,20 @@\n #include \"cnxk_security_ar.h\"\n \n static __rte_always_inline int32_t\n-ipsec_po_out_rlen_get(struct cn9k_ipsec_sa *sa, uint32_t plen)\n+ipsec_po_out_rlen_get(struct cn9k_sec_session *sess, uint32_t plen)\n {\n \tuint32_t enc_payload_len;\n \n-\tenc_payload_len = RTE_ALIGN_CEIL(plen + sa->rlens.roundup_len,\n-\t\t\t\t\t sa->rlens.roundup_byte);\n+\tenc_payload_len = RTE_ALIGN_CEIL(plen + sess->rlens.roundup_len,\n+\t\t\t\t\t sess->rlens.roundup_byte);\n \n-\treturn sa->custom_hdr_len + sa->rlens.partial_len + enc_payload_len;\n+\treturn sess->custom_hdr_len + sess->rlens.partial_len + enc_payload_len;\n }\n \n static __rte_always_inline int\n-process_outb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa,\n-\t\tstruct cpt_inst_s *inst)\n+process_outb_sa(struct rte_crypto_op *cop, struct cn9k_sec_session *sess, struct cpt_inst_s *inst)\n {\n-\tconst unsigned int hdr_len = sa->custom_hdr_len;\n+\tconst unsigned int hdr_len = sess->custom_hdr_len;\n \tstruct rte_crypto_sym_op *sym_op = cop->sym;\n \tstruct rte_mbuf *m_src = sym_op->m_src;\n \tuint32_t dlen, rlen, pkt_len, seq_lo;\n@@ -38,7 +37,7 @@ process_outb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa,\n \n \tpkt_len = rte_pktmbuf_pkt_len(m_src);\n \tdlen = pkt_len + hdr_len;\n-\trlen = ipsec_po_out_rlen_get(sa, pkt_len);\n+\trlen = ipsec_po_out_rlen_get(sess, pkt_len);\n \n \textend_tail = rlen - dlen;\n \tif (unlikely(extend_tail > rte_pktmbuf_tailroom(m_src))) {\n@@ -61,7 +60,7 @@ process_outb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa,\n \thdr = PLT_PTR_ADD(m_src->buf_addr, data_off - hdr_len);\n \n #ifdef LA_IPSEC_DEBUG\n-\tif (sa->inst.w4 & ROC_IE_ON_PER_PKT_IV) {\n+\tif (sess->inst.w4 & ROC_IE_ON_PER_PKT_IV) {\n \t\tmemcpy(&hdr->iv[0],\n \t\t       rte_crypto_op_ctod_offset(cop, uint8_t *,\n \t\t\t\t\t\t sa->cipher_iv_off),\n@@ -69,7 +68,7 @@ process_outb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa,\n \t}\n #endif\n \n-\tesn = ++sa->esn;\n+\tesn = ++sess->esn;\n \n \t/* Set ESN seq hi */\n \thdr->esn = rte_cpu_to_be_32(esn >> 32);\n@@ -82,24 +81,23 @@ process_outb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa,\n \thdr->ip_id = seq_lo;\n \n \t/* Prepare CPT instruction */\n-\tinst->w4.u64 = sa->inst.w4 | dlen;\n+\tinst->w4.u64 = sess->inst.w4 | dlen;\n \tinst->dptr = PLT_U64_CAST(hdr);\n \tinst->rptr = PLT_U64_CAST(hdr);\n-\tinst->w7.u64 = sa->inst.w7;\n+\tinst->w7.u64 = sess->inst.w7;\n \n \treturn 0;\n }\n \n static __rte_always_inline void\n-process_inb_sa(struct rte_crypto_op *cop, struct cn9k_ipsec_sa *sa,\n-\t       struct cpt_inst_s *inst)\n+process_inb_sa(struct rte_crypto_op *cop, struct cn9k_sec_session *sess, struct cpt_inst_s *inst)\n {\n \tstruct rte_crypto_sym_op *sym_op = cop->sym;\n \tstruct rte_mbuf *m_src = sym_op->m_src;\n \n \t/* Prepare CPT instruction */\n-\tinst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src);\n+\tinst->w4.u64 = sess->inst.w4 | rte_pktmbuf_pkt_len(m_src);\n \tinst->dptr = inst->rptr = rte_pktmbuf_mtod(m_src, uint64_t);\n-\tinst->w7.u64 = sa->inst.w7;\n+\tinst->w7.u64 = sess->inst.w7;\n }\n #endif /* __CN9K_IPSEC_LA_OPS_H__ */\n",
    "prefixes": [
        "2/2"
    ]
}