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GET /api/patches/118021/?format=api
{ "id": 118021, "url": "http://patches.dpdk.org/api/patches/118021/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221012060425.194-1-anoobj@marvell.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221012060425.194-1-anoobj@marvell.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221012060425.194-1-anoobj@marvell.com", "date": "2022-10-12T06:04:24", "name": "[1/2] crypto/cnxk: align HW accessible field to ROC align", "commit_ref": null, "pull_url": null, "state": "superseded", "archived": true, "hash": "14fd7148148b9cea5364fd31fc9dd24cbc4f5c2f", "submitter": { "id": 1205, "url": "http://patches.dpdk.org/api/people/1205/?format=api", "name": "Anoob Joseph", "email": "anoobj@marvell.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221012060425.194-1-anoobj@marvell.com/mbox/", "series": [ { "id": 25160, "url": "http://patches.dpdk.org/api/series/25160/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25160", "date": "2022-10-12T06:04:24", "name": "[1/2] crypto/cnxk: align HW accessible field to ROC align", "version": 1, "mbox": "http://patches.dpdk.org/series/25160/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/118021/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/118021/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 14A50A0547;\n\tWed, 12 Oct 2022 08:04:34 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0440A410E8;\n\tWed, 12 Oct 2022 08:04:34 +0200 (CEST)", "from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com\n [67.231.156.173])\n by mails.dpdk.org (Postfix) with ESMTP id 61BE540691\n for <dev@dpdk.org>; Wed, 12 Oct 2022 08:04:32 +0200 (CEST)", "from pps.filterd (m0045851.ppops.net [127.0.0.1])\n by mx0b-0016f401.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id\n 29BNPp7c029942\n for <dev@dpdk.org>; Tue, 11 Oct 2022 23:04:31 -0700", "from dc5-exch02.marvell.com ([199.233.59.182])\n by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3k40g52we4-1\n (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT)\n for <dev@dpdk.org>; Tue, 11 Oct 2022 23:04:31 -0700", "from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.18;\n Tue, 11 Oct 2022 23:04:29 -0700", "from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com\n (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.18 via Frontend\n Transport; Tue, 11 Oct 2022 23:04:29 -0700", "from BG-LT92004.corp.innovium.com (unknown [10.193.70.183])\n by maili.marvell.com (Postfix) with ESMTP id 6BF643F7055;\n Tue, 11 Oct 2022 23:04:26 -0700 (PDT)" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com;\n h=from : to : cc :\n subject : date : message-id : mime-version : content-transfer-encoding :\n content-type; s=pfpt0220; bh=7vcAB5bqQps2tE1qxVHMnN4HwANc7xlTslJX3dBlcPs=;\n b=kXEQkV/tGmo3uyBMfhYebxsv4YPBMZNNDJNS+Q75nMp+rSSHQ8c3y6IkVyumjaVyx2Bp\n TbkXIup8u6kE2f/2QxqOq69DO6fWeXmVXrD2lcwo4ncwHWCmjnKx+esRgEkM047Gj/4x\n ExA2KKexdELIaoDAamg7s2aLxQcNTmhVNdcKS25cHWLmIR7XM8O3RugEOTLHdV7G0/d5\n cpdzmcPwz+vvSLaeektcGCGlgdGlq7Sv/6JR7poajfhfKOfQdNmiz8QlErGRYc6QZ24o\n WkxVegJNCW3FT21vHjHGKR1/PnN0S1x2Cuekx5Er5FUcphlaiqgvK/YkvyhIOhakdYT5 Ew==", "From": "Anoob Joseph <anoobj@marvell.com>", "To": "Akhil Goyal <gakhil@marvell.com>, Jerin Jacob <jerinj@marvell.com>", "CC": "Ankur Dwivedi <adwivedi@marvell.com>, Tejasree Kondoj\n <ktejasree@marvell.com>, <dev@dpdk.org>", "Subject": "[PATCH 1/2] crypto/cnxk: align HW accessible field to ROC align", "Date": "Wed, 12 Oct 2022 11:34:24 +0530", "Message-ID": "<20221012060425.194-1-anoobj@marvell.com>", "X-Mailer": "git-send-email 2.25.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-ORIG-GUID": "rdw--mqMeQZIVa0lOZ_DnLYatu2OJl_9", "X-Proofpoint-GUID": "rdw--mqMeQZIVa0lOZ_DnLYatu2OJl_9", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1\n definitions=2022-10-12_03,2022-10-11_02,2022-06-22_01", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Hardware accessible memory need to be aligned to ROC. Enforce the same.\nMove software specific fields to padding space.\n\nSigned-off-by: Anoob Joseph <anoobj@marvell.com>\n---\n drivers/crypto/cnxk/cn10k_cryptodev_ops.c | 33 ++++------\n drivers/crypto/cnxk/cn10k_ipsec.c | 77 +++++++++++------------\n drivers/crypto/cnxk/cn10k_ipsec.h | 25 ++++----\n drivers/crypto/cnxk/cn10k_ipsec_la_ops.h | 40 +++++-------\n 4 files changed, 80 insertions(+), 95 deletions(-)", "diff": "diff --git a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\nindex 1d7a9e2952..2942617615 100644\n--- a/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n+++ b/drivers/crypto/cnxk/cn10k_cryptodev_ops.c\n@@ -72,7 +72,6 @@ cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n \t\t struct cn10k_sec_session *sess, struct cpt_inst_s *inst)\n {\n \tstruct rte_crypto_sym_op *sym_op = op->sym;\n-\tstruct cn10k_ipsec_sa *sa;\n \tint ret;\n \n \tif (unlikely(sym_op->m_dst && sym_op->m_dst != sym_op->m_src)) {\n@@ -85,12 +84,10 @@ cpt_sec_inst_fill(struct cnxk_cpt_qp *qp, struct rte_crypto_op *op,\n \t\treturn -ENOTSUP;\n \t}\n \n-\tsa = &sess->sa;\n-\n-\tif (sa->is_outbound)\n-\t\tret = process_outb_sa(&qp->lf, op, sa, inst);\n+\tif (sess->is_outbound)\n+\t\tret = process_outb_sa(&qp->lf, op, sess, inst);\n \telse\n-\t\tret = process_inb_sa(op, sa, inst);\n+\t\tret = process_inb_sa(op, sess, inst);\n \n \treturn ret;\n }\n@@ -122,11 +119,11 @@ cn10k_cpt_fill_inst(struct cnxk_cpt_qp *qp, struct rte_crypto_op *ops[],\n \n \tif (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n \t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n-\t\t\tsec_sess = SECURITY_GET_SESS_PRIV(sym_op->session);\n+\t\t\tsec_sess = (struct cn10k_sec_session *)(sym_op->session);\n \t\t\tret = cpt_sec_inst_fill(qp, op, sec_sess, &inst[0]);\n \t\t\tif (unlikely(ret))\n \t\t\t\treturn 0;\n-\t\t\tw7 = sec_sess->sa.inst.w7;\n+\t\t\tw7 = sec_sess->inst.w7;\n \t\t} else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tsess = CRYPTODEV_GET_SYM_SESS_PRIV(sym_op->session);\n \t\t\tret = cpt_sym_inst_fill(qp, op, sess, infl_req,\n@@ -298,13 +295,10 @@ cn10k_cpt_crypto_adapter_ev_mdata_set(struct rte_cryptodev *dev __rte_unused,\n \t/* Set meta according to session type */\n \tif (op_type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n \t\tif (sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n-\t\t\tstruct cn10k_sec_session *priv;\n-\t\t\tstruct cn10k_ipsec_sa *sa;\n+\t\t\tstruct cn10k_sec_session *sec_sess = (struct cn10k_sec_session *)sess;\n \n-\t\t\tpriv = SECURITY_GET_SESS_PRIV(sess);\n-\t\t\tsa = &priv->sa;\n-\t\t\tsa->qp = qp;\n-\t\t\tsa->inst.w2 = w2;\n+\t\t\tsec_sess->qp = qp;\n+\t\t\tsec_sess->inst.w2 = w2;\n \t\t} else if (sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tstruct cnxk_se_sess *priv;\n \n@@ -335,13 +329,12 @@ cn10k_ca_meta_info_extract(struct rte_crypto_op *op,\n {\n \tif (op->type == RTE_CRYPTO_OP_TYPE_SYMMETRIC) {\n \t\tif (op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {\n-\t\t\tstruct cn10k_sec_session *priv;\n-\t\t\tstruct cn10k_ipsec_sa *sa;\n+\t\t\tstruct cn10k_sec_session *sec_sess;\n+\n+\t\t\tsec_sess = (struct cn10k_sec_session *)op->sym->session;\n \n-\t\t\tpriv = SECURITY_GET_SESS_PRIV(op->sym->session);\n-\t\t\tsa = &priv->sa;\n-\t\t\t*qp = sa->qp;\n-\t\t\t*w2 = sa->inst.w2;\n+\t\t\t*qp = sec_sess->qp;\n+\t\t\t*w2 = sec_sess->inst.w2;\n \t\t} else if (op->sess_type == RTE_CRYPTO_OP_WITH_SESSION) {\n \t\t\tstruct cnxk_se_sess *priv;\n \ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec.c b/drivers/crypto/cnxk/cn10k_ipsec.c\nindex 1ebdf7793a..ef013c8bae 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec.c\n+++ b/drivers/crypto/cnxk/cn10k_ipsec.c\n@@ -36,19 +36,17 @@ static int\n cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \t\t\t struct rte_security_ipsec_xform *ipsec_xfrm,\n \t\t\t struct rte_crypto_sym_xform *crypto_xfrm,\n-\t\t\t struct rte_security_session *sec_sess)\n+\t\t\t struct cn10k_sec_session *sec_sess)\n {\n \tunion roc_ot_ipsec_outb_param1 param1;\n \tstruct roc_ot_ipsec_outb_sa *sa_dptr;\n \tstruct cnxk_ipsec_outb_rlens rlens;\n-\tstruct cn10k_sec_session *sess;\n \tstruct cn10k_ipsec_sa *sa;\n \tunion cpt_inst_w4 inst_w4;\n \tvoid *out_sa;\n \tint ret = 0;\n \n-\tsess = SECURITY_GET_SESS_PRIV(sec_sess);\n-\tsa = &sess->sa;\n+\tsa = &sec_sess->sa;\n \tout_sa = &sa->out_sa;\n \n \t/* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */\n@@ -65,21 +63,21 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \t\tgoto sa_dptr_free;\n \t}\n \n-\tsa->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, out_sa);\n+\tsec_sess->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, out_sa);\n \n #ifdef LA_IPSEC_DEBUG\n \t/* Use IV from application in debug mode */\n \tif (ipsec_xfrm->options.iv_gen_disable == 1) {\n \t\tsa_dptr->w2.s.iv_src = ROC_IE_OT_SA_IV_SRC_FROM_SA;\n \t\tif (crypto_xfrm->type == RTE_CRYPTO_SYM_XFORM_AEAD) {\n-\t\t\tsa->iv_offset = crypto_xfrm->aead.iv.offset;\n-\t\t\tsa->iv_length = crypto_xfrm->aead.iv.length;\n+\t\t\tsec_sess->iv_offset = crypto_xfrm->aead.iv.offset;\n+\t\t\tsec_sess->iv_length = crypto_xfrm->aead.iv.length;\n \t\t} else if (crypto_xfrm->type == RTE_CRYPTO_SYM_XFORM_CIPHER) {\n-\t\t\tsa->iv_offset = crypto_xfrm->cipher.iv.offset;\n-\t\t\tsa->iv_length = crypto_xfrm->cipher.iv.length;\n+\t\t\tsec_sess->iv_offset = crypto_xfrm->cipher.iv.offset;\n+\t\t\tsec_sess->iv_length = crypto_xfrm->cipher.iv.length;\n \t\t} else {\n-\t\t\tsa->iv_offset = crypto_xfrm->auth.iv.offset;\n-\t\t\tsa->iv_length = crypto_xfrm->auth.iv.length;\n+\t\t\tsec_sess->iv_offset = crypto_xfrm->auth.iv.offset;\n+\t\t\tsec_sess->iv_length = crypto_xfrm->auth.iv.length;\n \t\t}\n \t}\n #else\n@@ -90,14 +88,14 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \t}\n #endif\n \n-\tsa->is_outbound = true;\n+\tsec_sess->is_outbound = true;\n \n \t/* Get Rlen calculation data */\n \tret = cnxk_ipsec_outb_rlens_get(&rlens, ipsec_xfrm, crypto_xfrm);\n \tif (ret)\n \t\tgoto sa_dptr_free;\n \n-\tsa->max_extended_len = rlens.max_extended_len;\n+\tsec_sess->max_extended_len = rlens.max_extended_len;\n \n \t/* pre-populate CPT INST word 4 */\n \tinst_w4.u64 = 0;\n@@ -125,7 +123,7 @@ cn10k_ipsec_outb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \n \tinst_w4.s.param1 = param1.u16;\n \n-\tsa->inst.w4 = inst_w4.u64;\n+\tsec_sess->inst.w4 = inst_w4.u64;\n \n \tif (ipsec_xfrm->options.stats == 1) {\n \t\t/* Enable mib counters */\n@@ -163,18 +161,16 @@ static int\n cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \t\t\t struct rte_security_ipsec_xform *ipsec_xfrm,\n \t\t\t struct rte_crypto_sym_xform *crypto_xfrm,\n-\t\t\t struct rte_security_session *sec_sess)\n+\t\t\t struct cn10k_sec_session *sec_sess)\n {\n \tunion roc_ot_ipsec_inb_param1 param1;\n \tstruct roc_ot_ipsec_inb_sa *sa_dptr;\n-\tstruct cn10k_sec_session *sess;\n \tstruct cn10k_ipsec_sa *sa;\n \tunion cpt_inst_w4 inst_w4;\n \tvoid *in_sa;\n \tint ret = 0;\n \n-\tsess = SECURITY_GET_SESS_PRIV(sec_sess);\n-\tsa = &sess->sa;\n+\tsa = &sec_sess->sa;\n \tin_sa = &sa->in_sa;\n \n \t/* Allocate memory to be used as dptr for CPT ucode WRITE_SA op */\n@@ -192,8 +188,8 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \t\tgoto sa_dptr_free;\n \t}\n \n-\tsa->is_outbound = false;\n-\tsa->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, in_sa);\n+\tsec_sess->is_outbound = false;\n+\tsec_sess->inst.w7 = ipsec_cpt_inst_w7_get(roc_cpt, in_sa);\n \n \t/* pre-populate CPT INST word 4 */\n \tinst_w4.u64 = 0;\n@@ -221,7 +217,7 @@ cn10k_ipsec_inb_sa_create(struct roc_cpt *roc_cpt, struct roc_cpt_lf *lf,\n \n \tinst_w4.s.param1 = param1.u16;\n \n-\tsa->inst.w4 = inst_w4.u64;\n+\tsec_sess->inst.w4 = inst_w4.u64;\n \n \tif (ipsec_xfrm->options.stats == 1) {\n \t\t/* Enable mib counters */\n@@ -281,11 +277,11 @@ cn10k_ipsec_session_create(void *dev,\n \troc_cpt = &vf->cpt;\n \n \tif (ipsec_xfrm->direction == RTE_SECURITY_IPSEC_SA_DIR_INGRESS)\n-\t\treturn cn10k_ipsec_inb_sa_create(roc_cpt, &qp->lf, ipsec_xfrm,\n-\t\t\t\t\t\t crypto_xfrm, sess);\n+\t\treturn cn10k_ipsec_inb_sa_create(roc_cpt, &qp->lf, ipsec_xfrm, crypto_xfrm,\n+\t\t\t\t\t\t (struct cn10k_sec_session *)sess);\n \telse\n-\t\treturn cn10k_ipsec_outb_sa_create(roc_cpt, &qp->lf, ipsec_xfrm,\n-\t\t\t\t\t\t crypto_xfrm, sess);\n+\t\treturn cn10k_ipsec_outb_sa_create(roc_cpt, &qp->lf, ipsec_xfrm, crypto_xfrm,\n+\t\t\t\t\t\t (struct cn10k_sec_session *)sess);\n }\n \n static int\n@@ -314,13 +310,14 @@ cn10k_sec_session_destroy(void *dev, struct rte_security_session *sec_sess)\n \tvoid *sa_dptr = NULL;\n \tint ret;\n \n-\tsess = SECURITY_GET_SESS_PRIV(sec_sess);\n-\tif (sess == NULL)\n-\t\treturn 0;\n+\tif (unlikely(sec_sess == NULL))\n+\t\treturn -EINVAL;\n+\n+\tsess = (struct cn10k_sec_session *)sec_sess;\n \n \tqp = crypto_dev->data->queue_pairs[0];\n-\tif (qp == NULL)\n-\t\treturn 0;\n+\tif (unlikely(qp == NULL))\n+\t\treturn -ENOTSUP;\n \n \tlf = &qp->lf;\n \n@@ -331,7 +328,7 @@ cn10k_sec_session_destroy(void *dev, struct rte_security_session *sec_sess)\n \n \tret = -1;\n \n-\tif (sa->is_outbound) {\n+\tif (sess->is_outbound) {\n \t\tsa_dptr = plt_zmalloc(sizeof(struct roc_ot_ipsec_outb_sa), 8);\n \t\tif (sa_dptr != NULL) {\n \t\t\troc_ot_ipsec_outb_sa_init(sa_dptr);\n@@ -374,7 +371,7 @@ cn10k_sec_session_destroy(void *dev, struct rte_security_session *sec_sess)\n static unsigned int\n cn10k_sec_session_get_size(void *device __rte_unused)\n {\n-\treturn sizeof(struct cn10k_sec_session);\n+\treturn sizeof(struct cn10k_sec_session) - sizeof(struct rte_security_session);\n }\n \n static int\n@@ -384,25 +381,23 @@ cn10k_sec_session_stats_get(void *device, struct rte_security_session *sess,\n \tstruct rte_cryptodev *crypto_dev = device;\n \tstruct roc_ot_ipsec_outb_sa *out_sa;\n \tstruct roc_ot_ipsec_inb_sa *in_sa;\n-\tunion roc_ot_ipsec_sa_word2 *w2;\n \tstruct cn10k_sec_session *priv;\n \tstruct cn10k_ipsec_sa *sa;\n \tstruct cnxk_cpt_qp *qp;\n \n-\tpriv = SECURITY_GET_SESS_PRIV(sess);\n-\tif (priv == NULL)\n+\tif (unlikely(sess == NULL))\n \t\treturn -EINVAL;\n \n+\tpriv = (struct cn10k_sec_session *)sess;\n+\n \tqp = crypto_dev->data->queue_pairs[0];\n \tif (qp == NULL)\n \t\treturn -EINVAL;\n \n-\tsa = &priv->sa;\n-\tw2 = (union roc_ot_ipsec_sa_word2 *)&sa->in_sa.w2;\n-\n \tstats->protocol = RTE_SECURITY_PROTOCOL_IPSEC;\n+\tsa = &priv->sa;\n \n-\tif (w2->s.dir == ROC_IE_SA_DIR_OUTBOUND) {\n+\tif (priv->is_outbound) {\n \t\tout_sa = &sa->out_sa;\n \t\troc_cpt_lf_ctx_flush(&qp->lf, out_sa, false);\n \t\trte_delay_ms(1);\n@@ -448,8 +443,8 @@ cn10k_sec_session_update(void *device, struct rte_security_session *sess,\n \tvf = crypto_dev->data->dev_private;\n \troc_cpt = &vf->cpt;\n \n-\treturn cn10k_ipsec_outb_sa_create(roc_cpt, &qp->lf, &conf->ipsec,\n-\t\t\t\t\t conf->crypto_xform, sess);\n+\treturn cn10k_ipsec_outb_sa_create(roc_cpt, &qp->lf, &conf->ipsec, conf->crypto_xform,\n+\t\t\t\t\t (struct cn10k_sec_session *)sess);\n }\n \n /* Update platform specific security ops */\ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec.h b/drivers/crypto/cnxk/cn10k_ipsec.h\nindex 1c1d904799..044fe33046 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec.h\n+++ b/drivers/crypto/cnxk/cn10k_ipsec.h\n@@ -6,6 +6,7 @@\n #define __CN10K_IPSEC_H__\n \n #include <rte_security.h>\n+#include <rte_security_driver.h>\n \n #include \"roc_api.h\"\n \n@@ -14,6 +15,19 @@\n typedef void *CN10K_SA_CONTEXT_MARKER[0];\n \n struct cn10k_ipsec_sa {\n+\tunion {\n+\t\t/** Inbound SA */\n+\t\tstruct roc_ot_ipsec_inb_sa in_sa;\n+\t\t/** Outbound SA */\n+\t\tstruct roc_ot_ipsec_outb_sa out_sa;\n+\t};\n+} __rte_aligned(ROC_ALIGN);\n+\n+struct cn10k_sec_session {\n+\tstruct rte_security_session rte_sess;\n+\n+\t/** PMD private space */\n+\n \t/** Pre-populated CPT inst words */\n \tstruct cnxk_cpt_inst_tmpl inst;\n \tuint16_t max_extended_len;\n@@ -26,17 +40,6 @@ struct cn10k_ipsec_sa {\n \t/**\n \t * End of SW mutable area\n \t */\n-\tCN10K_SA_CONTEXT_MARKER sw_area_end __rte_aligned(ROC_ALIGN);\n-\n-\tunion {\n-\t\t/** Inbound SA */\n-\t\tstruct roc_ot_ipsec_inb_sa in_sa;\n-\t\t/** Outbound SA */\n-\t\tstruct roc_ot_ipsec_outb_sa out_sa;\n-\t};\n-} __rte_aligned(ROC_ALIGN);\n-\n-struct cn10k_sec_session {\n \tstruct cn10k_ipsec_sa sa;\n } __rte_aligned(ROC_ALIGN);\n \ndiff --git a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h\nindex 21502e0eb2..a75e88cb28 100644\n--- a/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h\n+++ b/drivers/crypto/cnxk/cn10k_ipsec_la_ops.h\n@@ -13,13 +13,12 @@\n #include \"cnxk_cryptodev.h\"\n \n static inline void\n-ipsec_po_sa_iv_set(struct cn10k_ipsec_sa *sess, struct rte_crypto_op *cop)\n+ipsec_po_sa_iv_set(struct cn10k_sec_session *sess, struct rte_crypto_op *cop)\n {\n-\tuint64_t *iv = &sess->out_sa.iv.u64[0];\n+\tuint64_t *iv = &sess->sa.out_sa.iv.u64[0];\n \tuint64_t *tmp_iv;\n \n-\tmemcpy(iv, rte_crypto_op_ctod_offset(cop, uint8_t *, sess->iv_offset),\n-\t 16);\n+\tmemcpy(iv, rte_crypto_op_ctod_offset(cop, uint8_t *, sess->iv_offset), 16);\n \ttmp_iv = (uint64_t *)iv;\n \t*tmp_iv = rte_be_to_cpu_64(*tmp_iv);\n \n@@ -28,28 +27,24 @@ ipsec_po_sa_iv_set(struct cn10k_ipsec_sa *sess, struct rte_crypto_op *cop)\n }\n \n static inline void\n-ipsec_po_sa_aes_gcm_iv_set(struct cn10k_ipsec_sa *sess,\n-\t\t\t struct rte_crypto_op *cop)\n+ipsec_po_sa_aes_gcm_iv_set(struct cn10k_sec_session *sess, struct rte_crypto_op *cop)\n {\n-\tuint8_t *iv = &sess->out_sa.iv.s.iv_dbg1[0];\n+\tuint8_t *iv = &sess->sa.out_sa.iv.s.iv_dbg1[0];\n \tuint32_t *tmp_iv;\n \n-\tmemcpy(iv, rte_crypto_op_ctod_offset(cop, uint8_t *, sess->iv_offset),\n-\t 4);\n+\tmemcpy(iv, rte_crypto_op_ctod_offset(cop, uint8_t *, sess->iv_offset), 4);\n \ttmp_iv = (uint32_t *)iv;\n \t*tmp_iv = rte_be_to_cpu_32(*tmp_iv);\n \n-\tiv = &sess->out_sa.iv.s.iv_dbg2[0];\n-\tmemcpy(iv,\n-\t rte_crypto_op_ctod_offset(cop, uint8_t *, sess->iv_offset + 4),\n-\t 4);\n+\tiv = &sess->sa.out_sa.iv.s.iv_dbg2[0];\n+\tmemcpy(iv, rte_crypto_op_ctod_offset(cop, uint8_t *, sess->iv_offset + 4), 4);\n \ttmp_iv = (uint32_t *)iv;\n \t*tmp_iv = rte_be_to_cpu_32(*tmp_iv);\n }\n \n static __rte_always_inline int\n-process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop,\n-\t\tstruct cn10k_ipsec_sa *sess, struct cpt_inst_s *inst)\n+process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop, struct cn10k_sec_session *sess,\n+\t\tstruct cpt_inst_s *inst)\n {\n \tstruct rte_crypto_sym_op *sym_op = cop->sym;\n \tstruct rte_mbuf *m_src = sym_op->m_src;\n@@ -64,17 +59,17 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop,\n \tRTE_SET_USED(lf);\n \n #ifdef LA_IPSEC_DEBUG\n-\tif (sess->out_sa.w2.s.iv_src == ROC_IE_OT_SA_IV_SRC_FROM_SA) {\n-\t\tif (sess->out_sa.w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_GCM ||\n-\t\t sess->out_sa.w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_CCM ||\n-\t\t sess->out_sa.w2.s.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC)\n+\tif (sess->sa.out_sa.w2.s.iv_src == ROC_IE_OT_SA_IV_SRC_FROM_SA) {\n+\t\tif (sess->sa.out_sa.w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_GCM ||\n+\t\t sess->sa.out_sa.w2.s.enc_type == ROC_IE_OT_SA_ENC_AES_CCM ||\n+\t\t sess->sa.out_sa.w2.s.auth_type == ROC_IE_OT_SA_AUTH_AES_GMAC)\n \t\t\tipsec_po_sa_aes_gcm_iv_set(sess, cop);\n \t\telse\n \t\t\tipsec_po_sa_iv_set(sess, cop);\n \t}\n \n \t/* Trigger CTX reload to fetch new data from DRAM */\n-\troc_cpt_lf_ctx_reload(lf, &sess->out_sa);\n+\troc_cpt_lf_ctx_reload(lf, &sess->sa.out_sa);\n \trte_delay_ms(1);\n #endif\n \n@@ -94,15 +89,14 @@ process_outb_sa(struct roc_cpt_lf *lf, struct rte_crypto_op *cop,\n }\n \n static __rte_always_inline int\n-process_inb_sa(struct rte_crypto_op *cop, struct cn10k_ipsec_sa *sa,\n-\t struct cpt_inst_s *inst)\n+process_inb_sa(struct rte_crypto_op *cop, struct cn10k_sec_session *sess, struct cpt_inst_s *inst)\n {\n \tstruct rte_crypto_sym_op *sym_op = cop->sym;\n \tstruct rte_mbuf *m_src = sym_op->m_src;\n \tuint64_t dptr;\n \n \t/* Prepare CPT instruction */\n-\tinst->w4.u64 = sa->inst.w4 | rte_pktmbuf_pkt_len(m_src);\n+\tinst->w4.u64 = sess->inst.w4 | rte_pktmbuf_pkt_len(m_src);\n \tdptr = rte_pktmbuf_mtod(m_src, uint64_t);\n \tinst->dptr = dptr;\n \tinst->rptr = dptr;\n", "prefixes": [ "1/2" ] }