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GET /api/patches/117966/?format=api
{ "id": 117966, "url": "http://patches.dpdk.org/api/patches/117966/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221012025346.204394-29-hernan.vargas@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221012025346.204394-29-hernan.vargas@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221012025346.204394-29-hernan.vargas@intel.com", "date": "2022-10-12T02:53:44", "name": "[v3,28/30] baseband/acc100: add ring companion address", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "d2e4e75658d9a44bb0a140ce4760a9ecb713cc55", "submitter": { "id": 2659, "url": "http://patches.dpdk.org/api/people/2659/?format=api", "name": "Hernan Vargas", "email": "hernan.vargas@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221012025346.204394-29-hernan.vargas@intel.com/mbox/", "series": [ { "id": 25150, "url": "http://patches.dpdk.org/api/series/25150/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25150", "date": "2022-10-12T02:53:16", "name": "baseband/acc100: changes for 22.11", "version": 3, "mbox": "http://patches.dpdk.org/series/25150/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/117966/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/117966/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 4A49EA0548;\n\tTue, 11 Oct 2022 21:00:04 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 76B1B42C50;\n\tTue, 11 Oct 2022 20:57:49 +0200 (CEST)", "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by mails.dpdk.org (Postfix) with ESMTP id 852DC42BE9\n for <dev@dpdk.org>; Tue, 11 Oct 2022 20:57:33 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Oct 2022 11:57:33 -0700", "from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103])\n by orsmga006.jf.intel.com with ESMTP; 11 Oct 2022 11:57:32 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1665514653; x=1697050653;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=RLNSayqaQfBgUFbTDgFwr+N+Or0igoc2t165Wclcy78=;\n b=dOMaKoCjEVV6sQ3xWnMSl81H47iz4L8fqCu+q0QyOjY7Bt5RnaDiEW7j\n gsH1OH9z0A1RzM3S7ByhtvLZlfvoeMkEzNHexkM6KrXI1eUmtpOTdsBSJ\n 7qJHV3kol9L8fqu22vbMX/pAzpkbQMvY1X/5eRHZ4orpfV2Q3TMhdRe2s\n RYt5GT1NLgfsjZNeioaANq4E194si5kD0Dz4Qk1a+EBlbKkh1EWb7F9Lk\n Lz0sBmGvSrADXL6F3XFICfEQ7M46IY87K64u6kjCabpef0BNnD0NpeM9k\n vYlNMCNfk2kEkaH0XMPE1F83tPKf2dVmkUL18zplYXIE7VPvlcqbR5rvv A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10497\"; a=\"284981666\"", "E=Sophos;i=\"5.95,177,1661842800\"; d=\"scan'208\";a=\"284981666\"", "E=McAfee;i=\"6500,9779,10497\"; a=\"604261599\"", "E=Sophos;i=\"5.95,177,1661842800\"; d=\"scan'208\";a=\"604261599\"" ], "X-ExtLoop1": "1", "From": "Hernan Vargas <hernan.vargas@intel.com>", "To": "dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,\n maxime.coquelin@redhat.com", "Cc": "nicolas.chautru@intel.com, qi.z.zhang@intel.com,\n Hernan Vargas <hernan.vargas@intel.com>", "Subject": "[PATCH v3 28/30] baseband/acc100: add ring companion address", "Date": "Tue, 11 Oct 2022 19:53:44 -0700", "Message-Id": "<20221012025346.204394-29-hernan.vargas@intel.com>", "X-Mailer": "git-send-email 2.37.1", "In-Reply-To": "<20221012025346.204394-1-hernan.vargas@intel.com>", "References": "<20221012025346.204394-1-hernan.vargas@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Store the virtual address of companion ring as part of queue\ninformation. Use this address to calculate the op address.\n\nSigned-off-by: Hernan Vargas <hernan.vargas@intel.com>\n---\n drivers/baseband/acc/rte_acc100_pmd.c | 175 +++++++++++++++++---------\n 1 file changed, 113 insertions(+), 62 deletions(-)", "diff": "diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c\nindex 23c8e47335..f93fd885a3 100644\n--- a/drivers/baseband/acc/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc/rte_acc100_pmd.c\n@@ -668,6 +668,7 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,\n \tstruct acc_device *d = dev->data->dev_private;\n \tstruct acc_queue *q;\n \tint16_t q_idx;\n+\tint ret;\n \n \tif (d == NULL) {\n \t\trte_bbdev_log(ERR, \"Undefined device\");\n@@ -726,8 +727,8 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,\n \t\t\tRTE_CACHE_LINE_SIZE, conf->socket);\n \tif (q->lb_in == NULL) {\n \t\trte_bbdev_log(ERR, \"Failed to allocate lb_in memory\");\n-\t\trte_free(q);\n-\t\treturn -ENOMEM;\n+\t\tret = -ENOMEM;\n+\t\tgoto free_q;\n \t}\n \tq->lb_in_addr_iova = rte_malloc_virt2iova(q->lb_in);\n \tq->lb_out = rte_zmalloc_socket(dev->device->driver->name,\n@@ -735,11 +736,18 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,\n \t\t\tRTE_CACHE_LINE_SIZE, conf->socket);\n \tif (q->lb_out == NULL) {\n \t\trte_bbdev_log(ERR, \"Failed to allocate lb_out memory\");\n-\t\trte_free(q->lb_in);\n-\t\trte_free(q);\n-\t\treturn -ENOMEM;\n+\t\tret = -ENOMEM;\n+\t\tgoto free_lb_in;\n \t}\n \tq->lb_out_addr_iova = rte_malloc_virt2iova(q->lb_out);\n+\tq->companion_ring_addr = rte_zmalloc_socket(dev->device->driver->name,\n+\t\t\td->sw_ring_max_depth * sizeof(*q->companion_ring_addr),\n+\t\t\tRTE_CACHE_LINE_SIZE, conf->socket);\n+\tif (q->companion_ring_addr == NULL) {\n+\t\trte_bbdev_log(ERR, \"Failed to allocate companion_ring memory\");\n+\t\tret = -ENOMEM;\n+\t\tgoto free_lb_out;\n+\t}\n \n \t/*\n \t * Software queue ring wraps synchronously with the HW when it reaches\n@@ -759,10 +767,8 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,\n \n \tq_idx = acc100_find_free_queue_idx(dev, conf);\n \tif (q_idx == -1) {\n-\t\trte_free(q->lb_in);\n-\t\trte_free(q->lb_out);\n-\t\trte_free(q);\n-\t\treturn -1;\n+\t\tret = -EINVAL;\n+\t\tgoto free_companion_ring_addr;\n \t}\n \n \tq->qgrp_id = (q_idx >> ACC100_GRP_ID_SHIFT) & 0xF;\n@@ -789,6 +795,21 @@ acc100_queue_setup(struct rte_bbdev *dev, uint16_t queue_id,\n \n \tdev->data->queues[queue_id].queue_private = q;\n \treturn 0;\n+\n+free_companion_ring_addr:\n+\trte_free(q->companion_ring_addr);\n+\tq->companion_ring_addr = NULL;\n+free_lb_out:\n+\trte_free(q->lb_out);\n+\tq->lb_out = NULL;\n+free_lb_in:\n+\trte_free(q->lb_in);\n+\tq->lb_in = NULL;\n+free_q:\n+\trte_free(q);\n+\tq = NULL;\n+\n+\treturn ret;\n }\n \n static inline void\n@@ -861,6 +882,7 @@ acc100_queue_release(struct rte_bbdev *dev, uint16_t q_id)\n \t\t/* Mark the Queue as un-assigned */\n \t\td->q_assigned_bit_map[q->qgrp_id] &= (0xFFFFFFFFFFFFFFFF -\n \t\t\t\t(uint64_t) (1 << q->aq_id));\n+\t\trte_free(q->companion_ring_addr);\n \t\trte_free(q->lb_in);\n \t\trte_free(q->lb_out);\n \t\trte_free(q);\n@@ -2431,6 +2453,10 @@ enqueue_ldpc_enc_n_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ops,\n \t}\n \n \tdesc->req.op_addr = ops[0];\n+\t/* Keep track of pointers even when multiplexed in single descriptor */\n+\tstruct acc_ptrs *context_ptrs = q->companion_ring_addr + desc_idx;\n+\tfor (i = 0; i < num; i++)\n+\t\tcontext_ptrs->ptr[i].op_addr = ops[i];\n \n #ifdef RTE_LIBRTE_BBDEV_DEBUG\n \trte_memdump(stderr, \"FCW\", &desc->req.fcw_le,\n@@ -3804,15 +3830,17 @@ acc100_enqueue_ldpc_dec(struct rte_bbdev_queue_data *q_data,\n /* Dequeue one encode operations from ACC100 device in CB mode */\n static inline int\n dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,\n-\t\tuint16_t total_dequeued_cbs, uint32_t *aq_dequeued)\n+\t\tuint16_t *dequeued_ops, uint32_t *aq_dequeued,\n+\t\tuint16_t *dequeued_descs)\n {\n \tunion acc_dma_desc *desc, atom_desc;\n \tunion acc_dma_rsp_desc rsp;\n \tstruct rte_bbdev_enc_op *op;\n \tint i;\n-\n-\tdesc = q->ring_addr + ((q->sw_ring_tail + total_dequeued_cbs)\n+\tint desc_idx = ((q->sw_ring_tail + *dequeued_descs)\n \t\t\t& q->sw_ring_wrap_mask);\n+\n+\tdesc = q->ring_addr + desc_idx;\n \tatom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,\n \t\t\t__ATOMIC_RELAXED);\n \n@@ -3821,7 +3849,8 @@ dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,\n \t\treturn -1;\n \n \trsp.val = atom_desc.rsp.val;\n-\trte_bbdev_log_debug(\"Resp. desc %p: %x\", desc, rsp.val);\n+\trte_bbdev_log_debug(\"Resp. desc %p: %x num %d\\n\",\n+\t\t\tdesc, rsp.val, desc->req.numCBs);\n \n \t/* Dequeue */\n \top = desc->req.op_addr;\n@@ -3842,27 +3871,32 @@ dequeue_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,\n \tdesc->rsp.add_info_0 = 0; /*Reserved bits */\n \tdesc->rsp.add_info_1 = 0; /*Reserved bits */\n \n-\t/* Flag that the muxing cause loss of opaque data */\n-\top->opaque_data = (void *)-1;\n-\tfor (i = 0 ; i < desc->req.numCBs; i++)\n-\t\tref_op[i] = op;\n+\tref_op[0] = op;\n+\tstruct acc_ptrs *context_ptrs = q->companion_ring_addr + desc_idx;\n+\tfor (i = 1 ; i < desc->req.numCBs; i++)\n+\t\tref_op[i] = context_ptrs->ptr[i].op_addr;\n \n-\t/* One CB (op) was successfully dequeued */\n+\t/* One op was successfully dequeued */\n+\t(*dequeued_descs)++;\n+\t*dequeued_ops += desc->req.numCBs;\n \treturn desc->req.numCBs;\n }\n \n-/* Dequeue one encode operations from ACC100 device in TB mode */\n+/* Dequeue one LDPC encode operations from ACC100 device in TB mode\n+ * That operation may cover multiple descriptors\n+ */\n static inline int\n dequeue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,\n-\t\tuint16_t total_dequeued_cbs, uint32_t *aq_dequeued)\n+\t\tuint16_t *dequeued_ops, uint32_t *aq_dequeued,\n+\t\tuint16_t *dequeued_descs)\n {\n \tunion acc_dma_desc *desc, *last_desc, atom_desc;\n \tunion acc_dma_rsp_desc rsp;\n \tstruct rte_bbdev_enc_op *op;\n \tuint8_t i = 0;\n-\tuint16_t current_dequeued_cbs = 0, cbs_in_tb;\n+\tuint16_t current_dequeued_descs = 0, descs_in_tb;\n \n-\tdesc = q->ring_addr + ((q->sw_ring_tail + total_dequeued_cbs)\n+\tdesc = q->ring_addr + ((q->sw_ring_tail + *dequeued_descs)\n \t\t\t& q->sw_ring_wrap_mask);\n \tatom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,\n \t\t\t__ATOMIC_RELAXED);\n@@ -3872,10 +3906,10 @@ dequeue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,\n \t\treturn -1;\n \n \t/* Get number of CBs in dequeued TB */\n-\tcbs_in_tb = desc->req.cbs_in_tb;\n+\tdescs_in_tb = desc->req.cbs_in_tb;\n \t/* Get last CB */\n \tlast_desc = q->ring_addr + ((q->sw_ring_tail\n-\t\t\t+ total_dequeued_cbs + cbs_in_tb - 1)\n+\t\t\t+ *dequeued_descs + descs_in_tb - 1)\n \t\t\t& q->sw_ring_wrap_mask);\n \t/* Check if last CB in TB is ready to dequeue (and thus\n \t * the whole TB) - checking sdone bit. If not return.\n@@ -3891,15 +3925,17 @@ dequeue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,\n \t/* Clearing status, it will be set based on response */\n \top->status = 0;\n \n-\twhile (i < cbs_in_tb) {\n+\twhile (i < descs_in_tb) {\n \t\tdesc = q->ring_addr + ((q->sw_ring_tail\n-\t\t\t\t+ total_dequeued_cbs)\n+\t\t\t\t+ *dequeued_descs)\n \t\t\t\t& q->sw_ring_wrap_mask);\n \t\tatom_desc.atom_hdr = __atomic_load_n((uint64_t *)desc,\n \t\t\t\t__ATOMIC_RELAXED);\n \t\trsp.val = atom_desc.rsp.val;\n-\t\trte_bbdev_log_debug(\"Resp. desc %p: %x\", desc,\n-\t\t\t\trsp.val);\n+\t\trte_bbdev_log_debug(\"Resp. desc %p: %x descs %d cbs %d\\n\",\n+\t\t\t\tdesc,\n+\t\t\t\trsp.val, descs_in_tb,\n+\t\t\t\tdesc->req.numCBs);\n \n \t\top->status |= ((rsp.input_err)\n \t\t\t\t? (1 << RTE_BBDEV_DATA_ERROR) : 0);\n@@ -3913,14 +3949,15 @@ dequeue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op **ref_op,\n \t\tdesc->rsp.val = ACC_DMA_DESC_TYPE;\n \t\tdesc->rsp.add_info_0 = 0;\n \t\tdesc->rsp.add_info_1 = 0;\n-\t\ttotal_dequeued_cbs++;\n-\t\tcurrent_dequeued_cbs++;\n+\t\t(*dequeued_descs)++;\n+\t\tcurrent_dequeued_descs++;\n \t\ti++;\n \t}\n \n \t*ref_op = op;\n \n-\treturn current_dequeued_cbs;\n+\t(*dequeued_ops)++;\n+\treturn current_dequeued_descs;\n }\n \n /* Dequeue one decode operation from ACC100 device in CB mode */\n@@ -4118,12 +4155,11 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,\n \t\tstruct rte_bbdev_enc_op **ops, uint16_t num)\n {\n \tstruct acc_queue *q = q_data->queue_private;\n-\tuint16_t dequeue_num;\n \tuint32_t avail = acc_ring_avail_deq(q);\n \tuint32_t aq_dequeued = 0;\n-\tuint16_t i, dequeued_cbs = 0;\n-\tstruct rte_bbdev_enc_op *op;\n+\tuint16_t i, dequeued_ops = 0, dequeued_descs = 0;\n \tint ret;\n+\tstruct rte_bbdev_enc_op *op;\n \tif (avail == 0)\n \t\treturn 0;\n #ifdef RTE_LIBRTE_BBDEV_DEBUG\n@@ -4132,31 +4168,35 @@ acc100_dequeue_enc(struct rte_bbdev_queue_data *q_data,\n \t\treturn 0;\n \t}\n #endif\n+\top = (q->ring_addr + (q->sw_ring_tail &\n+\t\t\tq->sw_ring_wrap_mask))->req.op_addr;\n+\tif (unlikely(ops == NULL || op == NULL))\n+\t\treturn 0;\n \n-\tdequeue_num = (avail < num) ? avail : num;\n+\tint cbm = op->turbo_enc.code_block_mode;\n \n-\tfor (i = 0; i < dequeue_num; ++i) {\n-\t\top = (q->ring_addr + ((q->sw_ring_tail + dequeued_cbs)\n-\t\t\t& q->sw_ring_wrap_mask))->req.op_addr;\n-\t\tif (op->turbo_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)\n-\t\t\tret = dequeue_enc_one_op_tb(q, &ops[i], dequeued_cbs,\n-\t\t\t\t\t&aq_dequeued);\n+\tfor (i = 0; i < num; i++) {\n+\t\tif (cbm == RTE_BBDEV_TRANSPORT_BLOCK)\n+\t\t\tret = dequeue_enc_one_op_tb(q, &ops[dequeued_ops],\n+\t\t\t\t\t&dequeued_ops, &aq_dequeued,\n+\t\t\t\t\t&dequeued_descs);\n \t\telse\n-\t\t\tret = dequeue_enc_one_op_cb(q, &ops[i], dequeued_cbs,\n-\t\t\t\t\t&aq_dequeued);\n-\n+\t\t\tret = dequeue_enc_one_op_cb(q, &ops[dequeued_ops],\n+\t\t\t\t\t&dequeued_ops, &aq_dequeued,\n+\t\t\t\t\t&dequeued_descs);\n \t\tif (ret < 0)\n \t\t\tbreak;\n-\t\tdequeued_cbs += ret;\n+\t\tif (dequeued_ops >= num)\n+\t\t\tbreak;\n \t}\n \n \tq->aq_dequeued += aq_dequeued;\n-\tq->sw_ring_tail += dequeued_cbs;\n+\tq->sw_ring_tail += dequeued_descs;\n \n \t/* Update enqueue stats */\n-\tq_data->queue_stats.dequeued_count += i;\n+\tq_data->queue_stats.dequeued_count += dequeued_ops;\n \n-\treturn i;\n+\treturn dequeued_ops;\n }\n \n /* Dequeue LDPC encode operations from ACC100 device. */\n@@ -4167,24 +4207,37 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,\n \tstruct acc_queue *q = q_data->queue_private;\n \tuint32_t avail = acc_ring_avail_deq(q);\n \tuint32_t aq_dequeued = 0;\n-\tuint16_t dequeue_num, i, dequeued_cbs = 0, dequeued_descs = 0;\n+\tuint16_t i, dequeued_ops = 0, dequeued_descs = 0;\n \tint ret;\n+\tstruct rte_bbdev_enc_op *op;\n+\tunion acc_dma_desc *desc;\n \n+\tif (q == NULL)\n+\t\treturn 0;\n #ifdef RTE_LIBRTE_BBDEV_DEBUG\n-\tif (unlikely(ops == 0 && q == NULL))\n+\tif (unlikely(ops == 0))\n \t\treturn 0;\n #endif\n+\tdesc = q->ring_addr + (q->sw_ring_tail & q->sw_ring_wrap_mask);\n+\tif (unlikely(desc == NULL))\n+\t\treturn 0;\n+\top = desc->req.op_addr;\n+\tif (unlikely(ops == NULL || op == NULL))\n+\t\treturn 0;\n+\tint cbm = op->ldpc_enc.code_block_mode;\n \n-\tdequeue_num = RTE_MIN(avail, num);\n-\n-\tfor (i = 0; i < dequeue_num; i++) {\n-\t\tret = dequeue_enc_one_op_cb(q, &ops[dequeued_cbs],\n-\t\t\t\tdequeued_descs, &aq_dequeued);\n+\tfor (i = 0; i < avail; i++) {\n+\t\tif (cbm == RTE_BBDEV_TRANSPORT_BLOCK)\n+\t\t\tret = dequeue_enc_one_op_tb(q, &ops[dequeued_ops],\n+\t\t\t\t\t&dequeued_ops, &aq_dequeued,\n+\t\t\t\t\t&dequeued_descs);\n+\t\telse\n+\t\t\tret = dequeue_enc_one_op_cb(q, &ops[dequeued_ops],\n+\t\t\t\t\t&dequeued_ops, &aq_dequeued,\n+\t\t\t\t\t&dequeued_descs);\n \t\tif (ret < 0)\n \t\t\tbreak;\n-\t\tdequeued_cbs += ret;\n-\t\tdequeued_descs++;\n-\t\tif (dequeued_cbs >= num)\n+\t\tif (dequeued_ops >= num)\n \t\t\tbreak;\n \t}\n \n@@ -4192,12 +4245,10 @@ acc100_dequeue_ldpc_enc(struct rte_bbdev_queue_data *q_data,\n \tq->sw_ring_tail += dequeued_descs;\n \n \t/* Update enqueue stats */\n-\tq_data->queue_stats.dequeued_count += dequeued_cbs;\n-\n-\treturn dequeued_cbs;\n+\tq_data->queue_stats.dequeued_count += dequeued_ops;\n+\treturn dequeued_ops;\n }\n \n-\n /* Dequeue decode operations from ACC100 device. */\n static uint16_t\n acc100_dequeue_dec(struct rte_bbdev_queue_data *q_data,\n", "prefixes": [ "v3", "28/30" ] }