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GET /api/patches/117957/?format=api
{ "id": 117957, "url": "http://patches.dpdk.org/api/patches/117957/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221012025346.204394-20-hernan.vargas@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221012025346.204394-20-hernan.vargas@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221012025346.204394-20-hernan.vargas@intel.com", "date": "2022-10-12T02:53:35", "name": "[v3,19/30] baseband/acc100: added LDPC transport block support", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "4b0a0bfc3e9c6b9e0e9719597639a42ccf8e54df", "submitter": { "id": 2659, "url": "http://patches.dpdk.org/api/people/2659/?format=api", "name": "Hernan Vargas", "email": "hernan.vargas@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221012025346.204394-20-hernan.vargas@intel.com/mbox/", "series": [ { "id": 25150, "url": "http://patches.dpdk.org/api/series/25150/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25150", "date": "2022-10-12T02:53:16", "name": "baseband/acc100: changes for 22.11", "version": 3, "mbox": "http://patches.dpdk.org/series/25150/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/117957/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/117957/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id D0928A0548;\n\tTue, 11 Oct 2022 20:59:18 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 1D2AE42C17;\n\tTue, 11 Oct 2022 20:57:42 +0200 (CEST)", "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by mails.dpdk.org (Postfix) with ESMTP id C053842BC3\n for <dev@dpdk.org>; Tue, 11 Oct 2022 20:57:29 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Oct 2022 11:57:29 -0700", "from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103])\n by orsmga006.jf.intel.com with ESMTP; 11 Oct 2022 11:57:28 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1665514650; x=1697050650;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=AC2nPTOIQe5XHjnUARsouuqQim+IanzpthWbzdxMFYM=;\n b=OEo345kvU4gKiYwe2PJEeT21J77UUL5y22E1DGxASpIoF6IYl8p75/AP\n ytv6lL2ZiGS+fMLUsvXHC7Nb3zqH0CuV+W6AIezk1X7N7A2UBBbkJk4Cj\n hxQYsFjKKhORaCn6O4Z7gIjnzewh61J2AmAnpVGoBICKG/YY8a+TxG9Ml\n z4qH9cYvNs0KrxK4Eguswvbzse0cSf5eraf2Ckm+ctUaZ6pnhb5jZQsB/\n z4CzS/JdtvOJqz4akblQvHV7VrSwSAUGdIcdMo2h12DickAS1in4tkGBa\n 21WkTacIL0n8anCtsNY5zwMPkMhs1Y8n4875qL1jUOUBTKeqdYEZo/F+L Q==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10497\"; a=\"284981652\"", "E=Sophos;i=\"5.95,177,1661842800\"; d=\"scan'208\";a=\"284981652\"", "E=McAfee;i=\"6500,9779,10497\"; a=\"604261570\"", "E=Sophos;i=\"5.95,177,1661842800\"; d=\"scan'208\";a=\"604261570\"" ], "X-ExtLoop1": "1", "From": "Hernan Vargas <hernan.vargas@intel.com>", "To": "dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,\n maxime.coquelin@redhat.com", "Cc": "nicolas.chautru@intel.com, qi.z.zhang@intel.com,\n Hernan Vargas <hernan.vargas@intel.com>", "Subject": "[PATCH v3 19/30] baseband/acc100: added LDPC transport block support", "Date": "Tue, 11 Oct 2022 19:53:35 -0700", "Message-Id": "<20221012025346.204394-20-hernan.vargas@intel.com>", "X-Mailer": "git-send-email 2.37.1", "In-Reply-To": "<20221012025346.204394-1-hernan.vargas@intel.com>", "References": "<20221012025346.204394-1-hernan.vargas@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Added LDPC enqueue functions to handle transport blocks.\n\nSigned-off-by: Hernan Vargas <hernan.vargas@intel.com>\n\nReviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>\n---\n drivers/baseband/acc/rte_acc100_pmd.c | 167 +++++++++++++++++++++++++-\n 1 file changed, 164 insertions(+), 3 deletions(-)", "diff": "diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c\nindex 1ccbe4b8b7..1f671ac8f2 100644\n--- a/drivers/baseband/acc/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc/rte_acc100_pmd.c\n@@ -2152,6 +2152,56 @@ enqueue_ldpc_enc_n_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ops,\n \treturn num;\n }\n \n+/* Enqueue one encode operations for ACC100 device for a partial TB\n+ * all codes blocks have same configuration multiplexed on the same descriptor.\n+ */\n+static inline void\n+enqueue_ldpc_enc_part_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,\n+\t\tuint16_t total_enqueued_descs, int16_t num_cbs, uint32_t e,\n+\t\tuint16_t in_len_bytes, uint32_t out_len_bytes, uint32_t *in_offset,\n+\t\tuint32_t *out_offset)\n+{\n+\tunion acc_dma_desc *desc = NULL;\n+\tstruct rte_mbuf *output_head, *output;\n+\tint i, next_triplet;\n+\tstruct rte_bbdev_op_ldpc_enc *enc = &op->ldpc_enc;\n+\tuint16_t desc_idx = ((q->sw_ring_head + total_enqueued_descs) & q->sw_ring_wrap_mask);\n+\n+\tdesc = q->ring_addr + desc_idx;\n+\tacc_fcw_le_fill(op, &desc->req.fcw_le, num_cbs, e);\n+\n+\t/* This could be done at polling. */\n+\tacc_header_init(&desc->req);\n+\tdesc->req.numCBs = num_cbs;\n+\n+\tdesc->req.m2dlen = 1 + num_cbs;\n+\tdesc->req.d2mlen = num_cbs;\n+\tnext_triplet = 1;\n+\n+\tfor (i = 0; i < num_cbs; i++) {\n+\t\tdesc->req.data_ptrs[next_triplet].address =\n+\t\t\trte_pktmbuf_iova_offset(enc->input.data, *in_offset);\n+\t\t*in_offset += in_len_bytes;\n+\t\tdesc->req.data_ptrs[next_triplet].blen = in_len_bytes;\n+\t\tnext_triplet++;\n+\t\tdesc->req.data_ptrs[next_triplet].address =\n+\t\t\trte_pktmbuf_iova_offset(enc->output.data, *out_offset);\n+\t\t*out_offset += out_len_bytes;\n+\t\tdesc->req.data_ptrs[next_triplet].blen = out_len_bytes;\n+\t\tnext_triplet++;\n+\t\tenc->output.length += out_len_bytes;\n+\t\toutput_head = output = enc->output.data;\n+\t\tmbuf_append(output_head, output, out_len_bytes);\n+\t}\n+\n+#ifdef RTE_LIBRTE_BBDEV_DEBUG\n+\trte_memdump(stderr, \"FCW\", &desc->req.fcw_le,\n+\t\t\tsizeof(desc->req.fcw_le) - 8);\n+\trte_memdump(stderr, \"Req Desc.\", desc, sizeof(*desc));\n+#endif\n+\n+}\n+\n /* Enqueue one encode operations for ACC100 device in CB mode */\n static inline int\n enqueue_ldpc_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op *op,\n@@ -2296,6 +2346,76 @@ enqueue_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,\n \treturn current_enqueued_cbs;\n }\n \n+/* Enqueue one encode operations for ACC100 device in TB mode.\n+ * returns the number of descs used.\n+ */\n+static inline int\n+enqueue_ldpc_enc_one_op_tb(struct acc_queue *q, struct rte_bbdev_enc_op *op,\n+\t\tuint16_t enq_descs, uint8_t cbs_in_tb)\n+{\n+#ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE\n+\tif (validate_ldpc_enc_op(op, q) == -1) {\n+\t\trte_bbdev_log(ERR, \"LDPC encoder validation failed\");\n+\t\treturn -EINVAL;\n+\t}\n+#endif\n+\tuint8_t num_a, num_b;\n+\tuint16_t desc_idx;\n+\tuint8_t r = op->ldpc_enc.tb_params.r;\n+\tuint8_t cab = op->ldpc_enc.tb_params.cab;\n+\tunion acc_dma_desc *desc;\n+\tuint16_t init_enq_descs = enq_descs;\n+\tuint16_t input_len_B = ((op->ldpc_enc.basegraph == 1 ? 22 : 10) *\n+\t\t\top->ldpc_enc.z_c - op->ldpc_enc.n_filler) >> 3;\n+\tuint32_t in_offset = 0, out_offset = 0;\n+\tuint16_t return_descs;\n+\n+\tif (check_bit(op->ldpc_enc.op_flags, RTE_BBDEV_LDPC_CRC_24B_ATTACH))\n+\t\tinput_len_B -= 3;\n+\n+\tif (r < cab) {\n+\t\tnum_a = cab - r;\n+\t\tnum_b = cbs_in_tb - cab;\n+\t} else {\n+\t\tnum_a = 0;\n+\t\tnum_b = cbs_in_tb - r;\n+\t}\n+\n+\twhile (num_a > 0) {\n+\t\tuint32_t e = op->ldpc_enc.tb_params.ea;\n+\t\tuint32_t out_len_bytes = (e + 7) >> 3;\n+\t\tuint8_t enq = RTE_MIN(num_a, ACC_MUX_5GDL_DESC);\n+\t\tnum_a -= enq;\n+\t\tenqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,\n+\t\t\t\tout_len_bytes, &in_offset, &out_offset);\n+\t\tenq_descs++;\n+\t}\n+\twhile (num_b > 0) {\n+\t\tuint32_t e = op->ldpc_enc.tb_params.eb;\n+\t\tuint32_t out_len_bytes = (e + 7) >> 3;\n+\t\tuint8_t enq = RTE_MIN(num_b, ACC_MUX_5GDL_DESC);\n+\t\tnum_b -= enq;\n+\t\tenqueue_ldpc_enc_part_tb(q, op, enq_descs, enq, e, input_len_B,\n+\t\t\t\tout_len_bytes, &in_offset, &out_offset);\n+\t\tenq_descs++;\n+\t}\n+\n+\treturn_descs = enq_descs - init_enq_descs;\n+\t/* Keep total number of CBs in first TB. */\n+\tdesc_idx = ((q->sw_ring_head + init_enq_descs) & q->sw_ring_wrap_mask);\n+\tdesc = q->ring_addr + desc_idx;\n+\tdesc->req.cbs_in_tb = return_descs; /** Actual number of descriptors. */\n+\tdesc->req.op_addr = op;\n+\n+\t/* Set SDone on last CB descriptor for TB mode. */\n+\tdesc_idx = ((q->sw_ring_head + enq_descs - 1) & q->sw_ring_wrap_mask);\n+\tdesc = q->ring_addr + desc_idx;\n+\tdesc->req.sdone_enable = 1;\n+\tdesc->req.irq_enable = q->irq_enable;\n+\tdesc->req.op_addr = op;\n+\treturn return_descs;\n+}\n+\n #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE\n /* Validates turbo decoder parameters */\n static inline int\n@@ -2876,7 +2996,10 @@ enqueue_dec_one_op_tb(struct acc_queue *q, struct rte_bbdev_dec_op *op,\n \tuint16_t current_enqueued_cbs = 0;\n \n #ifndef RTE_LIBRTE_BBDEV_SKIP_VALIDATE\n-\t/* Validate op structure */\n+\tif (cbs_in_tb == 0) {\n+\t\trte_bbdev_log(ERR, \"Turbo decoder invalid number of CBs\");\n+\t\treturn -EINVAL;\n+\t}\n \tif (validate_dec_op(op, q) == -1) {\n \t\trte_bbdev_log(ERR, \"Turbo decoder validation rejected\");\n \t\treturn -EINVAL;\n@@ -3102,7 +3225,45 @@ acc100_enqueue_enc_tb(struct rte_bbdev_queue_data *q_data,\n \treturn i;\n }\n \n-/* Check room in AQ for the enqueues batches into Qmgr */\n+/* Enqueue LDPC encode operations for ACC100 device in TB mode. */\n+static uint16_t\n+acc100_enqueue_ldpc_enc_tb(struct rte_bbdev_queue_data *q_data,\n+\t\tstruct rte_bbdev_enc_op **ops, uint16_t num)\n+{\n+\tstruct acc_queue *q = q_data->queue_private;\n+\tint32_t avail = acc_ring_avail_enq(q);\n+\tuint16_t i, enqueued_descs = 0;\n+\tuint8_t cbs_in_tb;\n+\tint descs_used;\n+\n+\tfor (i = 0; i < num; ++i) {\n+\t\tcbs_in_tb = get_num_cbs_in_tb_ldpc_enc(&ops[i]->ldpc_enc);\n+\t\t/* Check if there are available space for further processing. */\n+\t\tif (unlikely(avail - cbs_in_tb < 0)) {\n+\t\t\tacc_enqueue_ring_full(q_data);\n+\t\t\tbreak;\n+\t\t}\n+\t\tdescs_used = enqueue_ldpc_enc_one_op_tb(q, ops[i], enqueued_descs, cbs_in_tb);\n+\t\tif (descs_used < 0) {\n+\t\t\tacc_enqueue_invalid(q_data);\n+\t\t\tbreak;\n+\t\t}\n+\t\tenqueued_descs += descs_used;\n+\t\tavail -= descs_used;\n+\t}\n+\tif (unlikely(enqueued_descs == 0))\n+\t\treturn 0; /* Nothing to enqueue. */\n+\n+\tacc_dma_enqueue(q, enqueued_descs, &q_data->queue_stats);\n+\n+\t/* Update stats. */\n+\tq_data->queue_stats.enqueued_count += i;\n+\tq_data->queue_stats.enqueue_err_count += num - i;\n+\n+\treturn i;\n+}\n+\n+/* Check room in AQ for the enqueues batches into Qmgr. */\n static int32_t\n acc100_aq_avail(struct rte_bbdev_queue_data *q_data, uint16_t num_ops)\n {\n@@ -3139,7 +3300,7 @@ acc100_enqueue_ldpc_enc(struct rte_bbdev_queue_data *q_data,\n \tif (unlikely((aq_avail <= 0) || (num == 0)))\n \t\treturn 0;\n \tif (ops[0]->ldpc_enc.code_block_mode == RTE_BBDEV_TRANSPORT_BLOCK)\n-\t\treturn acc100_enqueue_enc_tb(q_data, ops, num);\n+\t\treturn acc100_enqueue_ldpc_enc_tb(q_data, ops, num);\n \telse\n \t\treturn acc100_enqueue_ldpc_enc_cb(q_data, ops, num);\n }\n", "prefixes": [ "v3", "19/30" ] }