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GET /api/patches/117942/?format=api
{ "id": 117942, "url": "http://patches.dpdk.org/api/patches/117942/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/patch/20221012025346.204394-5-hernan.vargas@intel.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20221012025346.204394-5-hernan.vargas@intel.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20221012025346.204394-5-hernan.vargas@intel.com", "date": "2022-10-12T02:53:20", "name": "[v3,04/30] baseband/acc100: add LDPC encoder padding function", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": true, "hash": "6ee24ab2c8024bc98c27376af5cbc8b70dbba28b", "submitter": { "id": 2659, "url": "http://patches.dpdk.org/api/people/2659/?format=api", "name": "Hernan Vargas", "email": "hernan.vargas@intel.com" }, "delegate": { "id": 6690, "url": "http://patches.dpdk.org/api/users/6690/?format=api", "username": "akhil", "first_name": "akhil", "last_name": "goyal", "email": "gakhil@marvell.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/patch/20221012025346.204394-5-hernan.vargas@intel.com/mbox/", "series": [ { "id": 25150, "url": "http://patches.dpdk.org/api/series/25150/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=25150", "date": "2022-10-12T02:53:16", "name": "baseband/acc100: changes for 22.11", "version": 3, "mbox": "http://patches.dpdk.org/series/25150/mbox/" } ], "comments": "http://patches.dpdk.org/api/patches/117942/comments/", "check": "success", "checks": "http://patches.dpdk.org/api/patches/117942/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 29E19A0548;\n\tTue, 11 Oct 2022 20:57:44 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9D5A142BA0;\n\tTue, 11 Oct 2022 20:57:26 +0200 (CEST)", "from mga17.intel.com (mga17.intel.com [192.55.52.151])\n by mails.dpdk.org (Postfix) with ESMTP id 8BA8F40687;\n Tue, 11 Oct 2022 20:57:22 +0200 (CEST)", "from orsmga006.jf.intel.com ([10.7.209.51])\n by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 11 Oct 2022 11:57:21 -0700", "from unknown (HELO csl-npg-qt0.la.intel.com) ([10.233.181.103])\n by orsmga006.jf.intel.com with ESMTP; 11 Oct 2022 11:57:21 -0700" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1665514642; x=1697050642;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=KjgGZ+s5FZb21hgrjCh/dpalydN9cbLc9VZBH1/afYY=;\n b=K0zEHTM08MoDsgLQCjCyHB3Am3DmGGp7mzk6TKPnzW16cIh7kAGeScYl\n 6m9s6eAto2lifnWQYyLkQ7l+PFF31QJe2dEUkzUtt1rxWgHK4ZogL8H6t\n VDhJtzrzPhy3TVnXaA5yVTs2hq/vLdFDSfI2dGHAtHZAJn9O0nSNw5T7w\n eIOMy1ARFgDLy0LAPYBDEtQGyKguiWuxOSfPxTjGQq3pgyADBOJY5tpd+\n MbQzr3tdtTeRGObH6tqdDOb/K23bDyMKhUtewTs6uZ7u2ULU1vq71xhaf\n rgBYZEir4TEBhrEDsT0xrAdqxsx1mFZ3ogHbWOPc0p1VGLmtQ7mZMn8Wi A==;", "X-IronPort-AV": [ "E=McAfee;i=\"6500,9779,10497\"; a=\"284981614\"", "E=Sophos;i=\"5.95,177,1661842800\"; d=\"scan'208\";a=\"284981614\"", "E=McAfee;i=\"6500,9779,10497\"; a=\"604261519\"", "E=Sophos;i=\"5.95,177,1661842800\"; d=\"scan'208\";a=\"604261519\"" ], "X-ExtLoop1": "1", "From": "Hernan Vargas <hernan.vargas@intel.com>", "To": "dev@dpdk.org, gakhil@marvell.com, trix@redhat.com,\n maxime.coquelin@redhat.com", "Cc": "nicolas.chautru@intel.com, qi.z.zhang@intel.com,\n Hernan Vargas <hernan.vargas@intel.com>, stable@dpdk.org", "Subject": "[PATCH v3 04/30] baseband/acc100: add LDPC encoder padding function", "Date": "Tue, 11 Oct 2022 19:53:20 -0700", "Message-Id": "<20221012025346.204394-5-hernan.vargas@intel.com>", "X-Mailer": "git-send-email 2.37.1", "In-Reply-To": "<20221012025346.204394-1-hernan.vargas@intel.com>", "References": "<20221012025346.204394-1-hernan.vargas@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "LDPC Encoder input may need to be padded to avoid small beat for ACC100.\nPadding 5GDL input buffer length (BLEN) to avoid case (BLEN % 64) <= 8.\nAdding protection for corner case to avoid for 5GDL occurrence of last\nbeat within the ACC100 fabric with <= 8B which might trigger a fabric\ncorner case hang issue.\n\nFixes: 5ad5060f8f7 (\"baseband/acc100: add LDPC processing functions\")\nCc: stable@dpdk.org\n\nSigned-off-by: Hernan Vargas <hernan.vargas@intel.com>\n---\n drivers/baseband/acc/rte_acc100_pmd.c | 27 ++++++++++++++++++++-------\n 1 file changed, 20 insertions(+), 7 deletions(-)", "diff": "diff --git a/drivers/baseband/acc/rte_acc100_pmd.c b/drivers/baseband/acc/rte_acc100_pmd.c\nindex 436af977e4..f636d4fa0f 100644\n--- a/drivers/baseband/acc/rte_acc100_pmd.c\n+++ b/drivers/baseband/acc/rte_acc100_pmd.c\n@@ -1016,7 +1016,6 @@ acc100_fcw_td_fill(const struct rte_bbdev_dec_op *op, struct acc_fcw_td *fcw)\n \t\t\tRTE_BBDEV_TURBO_HALF_ITERATION_EVEN);\n }\n \n-#ifdef RTE_LIBRTE_BBDEV_DEBUG\n \n static inline bool\n is_acc100(struct acc_queue *q)\n@@ -1029,7 +1028,6 @@ validate_op_required(struct acc_queue *q)\n {\n \treturn is_acc100(q);\n }\n-#endif\n \n /* Fill in a frame control word for LDPC decoding. */\n static inline void\n@@ -1354,12 +1352,28 @@ acc100_dma_fill_blk_type_in(struct acc_dma_req_desc *desc,\n \treturn next_triplet;\n }\n \n+/* May need to pad LDPC Encoder input to avoid small beat for ACC100. */\n+static inline uint16_t\n+pad_le_in(uint16_t blen, struct acc_queue *q)\n+{\n+\tuint16_t last_beat;\n+\n+\tif (!is_acc100(q))\n+\t\treturn blen;\n+\n+\tlast_beat = blen % 64;\n+\tif ((last_beat > 0) && (last_beat <= 8))\n+\t\tblen += 8;\n+\n+\treturn blen;\n+}\n+\n static inline int\n acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,\n \t\tstruct acc_dma_req_desc *desc, struct rte_mbuf **input,\n \t\tstruct rte_mbuf *output, uint32_t *in_offset,\n \t\tuint32_t *out_offset, uint32_t *out_length,\n-\t\tuint32_t *mbuf_total_left, uint32_t *seg_total_left)\n+\t\tuint32_t *mbuf_total_left, uint32_t *seg_total_left, struct acc_queue *q)\n {\n \tint next_triplet = 1; /* FCW already done */\n \tuint16_t K, in_length_in_bits, in_length_in_bytes;\n@@ -1383,8 +1397,7 @@ acc100_dma_desc_le_fill(struct rte_bbdev_enc_op *op,\n \t}\n \n \tnext_triplet = acc100_dma_fill_blk_type_in(desc, input, in_offset,\n-\t\t\tin_length_in_bytes,\n-\t\t\tseg_total_left, next_triplet);\n+\t\t\tpad_le_in(in_length_in_bytes, q), seg_total_left, next_triplet);\n \tif (unlikely(next_triplet < 0)) {\n \t\trte_bbdev_log(ERR,\n \t\t\t\t\"Mismatch between data to process and mbuf data length in bbdev_op: %p\",\n@@ -2038,7 +2051,7 @@ enqueue_ldpc_enc_n_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op **ops,\n \tacc_header_init(&desc->req);\n \tdesc->req.numCBs = num;\n \n-\tin_length_in_bytes = ops[0]->ldpc_enc.input.data->data_len;\n+\tin_length_in_bytes = pad_le_in(ops[0]->ldpc_enc.input.data->data_len, q);\n \tout_length = (enc->cb_params.e + 7) >> 3;\n \tdesc->req.m2dlen = 1 + num;\n \tdesc->req.d2mlen = num;\n@@ -2107,7 +2120,7 @@ enqueue_ldpc_enc_one_op_cb(struct acc_queue *q, struct rte_bbdev_enc_op *op,\n \n \tret = acc100_dma_desc_le_fill(op, &desc->req, &input, output,\n \t\t\t&in_offset, &out_offset, &out_length, &mbuf_total_left,\n-\t\t\t&seg_total_left);\n+\t\t\t&seg_total_left, q);\n \n \tif (unlikely(ret < 0))\n \t\treturn ret;\n", "prefixes": [ "v3", "04/30" ] }